Tom Stellard | c026e8b | 2013-06-28 15:47:08 +0000 | [diff] [blame^] | 1 | ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s |
| 2 | |
| 3 | |
| 4 | @local_memory.local_mem = internal addrspace(3) unnamed_addr global [16 x i32] zeroinitializer, align 4 |
| 5 | |
| 6 | ; CHECK: @local_memory |
| 7 | |
| 8 | ; Check that the LDS size emitted correctly |
| 9 | ; CHECK: .long 166120 |
| 10 | ; CHECK-NEXT: .long 16 |
| 11 | |
| 12 | ; CHECK: LDS_WRITE |
| 13 | |
| 14 | ; GROUP_BARRIER must be the last instruction in a clause |
| 15 | ; CHECK: GROUP_BARRIER |
| 16 | ; CHECK-NEXT: ALU clause |
| 17 | |
| 18 | ; CHECK: LDS_READ_RET |
| 19 | |
| 20 | define void @local_memory(i32 addrspace(1)* %out) { |
| 21 | entry: |
| 22 | %y.i = call i32 @llvm.r600.read.tidig.x() #0 |
| 23 | %arrayidx = getelementptr inbounds [16 x i32] addrspace(3)* @local_memory.local_mem, i32 0, i32 %y.i |
| 24 | store i32 %y.i, i32 addrspace(3)* %arrayidx, align 4 |
| 25 | %add = add nsw i32 %y.i, 1 |
| 26 | %cmp = icmp eq i32 %add, 16 |
| 27 | %.add = select i1 %cmp, i32 0, i32 %add |
| 28 | call void @llvm.AMDGPU.barrier.local() |
| 29 | %arrayidx1 = getelementptr inbounds [16 x i32] addrspace(3)* @local_memory.local_mem, i32 0, i32 %.add |
| 30 | %0 = load i32 addrspace(3)* %arrayidx1, align 4 |
| 31 | %arrayidx2 = getelementptr inbounds i32 addrspace(1)* %out, i32 %y.i |
| 32 | store i32 %0, i32 addrspace(1)* %arrayidx2, align 4 |
| 33 | ret void |
| 34 | } |
| 35 | |
| 36 | @local_memory_two_objects.local_mem0 = internal addrspace(3) unnamed_addr global [4 x i32] zeroinitializer, align 4 |
| 37 | @local_memory_two_objects.local_mem1 = internal addrspace(3) unnamed_addr global [4 x i32] zeroinitializer, align 4 |
| 38 | |
| 39 | ; CHECK: @local_memory_two_objects |
| 40 | |
| 41 | ; Check that the LDS size emitted correctly |
| 42 | ; CHECK: .long 166120 |
| 43 | ; CHECK-NEXT: .long 8 |
| 44 | |
| 45 | ; Make sure the lds writes are using different addresses. |
| 46 | ; CHECK: LDS_WRITE {{[*]*}} {{PV|T}}[[ADDRW:[0-9]*\.[XYZW]]] |
| 47 | ; CHECK-NOT: LDS_WRITE {{[*]*}} T[[ADDRW]] |
| 48 | |
| 49 | ; GROUP_BARRIER must be the last instruction in a clause |
| 50 | ; CHECK: GROUP_BARRIER |
| 51 | ; CHECK-NEXT: ALU clause |
| 52 | |
| 53 | ; Make sure the lds reads are using different addresses. |
| 54 | ; CHECK: LDS_READ_RET {{[*]*}} OQAP, {{PV|T}}[[ADDRR:[0-9]*\.[XYZW]]] |
| 55 | ; CHECK-NOT: LDS_READ_RET {{[*]*}} OQAP, T[[ADDRR]] |
| 56 | |
| 57 | define void @local_memory_two_objects(i32 addrspace(1)* %out) { |
| 58 | entry: |
| 59 | %x.i = call i32 @llvm.r600.read.tidig.x() #0 |
| 60 | %arrayidx = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %x.i |
| 61 | store i32 %x.i, i32 addrspace(3)* %arrayidx, align 4 |
| 62 | %mul = shl nsw i32 %x.i, 1 |
| 63 | %arrayidx1 = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %x.i |
| 64 | store i32 %mul, i32 addrspace(3)* %arrayidx1, align 4 |
| 65 | %sub = sub nsw i32 3, %x.i |
| 66 | call void @llvm.AMDGPU.barrier.local() |
| 67 | %arrayidx2 = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %sub |
| 68 | %0 = load i32 addrspace(3)* %arrayidx2, align 4 |
| 69 | %arrayidx3 = getelementptr inbounds i32 addrspace(1)* %out, i32 %x.i |
| 70 | store i32 %0, i32 addrspace(1)* %arrayidx3, align 4 |
| 71 | %arrayidx4 = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %sub |
| 72 | %1 = load i32 addrspace(3)* %arrayidx4, align 4 |
| 73 | %add = add nsw i32 %x.i, 4 |
| 74 | %arrayidx5 = getelementptr inbounds i32 addrspace(1)* %out, i32 %add |
| 75 | store i32 %1, i32 addrspace(1)* %arrayidx5, align 4 |
| 76 | ret void |
| 77 | } |
| 78 | |
| 79 | declare i32 @llvm.r600.read.tidig.x() #0 |
| 80 | declare void @llvm.AMDGPU.barrier.local() |
| 81 | |
| 82 | attributes #0 = { readnone } |