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gerrit-public.fairphone.software / toolchain / llvm-project / c066a92657a78f13b5e490e1b51c11d740671de0 / . / llvm / test / CodeGen / AArch64 / O3-pipeline.ll
blob: aa5a5578d242c02dccd3e90a85a8f75baf82c8c0 [file] [log] [blame]
Michael Zolotukhin35203312018-03-22 23:02:48 +0000[diff] [blame]1; RUN: llc -mtriple=arm64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s
2
3; REQUIRES: asserts
4
5; CHECK-LABEL: Pass Arguments:
6; CHECK-NEXT: Target Library Information
7; CHECK-NEXT: Target Pass Configuration
8; CHECK-NEXT: Machine Module Information
9; CHECK-NEXT: Target Transform Information
10; CHECK-NEXT: Assumption Cache Tracker
11; CHECK-NEXT: Type-Based Alias Analysis
12; CHECK-NEXT: Scoped NoAlias Alias Analysis
13; CHECK-NEXT: Create Garbage Collector Module Metadata
14; CHECK-NEXT: Profile summary info
15; CHECK-NEXT: Machine Branch Probability Analysis
16; CHECK-NEXT: ModulePass Manager
17; CHECK-NEXT: Pre-ISel Intrinsic Lowering
18; CHECK-NEXT: FunctionPass Manager
19; CHECK-NEXT: Expand Atomic instructions
20; CHECK-NEXT: Simplify the CFG
21; CHECK-NEXT: Dominator Tree Construction
22; CHECK-NEXT: Natural Loop Information
23; CHECK-NEXT: Lazy Branch Probability Analysis
24; CHECK-NEXT: Lazy Block Frequency Analysis
25; CHECK-NEXT: Optimization Remark Emitter
26; CHECK-NEXT: Scalar Evolution Analysis
27; CHECK-NEXT: Loop Data Prefetch
28; CHECK-NEXT: Falkor HW Prefetch Fix
29; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)
30; CHECK-NEXT: Module Verifier
31; CHECK-NEXT: Canonicalize natural loops
32; CHECK-NEXT: Loop Pass Manager
33; CHECK-NEXT: Induction Variable Users
34; CHECK-NEXT: Loop Strength Reduction
Christy Leee9437482018-09-24 20:47:12 +0000[diff] [blame]35; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)
36; CHECK-NEXT: Function Alias Analysis Results
Michael Zolotukhin35203312018-03-22 23:02:48 +0000[diff] [blame]37; CHECK-NEXT: Merge contiguous icmps into a memcmp
38; CHECK-NEXT: Expand memcmp() to load/stores
39; CHECK-NEXT: Lower Garbage Collection Instructions
40; CHECK-NEXT: Shadow Stack GC Lowering
41; CHECK-NEXT: Remove unreachable blocks from the CFG
42; CHECK-NEXT: Dominator Tree Construction
43; CHECK-NEXT: Natural Loop Information
44; CHECK-NEXT: Branch Probability Analysis
45; CHECK-NEXT: Block Frequency Analysis
46; CHECK-NEXT: Constant Hoisting
47; CHECK-NEXT: Partially inline calls to library functions
48; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)
49; CHECK-NEXT: Scalarize Masked Memory Intrinsics
50; CHECK-NEXT: Expand reduction intrinsics
51; CHECK-NEXT: Dominator Tree Construction
52; CHECK-NEXT: Interleaved Access Pass
53; CHECK-NEXT: Natural Loop Information
54; CHECK-NEXT: CodeGen Prepare
55; CHECK-NEXT: Rewrite Symbols
56; CHECK-NEXT: FunctionPass Manager
57; CHECK-NEXT: Dominator Tree Construction
58; CHECK-NEXT: Exception handling preparation
59; CHECK-NEXT: AArch64 Promote Constant
60; CHECK-NEXT: Unnamed pass: implement Pass::getPassName()
61; CHECK-NEXT: FunctionPass Manager
62; CHECK-NEXT: Merge internal globals
63; CHECK-NEXT: Safe Stack instrumentation pass
64; CHECK-NEXT: Insert stack protectors
65; CHECK-NEXT: Module Verifier
66; CHECK-NEXT: Dominator Tree Construction
67; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)
68; CHECK-NEXT: Function Alias Analysis Results
69; CHECK-NEXT: Natural Loop Information
70; CHECK-NEXT: Branch Probability Analysis
71; CHECK-NEXT: AArch64 Instruction Selection
72; CHECK-NEXT: MachineDominator Tree Construction
73; CHECK-NEXT: AArch64 Local Dynamic TLS Access Clean-up
74; CHECK-NEXT: Expand ISel Pseudo-instructions
75; CHECK-NEXT: Early Tail Duplication
76; CHECK-NEXT: Optimize machine instruction PHIs
77; CHECK-NEXT: Slot index numbering
78; CHECK-NEXT: Merge disjoint stack slots
79; CHECK-NEXT: Local Stack Slot Allocation
80; CHECK-NEXT: Remove dead machine instructions
81; CHECK-NEXT: MachineDominator Tree Construction
82; CHECK-NEXT: AArch64 Condition Optimizer
83; CHECK-NEXT: Machine Natural Loop Construction
84; CHECK-NEXT: Machine Trace Metrics
85; CHECK-NEXT: AArch64 Conditional Compares
86; CHECK-NEXT: Machine InstCombiner
87; CHECK-NEXT: AArch64 Conditional Branch Tuning
88; CHECK-NEXT: Machine Trace Metrics
89; CHECK-NEXT: Early If-Conversion
90; CHECK-NEXT: AArch64 Store Pair Suppression
91; CHECK-NEXT: AArch64 SIMD instructions optimization pass
92; CHECK-NEXT: MachineDominator Tree Construction
93; CHECK-NEXT: Machine Natural Loop Construction
94; CHECK-NEXT: Early Machine Loop Invariant Code Motion
95; CHECK-NEXT: Machine Common Subexpression Elimination
96; CHECK-NEXT: MachinePostDominator Tree Construction
97; CHECK-NEXT: Machine Block Frequency Analysis
98; CHECK-NEXT: Machine code sinking
99; CHECK-NEXT: Peephole Optimizations
100; CHECK-NEXT: Remove dead machine instructions
101; CHECK-NEXT: AArch64 Dead register definitions
102; CHECK-NEXT: Detect Dead Lanes
103; CHECK-NEXT: Process Implicit Definitions
104; CHECK-NEXT: Remove unreachable machine basic blocks
105; CHECK-NEXT: Live Variable Analysis
106; CHECK-NEXT: Eliminate PHI nodes for register allocation
107; CHECK-NEXT: Two-Address instruction pass
108; CHECK-NEXT: Slot index numbering
109; CHECK-NEXT: Live Interval Analysis
110; CHECK-NEXT: Simple Register Coalescing
111; CHECK-NEXT: Rename Disconnected Subregister Components
112; CHECK-NEXT: Machine Instruction Scheduler
113; CHECK-NEXT: Machine Block Frequency Analysis
114; CHECK-NEXT: Debug Variable Analysis
115; CHECK-NEXT: Live Stack Slot Analysis
116; CHECK-NEXT: Virtual Register Map
117; CHECK-NEXT: Live Register Matrix
118; CHECK-NEXT: Bundle Machine CFG Edges
119; CHECK-NEXT: Spill Code Placement Analysis
120; CHECK-NEXT: Lazy Machine Block Frequency Analysis
121; CHECK-NEXT: Machine Optimization Remark Emitter
122; CHECK-NEXT: Greedy Register Allocator
123; CHECK-NEXT: Virtual Register Rewriter
124; CHECK-NEXT: Stack Slot Coloring
125; CHECK-NEXT: Machine Copy Propagation Pass
126; CHECK-NEXT: Machine Loop Invariant Code Motion
127; CHECK-NEXT: AArch64 Redundant Copy Elimination
128; CHECK-NEXT: A57 FP Anti-dependency breaker
129; CHECK-NEXT: PostRA Machine Sink
130; CHECK-NEXT: MachineDominator Tree Construction
131; CHECK-NEXT: Machine Natural Loop Construction
132; CHECK-NEXT: Machine Block Frequency Analysis
133; CHECK-NEXT: MachinePostDominator Tree Construction
Michael Zolotukhin35203312018-03-22 23:02:48 +0000[diff] [blame]134; CHECK-NEXT: Lazy Machine Block Frequency Analysis
135; CHECK-NEXT: Machine Optimization Remark Emitter
Francis Visoiu Mistrihca69b3b2018-06-05 00:27:24 +0000[diff] [blame]136; CHECK-NEXT: Shrink Wrapping analysis
Michael Zolotukhin35203312018-03-22 23:02:48 +0000[diff] [blame]137; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization
138; CHECK-NEXT: Control Flow Optimizer
139; CHECK-NEXT: Tail Duplication
140; CHECK-NEXT: Machine Copy Propagation Pass
141; CHECK-NEXT: Post-RA pseudo instruction expansion pass
142; CHECK-NEXT: AArch64 pseudo instruction expansion pass
143; CHECK-NEXT: AArch64 load / store optimization pass
144; CHECK-NEXT: MachineDominator Tree Construction
145; CHECK-NEXT: Machine Natural Loop Construction
146; CHECK-NEXT: Falkor HW Prefetch Fix Late Phase
Michael Zolotukhin35203312018-03-22 23:02:48 +0000[diff] [blame]147; CHECK-NEXT: PostRA Machine Instruction Scheduler
148; CHECK-NEXT: Analyze Machine Code For Garbage Collection
149; CHECK-NEXT: Machine Block Frequency Analysis
150; CHECK-NEXT: MachinePostDominator Tree Construction
151; CHECK-NEXT: Branch Probability Basic Block Placement
152; CHECK-NEXT: Branch relaxation pass
153; CHECK-NEXT: Contiguously Lay Out Funclets
154; CHECK-NEXT: StackMap Liveness Analysis
155; CHECK-NEXT: Live DEBUG_VALUE analysis
156; CHECK-NEXT: Insert fentry calls
157; CHECK-NEXT: Insert XRay ops
158; CHECK-NEXT: Implement the 'patchable-function' attribute
Jessica Paquettef90edbe2018-07-27 20:18:27 +0000[diff] [blame]159; CHECK-NEXT: Machine Outliner
160; CHECK-NEXT: FunctionPass Manager
Michael Zolotukhin35203312018-03-22 23:02:48 +0000[diff] [blame]161; CHECK-NEXT: Lazy Machine Block Frequency Analysis
162; CHECK-NEXT: Machine Optimization Remark Emitter
Michael Zolotukhin35203312018-03-22 23:02:48 +0000[diff] [blame]163; CHECK-NEXT: AArch64 Assembly Printer
164; CHECK-NEXT: Free MachineFunction
165; CHECK-NEXT: Pass Arguments: -domtree
166; CHECK-NEXT: FunctionPass Manager
167; CHECK-NEXT: Dominator Tree Construction
168
169define void @f() {
170 ret void
171}