blob: bd89502d7b829e408ea55b527bec1054a84cc37d [file] [log] [blame]
Matt Arsenault6689abe2016-05-05 20:07:37 +00001; RUN: llc < %s -march=amdgcn | FileCheck %s -check-prefix=SI -check-prefix=FUNC
2; RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s -check-prefix=SI -check-prefix=FUNC
3; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s -check-prefix=EG -check-prefix=FUNC
Tom Stellard75aadc22012-12-11 21:25:42 +00004
Tom Stellard3dbf1f82014-05-02 15:41:47 +00005;FUNC-LABEL: test
6;EG: MULADD_IEEE *
7;EG: FRACT *
8;EG: ADD *
9;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
10;EG-NOT: COS
Tom Stellard326d6ec2014-11-05 14:50:53 +000011;SI: v_cos_f32
12;SI-NOT: v_cos_f32
Tom Stellard75aadc22012-12-11 21:25:42 +000013
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000014define amdgpu_kernel void @test(float addrspace(1)* %out, float %x) #1 {
Tom Stellard3dbf1f82014-05-02 15:41:47 +000015 %cos = call float @llvm.cos.f32(float %x)
16 store float %cos, float addrspace(1)* %out
17 ret void
18}
19
20;FUNC-LABEL: testv
21;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
22;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
23;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
24;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
25;EG-NOT: COS
Tom Stellard326d6ec2014-11-05 14:50:53 +000026;SI: v_cos_f32
27;SI: v_cos_f32
28;SI: v_cos_f32
29;SI: v_cos_f32
30;SI-NOT: v_cos_f32
Tom Stellard3dbf1f82014-05-02 15:41:47 +000031
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000032define amdgpu_kernel void @testv(<4 x float> addrspace(1)* %out, <4 x float> inreg %vx) #1 {
Tom Stellard3dbf1f82014-05-02 15:41:47 +000033 %cos = call <4 x float> @llvm.cos.v4f32(<4 x float> %vx)
34 store <4 x float> %cos, <4 x float> addrspace(1)* %out
Tom Stellard75aadc22012-12-11 21:25:42 +000035 ret void
36}
37
38declare float @llvm.cos.f32(float) readnone
Tom Stellard3dbf1f82014-05-02 15:41:47 +000039declare <4 x float> @llvm.cos.v4f32(<4 x float>) readnone