blob: 158a49ac6a03368a848625c90ee66f05b5a9ce4b [file] [log] [blame]
Krzysztof Parzyszek046090d2018-03-12 14:01:28 +00001; RUN: llc -march=hexagon -enable-pipeliner < %s
2; REQUIRES: asserts
3
4; Make sure we fix up the Phis when we connect the last
5; epilog block to the CFG.
6
7define void @f0(i16* nocapture %a0) #0 {
8b0:
9 br i1 undef, label %b1, label %b2
10
11b1: ; preds = %b0
12 br label %b3
13
14b2: ; preds = %b0
15 unreachable
16
17b3: ; preds = %b3, %b1
18 br i1 undef, label %b4, label %b3
19
20b4: ; preds = %b3
21 br i1 undef, label %b6, label %b5
22
23b5: ; preds = %b4
24 store i16 4096, i16* %a0, align 2
25 br label %b11
26
27b6: ; preds = %b4
28 br i1 undef, label %b7, label %b8
29
30b7: ; preds = %b7, %b6
31 br label %b7
32
33b8: ; preds = %b8, %b6
34 br i1 undef, label %b9, label %b8
35
36b9: ; preds = %b8
37 %v0 = icmp sgt i32 undef, 1
38 br i1 %v0, label %b10, label %b11
39
40b10: ; preds = %b10, %b9
41 %v1 = phi i32 [ %v8, %b10 ], [ 1, %b9 ]
42 %v2 = getelementptr inbounds [11 x i32], [11 x i32]* undef, i32 0, i32 %v1
43 %v3 = load i32, i32* undef, align 4
44 %v4 = add nsw i32 %v3, 0
45 %v5 = add nsw i32 %v4, 2048
46 %v6 = lshr i32 %v5, 12
47 %v7 = trunc i32 %v6 to i16
48 store i16 %v7, i16* undef, align 2
49 %v8 = add nsw i32 %v1, 1
50 %v9 = icmp eq i32 %v8, undef
51 br i1 %v9, label %b11, label %b10
52
53b11: ; preds = %b10, %b9, %b5
54 %v10 = phi i1 [ false, %b9 ], [ false, %b5 ], [ %v0, %b10 ]
55 br i1 undef, label %b16, label %b12
56
57b12: ; preds = %b11
58 br i1 undef, label %b13, label %b16
59
60b13: ; preds = %b12
61 br i1 %v10, label %b14, label %b15
62
63b14: ; preds = %b14, %b13
64 br i1 undef, label %b15, label %b14
65
66b15: ; preds = %b14, %b13
67 br label %b16
68
69b16: ; preds = %b15, %b12, %b11
70 ret void
71}
72
73attributes #0 = { nounwind "target-cpu"="hexagonv55" }