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gerrit-public.fairphone.software / toolchain / llvm-project / c066a92657a78f13b5e490e1b51c11d740671de0 / . / llvm / test / CodeGen / MSP430 / setcc.ll
blob: 6e2ec8ea3ea1dade9979e54b40fb3c78869b47d2 [file] [log] [blame]
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]1; RUN: llc -march=msp430 < %s | FileCheck %s
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]2target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
3target triple = "msp430-generic-generic"
4
5define i16 @sccweqand(i16 %a, i16 %b) nounwind {
6 %t1 = and i16 %a, %b
7 %t2 = icmp eq i16 %t1, 0
8 %t3 = zext i1 %t2 to i16
9 ret i16 %t3
10}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]11; CHECK-LABEL: sccweqand:
Vadzim Dambrouskieafb8052017-03-02 20:25:10 +0000[diff] [blame]12; CHECK: bit.w r13, r12
13; CHECK: mov.w r2, r12
14; CHECK: rra.w r12
15; CHECK: and.w #1, r12
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]16
17define i16 @sccwneand(i16 %a, i16 %b) nounwind {
18 %t1 = and i16 %a, %b
19 %t2 = icmp ne i16 %t1, 0
20 %t3 = zext i1 %t2 to i16
21 ret i16 %t3
22}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]23; CHECK-LABEL: sccwneand:
Vadzim Dambrouskieafb8052017-03-02 20:25:10 +0000[diff] [blame]24; CHECK: bit.w r13, r12
25; CHECK: mov.w r2, r12
26; CHECK: and.w #1, r12
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]27
28define i16 @sccwne(i16 %a, i16 %b) nounwind {
29 %t1 = icmp ne i16 %a, %b
30 %t2 = zext i1 %t1 to i16
31 ret i16 %t2
32}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]33; CHECK-LABEL:sccwne:
Vadzim Dambrouskieafb8052017-03-02 20:25:10 +0000[diff] [blame]34; CHECK: cmp.w r13, r12
35; CHECK: mov.w r2, r13
36; CHECK: rra.w r13
37; CHECK: mov.w #1, r12
38; CHECK: bic.w r13, r12
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]39
40define i16 @sccweq(i16 %a, i16 %b) nounwind {
41 %t1 = icmp eq i16 %a, %b
42 %t2 = zext i1 %t1 to i16
43 ret i16 %t2
44}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]45; CHECK-LABEL:sccweq:
Vadzim Dambrouskieafb8052017-03-02 20:25:10 +0000[diff] [blame]46; CHECK: cmp.w r13, r12
47; CHECK: mov.w r2, r12
48; CHECK: rra.w r12
49; CHECK: and.w #1, r12
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]50
51define i16 @sccwugt(i16 %a, i16 %b) nounwind {
52 %t1 = icmp ugt i16 %a, %b
53 %t2 = zext i1 %t1 to i16
54 ret i16 %t2
55}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]56; CHECK-LABEL:sccwugt:
Vadzim Dambrouskieafb8052017-03-02 20:25:10 +0000[diff] [blame]57; CHECK: cmp.w r12, r13
58; CHECK: mov.w #1, r12
59; CHECK: bic.w r2, r12
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]60
61define i16 @sccwuge(i16 %a, i16 %b) nounwind {
62 %t1 = icmp uge i16 %a, %b
63 %t2 = zext i1 %t1 to i16
64 ret i16 %t2
65}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]66; CHECK-LABEL:sccwuge:
Vadzim Dambrouskieafb8052017-03-02 20:25:10 +0000[diff] [blame]67; CHECK: cmp.w r13, r12
68; CHECK: mov.w r2, r12
69; CHECK: and.w #1, r12
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]70
71define i16 @sccwult(i16 %a, i16 %b) nounwind {
72 %t1 = icmp ult i16 %a, %b
73 %t2 = zext i1 %t1 to i16
74 ret i16 %t2
75}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]76; CHECK-LABEL:sccwult:
Vadzim Dambrouskieafb8052017-03-02 20:25:10 +0000[diff] [blame]77; CHECK: cmp.w r13, r12
78; CHECK: mov.w #1, r12
79; CHECK: bic.w r2, r12
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]80
81define i16 @sccwule(i16 %a, i16 %b) nounwind {
82 %t1 = icmp ule i16 %a, %b
83 %t2 = zext i1 %t1 to i16
84 ret i16 %t2
85}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]86; CHECK-LABEL:sccwule:
Vadzim Dambrouskieafb8052017-03-02 20:25:10 +0000[diff] [blame]87; CHECK: cmp.w r12, r13
88; CHECK: mov.w r2, r12
89; CHECK: and.w #1, r12
Anton Korobeynikove27e0282009-12-11 23:01:29 +0000[diff] [blame]90
91define i16 @sccwsgt(i16 %a, i16 %b) nounwind {
92 %t1 = icmp sgt i16 %a, %b
93 %t2 = zext i1 %t1 to i16
94 ret i16 %t2
95}
96
97define i16 @sccwsge(i16 %a, i16 %b) nounwind {
98 %t1 = icmp sge i16 %a, %b
99 %t2 = zext i1 %t1 to i16
100 ret i16 %t2
101}
102
103define i16 @sccwslt(i16 %a, i16 %b) nounwind {
104 %t1 = icmp slt i16 %a, %b
105 %t2 = zext i1 %t1 to i16
106 ret i16 %t2
107}
108
109define i16 @sccwsle(i16 %a, i16 %b) nounwind {
110 %t1 = icmp sle i16 %a, %b
111 %t2 = zext i1 %t1 to i16
112 ret i16 %t2
113}
114