Matthias Braun | 710a4c1 | 2017-01-20 00:16:14 +0000 | [diff] [blame] | 1 | //===--- LiveRegUnits.cpp - Register Unit Set -----------------------------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | /// \file This file imlements the LiveRegUnits set. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "llvm/CodeGen/LiveRegUnits.h" |
| 15 | #include "llvm/CodeGen/MachineFrameInfo.h" |
| 16 | #include "llvm/CodeGen/MachineFunction.h" |
| 17 | #include "llvm/CodeGen/MachineInstrBundle.h" |
| 18 | using namespace llvm; |
| 19 | |
| 20 | void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) { |
| 21 | for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) { |
| 22 | for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) { |
| 23 | if (MachineOperand::clobbersPhysReg(RegMask, *RootReg)) |
| 24 | Units.reset(U); |
| 25 | } |
| 26 | } |
| 27 | } |
| 28 | |
Matthias Braun | 28eae8f | 2017-01-21 02:21:04 +0000 | [diff] [blame] | 29 | void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) { |
| 30 | for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) { |
| 31 | for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) { |
| 32 | if (MachineOperand::clobbersPhysReg(RegMask, *RootReg)) |
| 33 | Units.set(U); |
| 34 | } |
| 35 | } |
| 36 | } |
| 37 | |
Matthias Braun | 710a4c1 | 2017-01-20 00:16:14 +0000 | [diff] [blame] | 38 | void LiveRegUnits::stepBackward(const MachineInstr &MI) { |
| 39 | // Remove defined registers and regmask kills from the set. |
| 40 | for (ConstMIBundleOperands O(MI); O.isValid(); ++O) { |
| 41 | if (O->isReg()) { |
| 42 | if (!O->isDef()) |
| 43 | continue; |
| 44 | unsigned Reg = O->getReg(); |
| 45 | if (!TargetRegisterInfo::isPhysicalRegister(Reg)) |
| 46 | continue; |
| 47 | removeReg(Reg); |
| 48 | } else if (O->isRegMask()) |
| 49 | removeRegsNotPreserved(O->getRegMask()); |
| 50 | } |
| 51 | |
| 52 | // Add uses to the set. |
| 53 | for (ConstMIBundleOperands O(MI); O.isValid(); ++O) { |
| 54 | if (!O->isReg() || !O->readsReg()) |
| 55 | continue; |
| 56 | unsigned Reg = O->getReg(); |
| 57 | if (!TargetRegisterInfo::isPhysicalRegister(Reg)) |
| 58 | continue; |
| 59 | addReg(Reg); |
| 60 | } |
| 61 | } |
| 62 | |
Matthias Braun | 28eae8f | 2017-01-21 02:21:04 +0000 | [diff] [blame] | 63 | void LiveRegUnits::accumulateBackward(const MachineInstr &MI) { |
| 64 | // Add defs, uses and regmask clobbers to the set. |
| 65 | for (ConstMIBundleOperands O(MI); O.isValid(); ++O) { |
| 66 | if (O->isReg()) { |
| 67 | unsigned Reg = O->getReg(); |
| 68 | if (!TargetRegisterInfo::isPhysicalRegister(Reg)) |
| 69 | continue; |
| 70 | if (!O->isDef() && !O->readsReg()) |
| 71 | continue; |
| 72 | addReg(Reg); |
| 73 | } else if (O->isRegMask()) |
| 74 | addRegsInMask(O->getRegMask()); |
| 75 | } |
| 76 | } |
| 77 | |
Matthias Braun | 710a4c1 | 2017-01-20 00:16:14 +0000 | [diff] [blame] | 78 | /// Add live-in registers of basic block \p MBB to \p LiveUnits. |
| 79 | static void addLiveIns(LiveRegUnits &LiveUnits, const MachineBasicBlock &MBB) { |
| 80 | for (const auto &LI : MBB.liveins()) |
| 81 | LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask); |
| 82 | } |
| 83 | |
| 84 | static void addLiveOuts(LiveRegUnits &LiveUnits, const MachineBasicBlock &MBB) { |
| 85 | // To get the live-outs we simply merge the live-ins of all successors. |
| 86 | for (const MachineBasicBlock *Succ : MBB.successors()) |
| 87 | addLiveIns(LiveUnits, *Succ); |
| 88 | } |
| 89 | |
| 90 | /// Add pristine registers to the given \p LiveUnits. This function removes |
| 91 | /// actually saved callee save registers when \p InPrologueEpilogue is false. |
| 92 | static void removeSavedRegs(LiveRegUnits &LiveUnits, const MachineFunction &MF, |
| 93 | const MachineFrameInfo &MFI, |
| 94 | const TargetRegisterInfo &TRI) { |
| 95 | for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo()) |
| 96 | LiveUnits.removeReg(Info.getReg()); |
| 97 | } |
| 98 | |
| 99 | void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) { |
| 100 | const MachineFunction &MF = *MBB.getParent(); |
| 101 | const MachineFrameInfo &MFI = MF.getFrameInfo(); |
| 102 | if (MFI.isCalleeSavedInfoValid()) { |
| 103 | for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) |
| 104 | addReg(*I); |
| 105 | if (!MBB.isReturnBlock()) |
| 106 | removeSavedRegs(*this, MF, MFI, *TRI); |
| 107 | } |
| 108 | ::addLiveOuts(*this, MBB); |
| 109 | } |
| 110 | |
| 111 | void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) { |
| 112 | const MachineFunction &MF = *MBB.getParent(); |
| 113 | const MachineFrameInfo &MFI = MF.getFrameInfo(); |
| 114 | if (MFI.isCalleeSavedInfoValid()) { |
| 115 | for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) |
| 116 | addReg(*I); |
| 117 | if (&MBB != &MF.front()) |
| 118 | removeSavedRegs(*this, MF, MFI, *TRI); |
| 119 | } |
| 120 | ::addLiveIns(*this, MBB); |
| 121 | } |