Nick Lewycky | c3890d2 | 2015-07-29 22:32:47 +0000 | [diff] [blame^] | 1 | //===-- ARMMachineFunctionInfo.h - ARM machine function info ----*- C++ -*-===// |
Jim Grosbach | f24f9d9 | 2009-08-11 15:33:49 +0000 | [diff] [blame] | 2 | // |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | f3ebc3f | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Jim Grosbach | f24f9d9 | 2009-08-11 15:33:49 +0000 | [diff] [blame] | 7 | // |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file declares ARM-specific per-machine-function information. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
Benjamin Kramer | a7c40ef | 2014-08-13 16:26:38 +0000 | [diff] [blame] | 14 | #ifndef LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H |
| 15 | #define LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 16 | |
| 17 | #include "ARMSubtarget.h" |
Evan Cheng | 677bb3b | 2007-03-01 07:52:44 +0000 | [diff] [blame] | 18 | #include "llvm/ADT/BitVector.h" |
Chandler Carruth | d990388 | 2015-01-14 11:23:27 +0000 | [diff] [blame] | 19 | #include "llvm/ADT/DenseMap.h" |
Chandler Carruth | 802d755 | 2012-12-04 07:12:27 +0000 | [diff] [blame] | 20 | #include "llvm/CodeGen/MachineFunction.h" |
| 21 | #include "llvm/Target/TargetMachine.h" |
| 22 | #include "llvm/Target/TargetRegisterInfo.h" |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 23 | |
| 24 | namespace llvm { |
| 25 | |
Bob Wilson | b7a3c42 | 2011-01-15 00:09:18 +0000 | [diff] [blame] | 26 | /// ARMFunctionInfo - This class is derived from MachineFunctionInfo and |
| 27 | /// contains private ARM-specific information for each MachineFunction. |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 28 | class ARMFunctionInfo : public MachineFunctionInfo { |
David Blaikie | a379b181 | 2011-12-20 02:50:00 +0000 | [diff] [blame] | 29 | virtual void anchor(); |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 30 | |
| 31 | /// isThumb - True if this function is compiled under Thumb mode. |
Dale Johannesen | ed0ecdb | 2007-04-23 20:07:25 +0000 | [diff] [blame] | 32 | /// Used to initialized Align, so must precede it. |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 33 | bool isThumb; |
| 34 | |
David Goodwin | 27303cd | 2009-06-30 18:04:13 +0000 | [diff] [blame] | 35 | /// hasThumb2 - True if the target architecture supports Thumb2. Do not use |
| 36 | /// to determine if function is compiled under Thumb mode, for that use |
| 37 | /// 'isThumb'. |
| 38 | bool hasThumb2; |
| 39 | |
Stepan Dyatkovskiy | d0e34a2 | 2013-05-20 08:01:34 +0000 | [diff] [blame] | 40 | /// StByValParamsPadding - For parameter that is split between |
| 41 | /// GPRs and memory; while recovering GPRs part, when |
Mark Seaborn | be266aa | 2014-02-16 18:59:48 +0000 | [diff] [blame] | 42 | /// StackAlignment > 4, and GPRs-part-size mod StackAlignment != 0, |
Stepan Dyatkovskiy | d0e34a2 | 2013-05-20 08:01:34 +0000 | [diff] [blame] | 43 | /// we need to insert gap before parameter start address. It allows to |
| 44 | /// "attach" GPR-part to the part that was passed via stack. |
| 45 | unsigned StByValParamsPadding; |
| 46 | |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 47 | /// VarArgsRegSaveSize - Size of the register save area for vararg functions. |
| 48 | /// |
Stepan Dyatkovskiy | f5aa83d | 2013-04-30 07:19:58 +0000 | [diff] [blame] | 49 | unsigned ArgRegsSaveSize; |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 50 | |
Jonathan Roelofs | ef84bda | 2014-08-05 21:32:21 +0000 | [diff] [blame] | 51 | /// ReturnRegsCount - Number of registers used up in the return. |
| 52 | unsigned ReturnRegsCount; |
| 53 | |
Evan Cheng | aa24f08 | 2007-01-20 02:09:25 +0000 | [diff] [blame] | 54 | /// HasStackFrame - True if this function has a stack frame. Set by |
JF Bastien | c8f48c1 | 2015-07-14 23:06:07 +0000 | [diff] [blame] | 55 | /// determineCalleeSaves(). |
Evan Cheng | aa24f08 | 2007-01-20 02:09:25 +0000 | [diff] [blame] | 56 | bool HasStackFrame; |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 57 | |
Evan Cheng | 3f251fb | 2010-08-10 19:30:19 +0000 | [diff] [blame] | 58 | /// RestoreSPFromFP - True if epilogue should restore SP from FP. Set by |
| 59 | /// emitPrologue. |
| 60 | bool RestoreSPFromFP; |
| 61 | |
Evan Cheng | 6f059e3 | 2007-03-01 08:26:31 +0000 | [diff] [blame] | 62 | /// LRSpilledForFarJump - True if the LR register has been for spilled to |
| 63 | /// enable far jump. |
| 64 | bool LRSpilledForFarJump; |
Evan Cheng | 43e8518 | 2007-01-29 22:22:24 +0000 | [diff] [blame] | 65 | |
Evan Cheng | aa24f08 | 2007-01-20 02:09:25 +0000 | [diff] [blame] | 66 | /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 67 | /// spill stack offset. |
| 68 | unsigned FramePtrSpillOffset; |
| 69 | |
Jim Grosbach | 0b7fda2 | 2010-11-02 17:35:25 +0000 | [diff] [blame] | 70 | /// GPRCS1Offset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved |
| 71 | /// register spills areas. For Mac OS X: |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 72 | /// |
Jim Grosbach | 0b7fda2 | 2010-11-02 17:35:25 +0000 | [diff] [blame] | 73 | /// GPR callee-saved (1) : r4, r5, r6, r7, lr |
| 74 | /// -------------------------------------------- |
| 75 | /// GPR callee-saved (2) : r8, r10, r11 |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 76 | /// -------------------------------------------- |
| 77 | /// DPR callee-saved : d8 - d15 |
Jakob Stoklund Olesen | 0965585 | 2011-12-23 00:36:18 +0000 | [diff] [blame] | 78 | /// |
| 79 | /// Also see AlignedDPRCSRegs below. Not all D-regs need to go in area 3. |
| 80 | /// Some may be spilled after the stack has been realigned. |
Jim Grosbach | 0b7fda2 | 2010-11-02 17:35:25 +0000 | [diff] [blame] | 81 | unsigned GPRCS1Offset; |
| 82 | unsigned GPRCS2Offset; |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 83 | unsigned DPRCSOffset; |
| 84 | |
Jim Grosbach | 0b7fda2 | 2010-11-02 17:35:25 +0000 | [diff] [blame] | 85 | /// GPRCS1Size, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills |
| 86 | /// areas. |
| 87 | unsigned GPRCS1Size; |
| 88 | unsigned GPRCS2Size; |
Tim Northover | 228c943 | 2014-11-05 00:27:13 +0000 | [diff] [blame] | 89 | unsigned DPRCSAlignGapSize; |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 90 | unsigned DPRCSSize; |
| 91 | |
Jakob Stoklund Olesen | 0965585 | 2011-12-23 00:36:18 +0000 | [diff] [blame] | 92 | /// NumAlignedDPRCS2Regs - The number of callee-saved DPRs that are saved in |
| 93 | /// the aligned portion of the stack frame. This is always a contiguous |
| 94 | /// sequence of D-registers starting from d8. |
| 95 | /// |
| 96 | /// We do not keep track of the frame indices used for these registers - they |
| 97 | /// behave like any other frame index in the aligned stack frame. These |
| 98 | /// registers also aren't included in DPRCSSize above. |
| 99 | unsigned NumAlignedDPRCS2Regs; |
| 100 | |
Evan Cheng | dfce83c | 2011-01-17 08:03:18 +0000 | [diff] [blame] | 101 | unsigned PICLabelUId; |
Evan Cheng | 454ff53 | 2008-11-08 00:51:41 +0000 | [diff] [blame] | 102 | |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 103 | /// VarArgsFrameIndex - FrameIndex for start of varargs area. |
| 104 | int VarArgsFrameIndex; |
| 105 | |
Evan Cheng | 2d51c7c | 2010-06-18 23:09:54 +0000 | [diff] [blame] | 106 | /// HasITBlocks - True if IT blocks have been inserted. |
| 107 | bool HasITBlocks; |
| 108 | |
Anton Korobeynikov | 221f4fa | 2011-01-30 22:07:39 +0000 | [diff] [blame] | 109 | /// CPEClones - Track constant pool entries clones created by Constant Island |
| 110 | /// pass. |
| 111 | DenseMap<unsigned, unsigned> CPEClones; |
| 112 | |
Jush Lu | 47172a0 | 2012-09-27 05:21:41 +0000 | [diff] [blame] | 113 | /// GlobalBaseReg - keeps track of the virtual register initialized for |
| 114 | /// use as the global base register. This is used for PIC in some PIC |
| 115 | /// relocation models. |
| 116 | unsigned GlobalBaseReg; |
| 117 | |
Oliver Stannard | b14c625 | 2014-04-02 16:10:33 +0000 | [diff] [blame] | 118 | /// ArgumentStackSize - amount of bytes on stack consumed by the arguments |
| 119 | /// being passed on the stack |
| 120 | unsigned ArgumentStackSize; |
| 121 | |
Chris Bieneman | 03695ab | 2014-07-15 17:18:41 +0000 | [diff] [blame] | 122 | /// CoalescedWeights - mapping of basic blocks to the rolling counter of |
| 123 | /// coalesced weights. |
| 124 | DenseMap<const MachineBasicBlock*, unsigned> CoalescedWeights; |
| 125 | |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 126 | public: |
| 127 | ARMFunctionInfo() : |
David Goodwin | 27303cd | 2009-06-30 18:04:13 +0000 | [diff] [blame] | 128 | isThumb(false), |
| 129 | hasThumb2(false), |
Jonathan Roelofs | ef84bda | 2014-08-05 21:32:21 +0000 | [diff] [blame] | 130 | ArgRegsSaveSize(0), ReturnRegsCount(0), HasStackFrame(false), |
| 131 | RestoreSPFromFP(false), |
Jim Grosbach | 534ea5a | 2009-10-08 01:50:26 +0000 | [diff] [blame] | 132 | LRSpilledForFarJump(false), |
Jim Grosbach | 0b7fda2 | 2010-11-02 17:35:25 +0000 | [diff] [blame] | 133 | FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0), |
Tim Northover | 228c943 | 2014-11-05 00:27:13 +0000 | [diff] [blame] | 134 | GPRCS1Size(0), GPRCS2Size(0), DPRCSAlignGapSize(0), DPRCSSize(0), |
Tim Northover | 4998a47 | 2015-05-13 20:28:38 +0000 | [diff] [blame] | 135 | NumAlignedDPRCS2Regs(0), PICLabelUId(0), |
Jush Lu | 47172a0 | 2012-09-27 05:21:41 +0000 | [diff] [blame] | 136 | VarArgsFrameIndex(0), HasITBlocks(false), GlobalBaseReg(0) {} |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 137 | |
Eric Christopher | 3d19f13 | 2014-06-18 22:48:09 +0000 | [diff] [blame] | 138 | explicit ARMFunctionInfo(MachineFunction &MF); |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 139 | |
| 140 | bool isThumbFunction() const { return isThumb; } |
David Goodwin | 22c2fba | 2009-07-08 23:10:31 +0000 | [diff] [blame] | 141 | bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; } |
David Goodwin | 27303cd | 2009-06-30 18:04:13 +0000 | [diff] [blame] | 142 | bool isThumb2Function() const { return isThumb && hasThumb2; } |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 143 | |
Stepan Dyatkovskiy | d0e34a2 | 2013-05-20 08:01:34 +0000 | [diff] [blame] | 144 | unsigned getStoredByValParamsPadding() const { return StByValParamsPadding; } |
| 145 | void setStoredByValParamsPadding(unsigned p) { StByValParamsPadding = p; } |
| 146 | |
Tim Northover | 8cda34f | 2015-03-11 18:54:22 +0000 | [diff] [blame] | 147 | unsigned getArgRegsSaveSize() const { return ArgRegsSaveSize; } |
Stepan Dyatkovskiy | f5aa83d | 2013-04-30 07:19:58 +0000 | [diff] [blame] | 148 | void setArgRegsSaveSize(unsigned s) { ArgRegsSaveSize = s; } |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 149 | |
Jonathan Roelofs | ef84bda | 2014-08-05 21:32:21 +0000 | [diff] [blame] | 150 | unsigned getReturnRegsCount() const { return ReturnRegsCount; } |
| 151 | void setReturnRegsCount(unsigned s) { ReturnRegsCount = s; } |
| 152 | |
Evan Cheng | aa24f08 | 2007-01-20 02:09:25 +0000 | [diff] [blame] | 153 | bool hasStackFrame() const { return HasStackFrame; } |
| 154 | void setHasStackFrame(bool s) { HasStackFrame = s; } |
Evan Cheng | 43e8518 | 2007-01-29 22:22:24 +0000 | [diff] [blame] | 155 | |
Evan Cheng | 3f251fb | 2010-08-10 19:30:19 +0000 | [diff] [blame] | 156 | bool shouldRestoreSPFromFP() const { return RestoreSPFromFP; } |
| 157 | void setShouldRestoreSPFromFP(bool s) { RestoreSPFromFP = s; } |
| 158 | |
Evan Cheng | 6f059e3 | 2007-03-01 08:26:31 +0000 | [diff] [blame] | 159 | bool isLRSpilledForFarJump() const { return LRSpilledForFarJump; } |
| 160 | void setLRIsSpilledForFarJump(bool s) { LRSpilledForFarJump = s; } |
Evan Cheng | 43e8518 | 2007-01-29 22:22:24 +0000 | [diff] [blame] | 161 | |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 162 | unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; } |
| 163 | void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; } |
Jim Grosbach | f24f9d9 | 2009-08-11 15:33:49 +0000 | [diff] [blame] | 164 | |
Jakob Stoklund Olesen | 0965585 | 2011-12-23 00:36:18 +0000 | [diff] [blame] | 165 | unsigned getNumAlignedDPRCS2Regs() const { return NumAlignedDPRCS2Regs; } |
| 166 | void setNumAlignedDPRCS2Regs(unsigned n) { NumAlignedDPRCS2Regs = n; } |
| 167 | |
Jim Grosbach | 0b7fda2 | 2010-11-02 17:35:25 +0000 | [diff] [blame] | 168 | unsigned getGPRCalleeSavedArea1Offset() const { return GPRCS1Offset; } |
| 169 | unsigned getGPRCalleeSavedArea2Offset() const { return GPRCS2Offset; } |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 170 | unsigned getDPRCalleeSavedAreaOffset() const { return DPRCSOffset; } |
| 171 | |
Jim Grosbach | 0b7fda2 | 2010-11-02 17:35:25 +0000 | [diff] [blame] | 172 | void setGPRCalleeSavedArea1Offset(unsigned o) { GPRCS1Offset = o; } |
| 173 | void setGPRCalleeSavedArea2Offset(unsigned o) { GPRCS2Offset = o; } |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 174 | void setDPRCalleeSavedAreaOffset(unsigned o) { DPRCSOffset = o; } |
| 175 | |
Jim Grosbach | 0b7fda2 | 2010-11-02 17:35:25 +0000 | [diff] [blame] | 176 | unsigned getGPRCalleeSavedArea1Size() const { return GPRCS1Size; } |
| 177 | unsigned getGPRCalleeSavedArea2Size() const { return GPRCS2Size; } |
Tim Northover | 228c943 | 2014-11-05 00:27:13 +0000 | [diff] [blame] | 178 | unsigned getDPRCalleeSavedGapSize() const { return DPRCSAlignGapSize; } |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 179 | unsigned getDPRCalleeSavedAreaSize() const { return DPRCSSize; } |
| 180 | |
Jim Grosbach | 0b7fda2 | 2010-11-02 17:35:25 +0000 | [diff] [blame] | 181 | void setGPRCalleeSavedArea1Size(unsigned s) { GPRCS1Size = s; } |
| 182 | void setGPRCalleeSavedArea2Size(unsigned s) { GPRCS2Size = s; } |
Tim Northover | 228c943 | 2014-11-05 00:27:13 +0000 | [diff] [blame] | 183 | void setDPRCalleeSavedGapSize(unsigned s) { DPRCSAlignGapSize = s; } |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 184 | void setDPRCalleeSavedAreaSize(unsigned s) { DPRCSSize = s; } |
| 185 | |
Oliver Stannard | b14c625 | 2014-04-02 16:10:33 +0000 | [diff] [blame] | 186 | unsigned getArgumentStackSize() const { return ArgumentStackSize; } |
| 187 | void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; } |
| 188 | |
Evan Cheng | dfce83c | 2011-01-17 08:03:18 +0000 | [diff] [blame] | 189 | void initPICLabelUId(unsigned UId) { |
| 190 | PICLabelUId = UId; |
Evan Cheng | 454ff53 | 2008-11-08 00:51:41 +0000 | [diff] [blame] | 191 | } |
| 192 | |
Evan Cheng | dfce83c | 2011-01-17 08:03:18 +0000 | [diff] [blame] | 193 | unsigned getNumPICLabels() const { |
| 194 | return PICLabelUId; |
Evan Cheng | 454ff53 | 2008-11-08 00:51:41 +0000 | [diff] [blame] | 195 | } |
| 196 | |
Evan Cheng | dfce83c | 2011-01-17 08:03:18 +0000 | [diff] [blame] | 197 | unsigned createPICLabelUId() { |
| 198 | return PICLabelUId++; |
Evan Cheng | 454ff53 | 2008-11-08 00:51:41 +0000 | [diff] [blame] | 199 | } |
Dan Gohman | 31ae586 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 200 | |
| 201 | int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } |
| 202 | void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; } |
Evan Cheng | 2d51c7c | 2010-06-18 23:09:54 +0000 | [diff] [blame] | 203 | |
| 204 | bool hasITBlocks() const { return HasITBlocks; } |
| 205 | void setHasITBlocks(bool h) { HasITBlocks = h; } |
Anton Korobeynikov | 221f4fa | 2011-01-30 22:07:39 +0000 | [diff] [blame] | 206 | |
Jush Lu | 47172a0 | 2012-09-27 05:21:41 +0000 | [diff] [blame] | 207 | unsigned getGlobalBaseReg() const { return GlobalBaseReg; } |
| 208 | void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; } |
| 209 | |
Anton Korobeynikov | 221f4fa | 2011-01-30 22:07:39 +0000 | [diff] [blame] | 210 | void recordCPEClone(unsigned CPIdx, unsigned CPCloneIdx) { |
| 211 | if (!CPEClones.insert(std::make_pair(CPCloneIdx, CPIdx)).second) |
Craig Topper | 2a30d78 | 2014-06-18 05:05:13 +0000 | [diff] [blame] | 212 | llvm_unreachable("Duplicate entries!"); |
Anton Korobeynikov | 221f4fa | 2011-01-30 22:07:39 +0000 | [diff] [blame] | 213 | } |
| 214 | |
| 215 | unsigned getOriginalCPIdx(unsigned CloneIdx) const { |
| 216 | DenseMap<unsigned, unsigned>::const_iterator I = CPEClones.find(CloneIdx); |
| 217 | if (I != CPEClones.end()) |
| 218 | return I->second; |
| 219 | else |
| 220 | return -1U; |
| 221 | } |
Chris Bieneman | 03695ab | 2014-07-15 17:18:41 +0000 | [diff] [blame] | 222 | |
| 223 | DenseMap<const MachineBasicBlock*, unsigned>::iterator getCoalescedWeight( |
| 224 | MachineBasicBlock* MBB) { |
| 225 | auto It = CoalescedWeights.find(MBB); |
| 226 | if (It == CoalescedWeights.end()) { |
| 227 | It = CoalescedWeights.insert(std::make_pair(MBB, 0)).first; |
| 228 | } |
| 229 | return It; |
| 230 | } |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 231 | }; |
Alexander Kornienko | f00654e | 2015-06-23 09:49:53 +0000 | [diff] [blame] | 232 | } // End llvm namespace |
Evan Cheng | 10043e2 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 233 | |
Benjamin Kramer | a7c40ef | 2014-08-13 16:26:38 +0000 | [diff] [blame] | 234 | #endif |