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gerrit-public.fairphone.software / toolchain / llvm-project / c398cd53aa524f517db0d6808339bca406d1c769 / . / llvm / test / CodeGen / AArch64 / callee-save.ll
blob: 18d2d82ed80af9a5603d5aa9a4604e33731b25db [file] [log] [blame]
Tim Northovere3d42362013-02-01 11:40:47 +0000[diff] [blame]1; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame^]2; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64 | FileCheck %s --check-prefix=CHECK-ARM64
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]3
4@var = global float 0.0
5
6define void @foo() {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]7; CHECK-LABEL: foo:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]8
Benjamin Kramer01b75cc2013-03-09 18:25:40 +0000[diff] [blame]9; CHECK: stp d14, d15, [sp
10; CHECK: stp d12, d13, [sp
11; CHECK: stp d10, d11, [sp
12; CHECK: stp d8, d9, [sp
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]13
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame^]14; CHECK-ARM64: stp d15, d14, [sp
15; CHECK-ARM64: stp d13, d12, [sp
16; CHECK-ARM64: stp d11, d10, [sp
17; CHECK-ARM64: stp d9, d8, [sp
18
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]19 ; Create lots of live variables to exhaust the supply of
20 ; caller-saved registers
21 %val1 = load volatile float* @var
22 %val2 = load volatile float* @var
23 %val3 = load volatile float* @var
24 %val4 = load volatile float* @var
25 %val5 = load volatile float* @var
26 %val6 = load volatile float* @var
27 %val7 = load volatile float* @var
28 %val8 = load volatile float* @var
29 %val9 = load volatile float* @var
30 %val10 = load volatile float* @var
31 %val11 = load volatile float* @var
32 %val12 = load volatile float* @var
33 %val13 = load volatile float* @var
34 %val14 = load volatile float* @var
35 %val15 = load volatile float* @var
36 %val16 = load volatile float* @var
37 %val17 = load volatile float* @var
38 %val18 = load volatile float* @var
39 %val19 = load volatile float* @var
40 %val20 = load volatile float* @var
41 %val21 = load volatile float* @var
42 %val22 = load volatile float* @var
43 %val23 = load volatile float* @var
44 %val24 = load volatile float* @var
45 %val25 = load volatile float* @var
46 %val26 = load volatile float* @var
47 %val27 = load volatile float* @var
48 %val28 = load volatile float* @var
49 %val29 = load volatile float* @var
50 %val30 = load volatile float* @var
51 %val31 = load volatile float* @var
52 %val32 = load volatile float* @var
53
54 store volatile float %val1, float* @var
55 store volatile float %val2, float* @var
56 store volatile float %val3, float* @var
57 store volatile float %val4, float* @var
58 store volatile float %val5, float* @var
59 store volatile float %val6, float* @var
60 store volatile float %val7, float* @var
61 store volatile float %val8, float* @var
62 store volatile float %val9, float* @var
63 store volatile float %val10, float* @var
64 store volatile float %val11, float* @var
65 store volatile float %val12, float* @var
66 store volatile float %val13, float* @var
67 store volatile float %val14, float* @var
68 store volatile float %val15, float* @var
69 store volatile float %val16, float* @var
70 store volatile float %val17, float* @var
71 store volatile float %val18, float* @var
72 store volatile float %val19, float* @var
73 store volatile float %val20, float* @var
74 store volatile float %val21, float* @var
75 store volatile float %val22, float* @var
76 store volatile float %val23, float* @var
77 store volatile float %val24, float* @var
78 store volatile float %val25, float* @var
79 store volatile float %val26, float* @var
80 store volatile float %val27, float* @var
81 store volatile float %val28, float* @var
82 store volatile float %val29, float* @var
83 store volatile float %val30, float* @var
84 store volatile float %val31, float* @var
85 store volatile float %val32, float* @var
86
87; CHECK: ldp d8, d9, [sp
88; CHECK: ldp d10, d11, [sp
89; CHECK: ldp d12, d13, [sp
90; CHECK: ldp d14, d15, [sp
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame^]91
92; CHECK-ARM64: ldp d9, d8, [sp
93; CHECK-ARM64: ldp d11, d10, [sp
94; CHECK-ARM64: ldp d13, d12, [sp
95; CHECK-ARM64: ldp d15, d14, [sp
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]96 ret void
97}