Richard Sandiford | f834ea1 | 2013-10-31 12:14:17 +0000 | [diff] [blame] | 1 | ; Test 64-bit floating-point comparison. The tests assume a z10 implementation |
| 2 | ; of select, using conditional branches rather than LOCGR. |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 3 | ; |
Richard Sandiford | f834ea1 | 2013-10-31 12:14:17 +0000 | [diff] [blame] | 4 | ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 5 | |
Richard Sandiford | ed1fab6 | 2013-07-03 10:10:02 +0000 | [diff] [blame] | 6 | declare double @foo() |
| 7 | |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 8 | ; Check comparison with registers. |
| 9 | define i64 @f1(i64 %a, i64 %b, double %f1, double %f2) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 10 | ; CHECK-LABEL: f1: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 11 | ; CHECK: cdbr %f0, %f2 |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 12 | ; CHECK-NEXT: je |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 13 | ; CHECK: lgr %r2, %r3 |
| 14 | ; CHECK: br %r14 |
| 15 | %cond = fcmp oeq double %f1, %f2 |
| 16 | %res = select i1 %cond, i64 %a, i64 %b |
| 17 | ret i64 %res |
| 18 | } |
| 19 | |
| 20 | ; Check the low end of the CDB range. |
| 21 | define i64 @f2(i64 %a, i64 %b, double %f1, double *%ptr) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 22 | ; CHECK-LABEL: f2: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 23 | ; CHECK: cdb %f0, 0(%r4) |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 24 | ; CHECK-NEXT: je |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 25 | ; CHECK: lgr %r2, %r3 |
| 26 | ; CHECK: br %r14 |
| 27 | %f2 = load double *%ptr |
| 28 | %cond = fcmp oeq double %f1, %f2 |
| 29 | %res = select i1 %cond, i64 %a, i64 %b |
| 30 | ret i64 %res |
| 31 | } |
| 32 | |
| 33 | ; Check the high end of the aligned CDB range. |
| 34 | define i64 @f3(i64 %a, i64 %b, double %f1, double *%base) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 35 | ; CHECK-LABEL: f3: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 36 | ; CHECK: cdb %f0, 4088(%r4) |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 37 | ; CHECK-NEXT: je |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 38 | ; CHECK: lgr %r2, %r3 |
| 39 | ; CHECK: br %r14 |
| 40 | %ptr = getelementptr double *%base, i64 511 |
| 41 | %f2 = load double *%ptr |
| 42 | %cond = fcmp oeq double %f1, %f2 |
| 43 | %res = select i1 %cond, i64 %a, i64 %b |
| 44 | ret i64 %res |
| 45 | } |
| 46 | |
| 47 | ; Check the next doubleword up, which needs separate address logic. |
| 48 | ; Other sequences besides this one would be OK. |
| 49 | define i64 @f4(i64 %a, i64 %b, double %f1, double *%base) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 50 | ; CHECK-LABEL: f4: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 51 | ; CHECK: aghi %r4, 4096 |
| 52 | ; CHECK: cdb %f0, 0(%r4) |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 53 | ; CHECK-NEXT: je |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 54 | ; CHECK: lgr %r2, %r3 |
| 55 | ; CHECK: br %r14 |
| 56 | %ptr = getelementptr double *%base, i64 512 |
| 57 | %f2 = load double *%ptr |
| 58 | %cond = fcmp oeq double %f1, %f2 |
| 59 | %res = select i1 %cond, i64 %a, i64 %b |
| 60 | ret i64 %res |
| 61 | } |
| 62 | |
| 63 | ; Check negative displacements, which also need separate address logic. |
| 64 | define i64 @f5(i64 %a, i64 %b, double %f1, double *%base) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 65 | ; CHECK-LABEL: f5: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 66 | ; CHECK: aghi %r4, -8 |
| 67 | ; CHECK: cdb %f0, 0(%r4) |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 68 | ; CHECK-NEXT: je |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 69 | ; CHECK: lgr %r2, %r3 |
| 70 | ; CHECK: br %r14 |
| 71 | %ptr = getelementptr double *%base, i64 -1 |
| 72 | %f2 = load double *%ptr |
| 73 | %cond = fcmp oeq double %f1, %f2 |
| 74 | %res = select i1 %cond, i64 %a, i64 %b |
| 75 | ret i64 %res |
| 76 | } |
| 77 | |
| 78 | ; Check that CDB allows indices. |
| 79 | define i64 @f6(i64 %a, i64 %b, double %f1, double *%base, i64 %index) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 80 | ; CHECK-LABEL: f6: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 81 | ; CHECK: sllg %r1, %r5, 3 |
| 82 | ; CHECK: cdb %f0, 800(%r1,%r4) |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 83 | ; CHECK-NEXT: je |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 84 | ; CHECK: lgr %r2, %r3 |
| 85 | ; CHECK: br %r14 |
| 86 | %ptr1 = getelementptr double *%base, i64 %index |
| 87 | %ptr2 = getelementptr double *%ptr1, i64 100 |
| 88 | %f2 = load double *%ptr2 |
| 89 | %cond = fcmp oeq double %f1, %f2 |
| 90 | %res = select i1 %cond, i64 %a, i64 %b |
| 91 | ret i64 %res |
| 92 | } |
Richard Sandiford | ed1fab6 | 2013-07-03 10:10:02 +0000 | [diff] [blame] | 93 | |
| 94 | ; Check that comparisons of spilled values can use CDB rather than CDBR. |
| 95 | define double @f7(double *%ptr0) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 96 | ; CHECK-LABEL: f7: |
Richard Sandiford | ed1fab6 | 2013-07-03 10:10:02 +0000 | [diff] [blame] | 97 | ; CHECK: brasl %r14, foo@PLT |
| 98 | ; CHECK: cdb {{%f[0-9]+}}, 160(%r15) |
| 99 | ; CHECK: br %r14 |
| 100 | %ptr1 = getelementptr double *%ptr0, i64 2 |
| 101 | %ptr2 = getelementptr double *%ptr0, i64 4 |
| 102 | %ptr3 = getelementptr double *%ptr0, i64 6 |
| 103 | %ptr4 = getelementptr double *%ptr0, i64 8 |
| 104 | %ptr5 = getelementptr double *%ptr0, i64 10 |
| 105 | %ptr6 = getelementptr double *%ptr0, i64 12 |
| 106 | %ptr7 = getelementptr double *%ptr0, i64 14 |
| 107 | %ptr8 = getelementptr double *%ptr0, i64 16 |
| 108 | %ptr9 = getelementptr double *%ptr0, i64 18 |
| 109 | %ptr10 = getelementptr double *%ptr0, i64 20 |
| 110 | |
| 111 | %val0 = load double *%ptr0 |
| 112 | %val1 = load double *%ptr1 |
| 113 | %val2 = load double *%ptr2 |
| 114 | %val3 = load double *%ptr3 |
| 115 | %val4 = load double *%ptr4 |
| 116 | %val5 = load double *%ptr5 |
| 117 | %val6 = load double *%ptr6 |
| 118 | %val7 = load double *%ptr7 |
| 119 | %val8 = load double *%ptr8 |
| 120 | %val9 = load double *%ptr9 |
| 121 | %val10 = load double *%ptr10 |
| 122 | |
| 123 | %ret = call double @foo() |
| 124 | |
| 125 | %cmp0 = fcmp olt double %ret, %val0 |
| 126 | %cmp1 = fcmp olt double %ret, %val1 |
| 127 | %cmp2 = fcmp olt double %ret, %val2 |
| 128 | %cmp3 = fcmp olt double %ret, %val3 |
| 129 | %cmp4 = fcmp olt double %ret, %val4 |
| 130 | %cmp5 = fcmp olt double %ret, %val5 |
| 131 | %cmp6 = fcmp olt double %ret, %val6 |
| 132 | %cmp7 = fcmp olt double %ret, %val7 |
| 133 | %cmp8 = fcmp olt double %ret, %val8 |
| 134 | %cmp9 = fcmp olt double %ret, %val9 |
| 135 | %cmp10 = fcmp olt double %ret, %val10 |
| 136 | |
| 137 | %sel0 = select i1 %cmp0, double %ret, double 0.0 |
| 138 | %sel1 = select i1 %cmp1, double %sel0, double 1.0 |
| 139 | %sel2 = select i1 %cmp2, double %sel1, double 2.0 |
| 140 | %sel3 = select i1 %cmp3, double %sel2, double 3.0 |
| 141 | %sel4 = select i1 %cmp4, double %sel3, double 4.0 |
| 142 | %sel5 = select i1 %cmp5, double %sel4, double 5.0 |
| 143 | %sel6 = select i1 %cmp6, double %sel5, double 6.0 |
| 144 | %sel7 = select i1 %cmp7, double %sel6, double 7.0 |
| 145 | %sel8 = select i1 %cmp8, double %sel7, double 8.0 |
| 146 | %sel9 = select i1 %cmp9, double %sel8, double 9.0 |
| 147 | %sel10 = select i1 %cmp10, double %sel9, double 10.0 |
| 148 | |
| 149 | ret double %sel10 |
| 150 | } |
Richard Sandiford | 9f11bc1 | 2013-08-07 11:03:34 +0000 | [diff] [blame] | 151 | |
| 152 | ; Check comparison with zero. |
| 153 | define i64 @f8(i64 %a, i64 %b, double %f) { |
| 154 | ; CHECK-LABEL: f8: |
| 155 | ; CHECK: ltdbr %f0, %f0 |
| 156 | ; CHECK-NEXT: je |
| 157 | ; CHECK: lgr %r2, %r3 |
| 158 | ; CHECK: br %r14 |
| 159 | %cond = fcmp oeq double %f, 0.0 |
| 160 | %res = select i1 %cond, i64 %a, i64 %b |
| 161 | ret i64 %res |
| 162 | } |
Richard Sandiford | 24e597b | 2013-08-23 11:27:19 +0000 | [diff] [blame] | 163 | |
| 164 | ; Check the comparison can be reversed if that allows CDB to be used, |
| 165 | define i64 @f9(i64 %a, i64 %b, double %f2, double *%ptr) { |
| 166 | ; CHECK-LABEL: f9: |
| 167 | ; CHECK: cdb %f0, 0(%r4) |
| 168 | ; CHECK-NEXT: jl {{\.L.*}} |
| 169 | ; CHECK: lgr %r2, %r3 |
| 170 | ; CHECK: br %r14 |
| 171 | %f1 = load double *%ptr |
| 172 | %cond = fcmp ogt double %f1, %f2 |
| 173 | %res = select i1 %cond, i64 %a, i64 %b |
| 174 | ret i64 %res |
| 175 | } |