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Ulrich Weigand9e3577f2013-05-06 16:17:29 +00001; Test multiplication of two f32s, producing an f32 result.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
Richard Sandiforded1fab62013-07-03 10:10:02 +00005declare float @foo()
6
Ulrich Weigand9e3577f2013-05-06 16:17:29 +00007; Check register multiplication.
8define float @f1(float %f1, float %f2) {
Stephen Lind24ab202013-07-14 06:24:09 +00009; CHECK-LABEL: f1:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000010; CHECK: meebr %f0, %f2
11; CHECK: br %r14
12 %res = fmul float %f1, %f2
13 ret float %res
14}
15
16; Check the low end of the MEEB range.
17define float @f2(float %f1, float *%ptr) {
Stephen Lind24ab202013-07-14 06:24:09 +000018; CHECK-LABEL: f2:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000019; CHECK: meeb %f0, 0(%r2)
20; CHECK: br %r14
21 %f2 = load float *%ptr
22 %res = fmul float %f1, %f2
23 ret float %res
24}
25
26; Check the high end of the aligned MEEB range.
27define float @f3(float %f1, float *%base) {
Stephen Lind24ab202013-07-14 06:24:09 +000028; CHECK-LABEL: f3:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000029; CHECK: meeb %f0, 4092(%r2)
30; CHECK: br %r14
31 %ptr = getelementptr float *%base, i64 1023
32 %f2 = load float *%ptr
33 %res = fmul float %f1, %f2
34 ret float %res
35}
36
37; Check the next word up, which needs separate address logic.
38; Other sequences besides this one would be OK.
39define float @f4(float %f1, float *%base) {
Stephen Lind24ab202013-07-14 06:24:09 +000040; CHECK-LABEL: f4:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000041; CHECK: aghi %r2, 4096
42; CHECK: meeb %f0, 0(%r2)
43; CHECK: br %r14
44 %ptr = getelementptr float *%base, i64 1024
45 %f2 = load float *%ptr
46 %res = fmul float %f1, %f2
47 ret float %res
48}
49
50; Check negative displacements, which also need separate address logic.
51define float @f5(float %f1, float *%base) {
Stephen Lind24ab202013-07-14 06:24:09 +000052; CHECK-LABEL: f5:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000053; CHECK: aghi %r2, -4
54; CHECK: meeb %f0, 0(%r2)
55; CHECK: br %r14
56 %ptr = getelementptr float *%base, i64 -1
57 %f2 = load float *%ptr
58 %res = fmul float %f1, %f2
59 ret float %res
60}
61
62; Check that MEEB allows indices.
63define float @f6(float %f1, float *%base, i64 %index) {
Stephen Lind24ab202013-07-14 06:24:09 +000064; CHECK-LABEL: f6:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000065; CHECK: sllg %r1, %r3, 2
66; CHECK: meeb %f0, 400(%r1,%r2)
67; CHECK: br %r14
68 %ptr1 = getelementptr float *%base, i64 %index
69 %ptr2 = getelementptr float *%ptr1, i64 100
70 %f2 = load float *%ptr2
71 %res = fmul float %f1, %f2
72 ret float %res
73}
Richard Sandiforded1fab62013-07-03 10:10:02 +000074
75; Check that multiplications of spilled values can use MEEB rather than MEEBR.
76define float @f7(float *%ptr0) {
Stephen Lind24ab202013-07-14 06:24:09 +000077; CHECK-LABEL: f7:
Richard Sandiforded1fab62013-07-03 10:10:02 +000078; CHECK: brasl %r14, foo@PLT
79; CHECK: meeb %f0, 16{{[04]}}(%r15)
80; CHECK: br %r14
81 %ptr1 = getelementptr float *%ptr0, i64 2
82 %ptr2 = getelementptr float *%ptr0, i64 4
83 %ptr3 = getelementptr float *%ptr0, i64 6
84 %ptr4 = getelementptr float *%ptr0, i64 8
85 %ptr5 = getelementptr float *%ptr0, i64 10
86 %ptr6 = getelementptr float *%ptr0, i64 12
87 %ptr7 = getelementptr float *%ptr0, i64 14
88 %ptr8 = getelementptr float *%ptr0, i64 16
89 %ptr9 = getelementptr float *%ptr0, i64 18
90 %ptr10 = getelementptr float *%ptr0, i64 20
91
92 %val0 = load float *%ptr0
93 %val1 = load float *%ptr1
94 %val2 = load float *%ptr2
95 %val3 = load float *%ptr3
96 %val4 = load float *%ptr4
97 %val5 = load float *%ptr5
98 %val6 = load float *%ptr6
99 %val7 = load float *%ptr7
100 %val8 = load float *%ptr8
101 %val9 = load float *%ptr9
102 %val10 = load float *%ptr10
103
104 %ret = call float @foo()
105
106 %mul0 = fmul float %ret, %val0
107 %mul1 = fmul float %mul0, %val1
108 %mul2 = fmul float %mul1, %val2
109 %mul3 = fmul float %mul2, %val3
110 %mul4 = fmul float %mul3, %val4
111 %mul5 = fmul float %mul4, %val5
112 %mul6 = fmul float %mul5, %val6
113 %mul7 = fmul float %mul6, %val7
114 %mul8 = fmul float %mul7, %val8
115 %mul9 = fmul float %mul8, %val9
116 %mul10 = fmul float %mul9, %val10
117
118 ret float %mul10
119}