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gerrit-public.fairphone.software / toolchain / llvm-project / c6ae7b4763f6b12602f116cb15c5d19c628e2c21 / . / llvm / test / CodeGen / Thumb2 / thumb2-orn.ll
blob: e1f0bba7c4b86e0e3abb5b0f996a6c58fb303e42 [file] [log] [blame]
Saleem Abdulrasool905b6d192014-04-03 23:47:24 +0000[diff] [blame]1; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
Evan Cheng34c8c742009-06-26 05:59:16 +0000[diff] [blame]2
3define i32 @f1(i32 %a, i32 %b) {
4 %tmp = xor i32 %b, 4294967295
David Goodwin34f7ede2009-06-26 16:20:06 +0000[diff] [blame]5 %tmp1 = or i32 %a, %tmp
Evan Cheng34c8c742009-06-26 05:59:16 +0000[diff] [blame]6 ret i32 %tmp1
7}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]8; CHECK-LABEL: f1:
Edward O'Callaghanf161e972009-11-22 15:35:28 +0000[diff] [blame]9; CHECK: orn r0, r0, r1
Evan Cheng34c8c742009-06-26 05:59:16 +0000[diff] [blame]10
11define i32 @f2(i32 %a, i32 %b) {
12 %tmp = xor i32 %b, 4294967295
David Goodwin34f7ede2009-06-26 16:20:06 +0000[diff] [blame]13 %tmp1 = or i32 %tmp, %a
Evan Cheng34c8c742009-06-26 05:59:16 +0000[diff] [blame]14 ret i32 %tmp1
15}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]16; CHECK-LABEL: f2:
Edward O'Callaghanf161e972009-11-22 15:35:28 +0000[diff] [blame]17; CHECK: orn r0, r0, r1
David Goodwin3bd42af2009-06-26 18:10:30 +0000[diff] [blame]18
19define i32 @f3(i32 %a, i32 %b) {
20 %tmp = xor i32 4294967295, %b
21 %tmp1 = or i32 %a, %tmp
22 ret i32 %tmp1
23}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]24; CHECK-LABEL: f3:
Edward O'Callaghanf161e972009-11-22 15:35:28 +0000[diff] [blame]25; CHECK: orn r0, r0, r1
David Goodwin3bd42af2009-06-26 18:10:30 +0000[diff] [blame]26
27define i32 @f4(i32 %a, i32 %b) {
28 %tmp = xor i32 4294967295, %b
29 %tmp1 = or i32 %tmp, %a
30 ret i32 %tmp1
31}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]32; CHECK-LABEL: f4:
Edward O'Callaghanf161e972009-11-22 15:35:28 +0000[diff] [blame]33; CHECK: orn r0, r0, r1
David Goodwin17512662009-06-30 01:02:20 +0000[diff] [blame]34
35define i32 @f5(i32 %a, i32 %b) {
36 %tmp = shl i32 %b, 5
37 %tmp1 = xor i32 4294967295, %tmp
38 %tmp2 = or i32 %a, %tmp1
39 ret i32 %tmp2
40}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]41; CHECK-LABEL: f5:
Edward O'Callaghanf161e972009-11-22 15:35:28 +0000[diff] [blame]42; CHECK: orn r0, r0, r1, lsl #5
David Goodwin17512662009-06-30 01:02:20 +0000[diff] [blame]43
44define i32 @f6(i32 %a, i32 %b) {
45 %tmp = lshr i32 %b, 6
46 %tmp1 = xor i32 4294967295, %tmp
47 %tmp2 = or i32 %a, %tmp1
48 ret i32 %tmp2
49}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]50; CHECK-LABEL: f6:
Edward O'Callaghanf161e972009-11-22 15:35:28 +0000[diff] [blame]51; CHECK: orn r0, r0, r1, lsr #6
David Goodwin17512662009-06-30 01:02:20 +0000[diff] [blame]52
53define i32 @f7(i32 %a, i32 %b) {
54 %tmp = ashr i32 %b, 7
55 %tmp1 = xor i32 4294967295, %tmp
56 %tmp2 = or i32 %a, %tmp1
57 ret i32 %tmp2
58}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]59; CHECK-LABEL: f7:
Edward O'Callaghanf161e972009-11-22 15:35:28 +0000[diff] [blame]60; CHECK: orn r0, r0, r1, asr #7
David Goodwin17512662009-06-30 01:02:20 +0000[diff] [blame]61
62define i32 @f8(i32 %a, i32 %b) {
63 %l8 = shl i32 %a, 24
64 %r8 = lshr i32 %a, 8
65 %tmp = or i32 %l8, %r8
66 %tmp1 = xor i32 4294967295, %tmp
67 %tmp2 = or i32 %a, %tmp1
68 ret i32 %tmp2
69}
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]70; CHECK-LABEL: f8:
Edward O'Callaghanf161e972009-11-22 15:35:28 +0000[diff] [blame]71; CHECK: orn r0, r0, r0, ror #8