Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 1 | //=== lib/CodeGen/GlobalISel/AArch64PreLegalizerCombiner.cpp --------------===// |
| 2 | // |
Chandler Carruth | 2946cd7 | 2019-01-19 08:50:56 +0000 | [diff] [blame] | 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This pass does combining of machine instructions at the generic MI level, |
| 10 | // before the legalizer. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "AArch64TargetMachine.h" |
| 15 | #include "llvm/CodeGen/GlobalISel/Combiner.h" |
| 16 | #include "llvm/CodeGen/GlobalISel/CombinerHelper.h" |
| 17 | #include "llvm/CodeGen/GlobalISel/CombinerInfo.h" |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame^] | 18 | #include "llvm/CodeGen/GlobalISel/GISelKnownBits.h" |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 19 | #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h" |
| 20 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 21 | #include "llvm/CodeGen/TargetPassConfig.h" |
| 22 | #include "llvm/Support/Debug.h" |
| 23 | |
| 24 | #define DEBUG_TYPE "aarch64-prelegalizer-combiner" |
| 25 | |
| 26 | using namespace llvm; |
| 27 | using namespace MIPatternMatch; |
| 28 | |
| 29 | namespace { |
| 30 | class AArch64PreLegalizerCombinerInfo : public CombinerInfo { |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame^] | 31 | GISelKnownBits *KB; |
| 32 | |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 33 | public: |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame^] | 34 | AArch64PreLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, |
| 35 | GISelKnownBits *KB) |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 36 | : CombinerInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false, |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame^] | 37 | /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize), |
| 38 | KB(KB) {} |
Aditya Nandakumar | f75d4f3 | 2018-12-05 20:14:52 +0000 | [diff] [blame] | 39 | virtual bool combine(GISelChangeObserver &Observer, MachineInstr &MI, |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 40 | MachineIRBuilder &B) const override; |
| 41 | }; |
| 42 | |
Aditya Nandakumar | f75d4f3 | 2018-12-05 20:14:52 +0000 | [diff] [blame] | 43 | bool AArch64PreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer, |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 44 | MachineInstr &MI, |
| 45 | MachineIRBuilder &B) const { |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame^] | 46 | CombinerHelper Helper(Observer, B, KB); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 47 | |
| 48 | switch (MI.getOpcode()) { |
| 49 | default: |
| 50 | return false; |
Amara Emerson | 93e58d2 | 2019-04-13 00:33:25 +0000 | [diff] [blame] | 51 | case TargetOpcode::COPY: |
| 52 | return Helper.tryCombineCopy(MI); |
Amara Emerson | 6616e26 | 2019-07-09 16:05:59 +0000 | [diff] [blame] | 53 | case TargetOpcode::G_BR: |
| 54 | return Helper.tryCombineBr(MI); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 55 | case TargetOpcode::G_LOAD: |
| 56 | case TargetOpcode::G_SEXTLOAD: |
| 57 | case TargetOpcode::G_ZEXTLOAD: |
| 58 | return Helper.tryCombineExtendingLoads(MI); |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 59 | case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS: |
| 60 | switch (MI.getIntrinsicID()) { |
| 61 | case Intrinsic::memcpy: |
| 62 | case Intrinsic::memmove: |
| 63 | case Intrinsic::memset: { |
Amara Emerson | 85e5e28 | 2019-08-05 20:02:52 +0000 | [diff] [blame] | 64 | // If we're at -O0 set a maxlen of 32 to inline, otherwise let the other |
| 65 | // heuristics decide. |
| 66 | unsigned MaxLen = EnableOpt ? 0 : 32; |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 67 | // Try to inline memcpy type calls if optimizations are enabled. |
Amara Emerson | 85e5e28 | 2019-08-05 20:02:52 +0000 | [diff] [blame] | 68 | return (!EnableOptSize) ? Helper.tryCombineMemCpyFamily(MI, MaxLen) |
| 69 | : false; |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 70 | } |
| 71 | default: |
| 72 | break; |
| 73 | } |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | return false; |
| 77 | } |
| 78 | |
| 79 | // Pass boilerplate |
| 80 | // ================ |
| 81 | |
| 82 | class AArch64PreLegalizerCombiner : public MachineFunctionPass { |
| 83 | public: |
| 84 | static char ID; |
| 85 | |
| 86 | AArch64PreLegalizerCombiner(); |
| 87 | |
| 88 | StringRef getPassName() const override { return "AArch64PreLegalizerCombiner"; } |
| 89 | |
| 90 | bool runOnMachineFunction(MachineFunction &MF) override; |
| 91 | |
| 92 | void getAnalysisUsage(AnalysisUsage &AU) const override; |
| 93 | }; |
| 94 | } |
| 95 | |
| 96 | void AArch64PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const { |
| 97 | AU.addRequired<TargetPassConfig>(); |
| 98 | AU.setPreservesCFG(); |
| 99 | getSelectionDAGFallbackAnalysisUsage(AU); |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame^] | 100 | AU.addRequired<GISelKnownBitsAnalysis>(); |
| 101 | AU.addPreserved<GISelKnownBitsAnalysis>(); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 102 | MachineFunctionPass::getAnalysisUsage(AU); |
| 103 | } |
| 104 | |
| 105 | AArch64PreLegalizerCombiner::AArch64PreLegalizerCombiner() : MachineFunctionPass(ID) { |
| 106 | initializeAArch64PreLegalizerCombinerPass(*PassRegistry::getPassRegistry()); |
| 107 | } |
| 108 | |
| 109 | bool AArch64PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) { |
| 110 | if (MF.getProperties().hasProperty( |
| 111 | MachineFunctionProperties::Property::FailedISel)) |
| 112 | return false; |
| 113 | auto *TPC = &getAnalysis<TargetPassConfig>(); |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 114 | const Function &F = MF.getFunction(); |
| 115 | bool EnableOpt = |
| 116 | MF.getTarget().getOptLevel() != CodeGenOpt::None && !skipFunction(F); |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame^] | 117 | GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF); |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 118 | AArch64PreLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(), |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame^] | 119 | F.hasMinSize(), KB); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 120 | Combiner C(PCInfo, TPC); |
Aditya Nandakumar | 500e3ea | 2019-01-16 00:40:37 +0000 | [diff] [blame] | 121 | return C.combineMachineInstrs(MF, /*CSEInfo*/ nullptr); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 122 | } |
| 123 | |
| 124 | char AArch64PreLegalizerCombiner::ID = 0; |
| 125 | INITIALIZE_PASS_BEGIN(AArch64PreLegalizerCombiner, DEBUG_TYPE, |
| 126 | "Combine AArch64 machine instrs before legalization", |
| 127 | false, false) |
| 128 | INITIALIZE_PASS_DEPENDENCY(TargetPassConfig) |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame^] | 129 | INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis) |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 130 | INITIALIZE_PASS_END(AArch64PreLegalizerCombiner, DEBUG_TYPE, |
| 131 | "Combine AArch64 machine instrs before legalization", false, |
| 132 | false) |
| 133 | |
| 134 | |
| 135 | namespace llvm { |
| 136 | FunctionPass *createAArch64PreLegalizeCombiner() { |
| 137 | return new AArch64PreLegalizerCombiner(); |
| 138 | } |
| 139 | } // end namespace llvm |