Tom Stellard | 45bb48e | 2015-06-13 03:28:10 +0000 | [diff] [blame] | 1 | set(LLVM_TARGET_DEFINITIONS AMDGPU.td) |
| 2 | |
| 3 | tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info) |
| 4 | tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info) |
| 5 | tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel) |
| 6 | tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv) |
| 7 | tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget) |
| 8 | tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic) |
| 9 | tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter) |
| 10 | tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer) |
| 11 | tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer) |
| 12 | tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher) |
| 13 | add_public_tablegen_target(AMDGPUCommonTableGen) |
| 14 | |
| 15 | add_llvm_target(AMDGPUCodeGen |
| 16 | AMDILCFGStructurizer.cpp |
| 17 | AMDGPUAlwaysInlinePass.cpp |
Matt Arsenault | 3931948 | 2015-11-06 18:01:57 +0000 | [diff] [blame] | 18 | AMDGPUAnnotateKernelFeatures.cpp |
Tom Stellard | 45bb48e | 2015-06-13 03:28:10 +0000 | [diff] [blame] | 19 | AMDGPUAsmPrinter.cpp |
Matt Arsenault | b6fd98c | 2015-10-21 22:37:46 +0000 | [diff] [blame] | 20 | AMDGPUDiagnosticInfoUnsupported.cpp |
Tom Stellard | 45bb48e | 2015-06-13 03:28:10 +0000 | [diff] [blame] | 21 | AMDGPUFrameLowering.cpp |
Tom Stellard | c93fc11 | 2015-12-10 02:13:01 +0000 | [diff] [blame^] | 22 | AMDGPUTargetObjectFile.cpp |
Tom Stellard | 45bb48e | 2015-06-13 03:28:10 +0000 | [diff] [blame] | 23 | AMDGPUIntrinsicInfo.cpp |
| 24 | AMDGPUISelDAGToDAG.cpp |
| 25 | AMDGPUMCInstLower.cpp |
| 26 | AMDGPUMachineFunction.cpp |
Tom Stellard | fd25395 | 2015-08-07 23:19:30 +0000 | [diff] [blame] | 27 | AMDGPUOpenCLImageTypeLoweringPass.cpp |
Tom Stellard | 45bb48e | 2015-06-13 03:28:10 +0000 | [diff] [blame] | 28 | AMDGPUSubtarget.cpp |
| 29 | AMDGPUTargetMachine.cpp |
| 30 | AMDGPUTargetTransformInfo.cpp |
| 31 | AMDGPUISelLowering.cpp |
| 32 | AMDGPUInstrInfo.cpp |
| 33 | AMDGPUPromoteAlloca.cpp |
| 34 | AMDGPURegisterInfo.cpp |
| 35 | R600ClauseMergePass.cpp |
| 36 | R600ControlFlowFinalizer.cpp |
| 37 | R600EmitClauseMarkers.cpp |
| 38 | R600ExpandSpecialInstrs.cpp |
| 39 | R600InstrInfo.cpp |
| 40 | R600ISelLowering.cpp |
| 41 | R600MachineFunctionInfo.cpp |
| 42 | R600MachineScheduler.cpp |
| 43 | R600OptimizeVectorRegisters.cpp |
| 44 | R600Packetizer.cpp |
| 45 | R600RegisterInfo.cpp |
| 46 | R600TextureIntrinsicsReplacer.cpp |
| 47 | SIAnnotateControlFlow.cpp |
| 48 | SIFixControlFlowLiveIntervals.cpp |
| 49 | SIFixSGPRCopies.cpp |
| 50 | SIFixSGPRLiveRanges.cpp |
| 51 | SIFoldOperands.cpp |
Matt Arsenault | 0c90e95 | 2015-11-06 18:17:45 +0000 | [diff] [blame] | 52 | SIFrameLowering.cpp |
Tom Stellard | 45bb48e | 2015-06-13 03:28:10 +0000 | [diff] [blame] | 53 | SIInsertWaits.cpp |
| 54 | SIInstrInfo.cpp |
| 55 | SIISelLowering.cpp |
| 56 | SILoadStoreOptimizer.cpp |
| 57 | SILowerControlFlow.cpp |
| 58 | SILowerI1Copies.cpp |
| 59 | SIMachineFunctionInfo.cpp |
Tom Stellard | 45bb48e | 2015-06-13 03:28:10 +0000 | [diff] [blame] | 60 | SIRegisterInfo.cpp |
| 61 | SIShrinkInstructions.cpp |
| 62 | SITypeRewriter.cpp |
| 63 | ) |
| 64 | |
| 65 | add_subdirectory(AsmParser) |
| 66 | add_subdirectory(InstPrinter) |
| 67 | add_subdirectory(TargetInfo) |
| 68 | add_subdirectory(MCTargetDesc) |
Tom Stellard | 347ac79 | 2015-06-26 21:15:07 +0000 | [diff] [blame] | 69 | add_subdirectory(Utils) |