| Konstantin Zhuravlyov | ca8946a | 2017-09-18 21:22:45 +0000 | [diff] [blame^] | 1 | ; RUN: llc -march=amdgcn -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN --check-prefix=GFX600 %s |
| 2 | ; RUN: llc -march=amdgcn -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN --check-prefix=GFX700 %s |
| 3 | ; RUN: llc -march=amdgcn -mcpu=gfx800 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN --check-prefix=GFX800 %s |
| 4 | ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN --check-prefix=GFX900 %s |
| 5 | |
| 6 | ; GCN-LABEL: {{^}}scalar_xnor_i32_one_use |
| 7 | ; GCN: s_xnor_b32 |
| 8 | define amdgpu_kernel void @scalar_xnor_i32_one_use( |
| 9 | i32 addrspace(1)* %r0, i32 %a, i32 %b) { |
| 10 | entry: |
| 11 | %xor = xor i32 %a, %b |
| 12 | %r0.val = xor i32 %xor, -1 |
| 13 | store i32 %r0.val, i32 addrspace(1)* %r0 |
| 14 | ret void |
| 15 | } |
| 16 | |
| 17 | ; GCN-LABEL: {{^}}scalar_xnor_i32_mul_use |
| 18 | ; GCN-NOT: s_xnor_b32 |
| 19 | ; GCN: s_xor_b32 |
| 20 | ; GCN: s_not_b32 |
| 21 | ; GCN: s_add_i32 |
| 22 | define amdgpu_kernel void @scalar_xnor_i32_mul_use( |
| 23 | i32 addrspace(1)* %r0, i32 addrspace(1)* %r1, i32 %a, i32 %b) { |
| 24 | entry: |
| 25 | %xor = xor i32 %a, %b |
| 26 | %r0.val = xor i32 %xor, -1 |
| 27 | %r1.val = add i32 %xor, %a |
| 28 | store i32 %r0.val, i32 addrspace(1)* %r0 |
| 29 | store i32 %r1.val, i32 addrspace(1)* %r1 |
| 30 | ret void |
| 31 | } |
| 32 | |
| 33 | ; GCN-LABEL: {{^}}scalar_xnor_i64_one_use |
| 34 | ; GCN: s_xnor_b64 |
| 35 | define amdgpu_kernel void @scalar_xnor_i64_one_use( |
| 36 | i64 addrspace(1)* %r0, i64 %a, i64 %b) { |
| 37 | entry: |
| 38 | %xor = xor i64 %a, %b |
| 39 | %r0.val = xor i64 %xor, -1 |
| 40 | store i64 %r0.val, i64 addrspace(1)* %r0 |
| 41 | ret void |
| 42 | } |
| 43 | |
| 44 | ; GCN-LABEL: {{^}}scalar_xnor_i64_mul_use |
| 45 | ; GCN-NOT: s_xnor_b64 |
| 46 | ; GCN: s_xor_b64 |
| 47 | ; GCN: s_not_b64 |
| 48 | ; GCN: s_add_u32 |
| 49 | ; GCN: s_addc_u32 |
| 50 | define amdgpu_kernel void @scalar_xnor_i64_mul_use( |
| 51 | i64 addrspace(1)* %r0, i64 addrspace(1)* %r1, i64 %a, i64 %b) { |
| 52 | entry: |
| 53 | %xor = xor i64 %a, %b |
| 54 | %r0.val = xor i64 %xor, -1 |
| 55 | %r1.val = add i64 %xor, %a |
| 56 | store i64 %r0.val, i64 addrspace(1)* %r0 |
| 57 | store i64 %r1.val, i64 addrspace(1)* %r1 |
| 58 | ret void |
| 59 | } |
| 60 | |
| 61 | ; GCN-LABEL: {{^}}vector_xnor_i32_one_use |
| 62 | ; GCN-NOT: s_xnor_b32 |
| 63 | ; GCN: v_xor_b32 |
| 64 | ; GCN: v_not_b32 |
| 65 | define i32 @vector_xnor_i32_one_use(i32 %a, i32 %b) { |
| 66 | entry: |
| 67 | %xor = xor i32 %a, %b |
| 68 | %r = xor i32 %xor, -1 |
| 69 | ret i32 %r |
| 70 | } |
| 71 | |
| 72 | ; GCN-LABEL: {{^}}vector_xnor_i64_one_use |
| 73 | ; GCN-NOT: s_xnor_b64 |
| 74 | ; GCN: v_xor_b32 |
| 75 | ; GCN: v_xor_b32 |
| 76 | ; GCN: v_not_b32 |
| 77 | ; GCN: v_not_b32 |
| 78 | define i64 @vector_xnor_i64_one_use(i64 %a, i64 %b) { |
| 79 | entry: |
| 80 | %xor = xor i64 %a, %b |
| 81 | %r = xor i64 %xor, -1 |
| 82 | ret i64 %r |
| 83 | } |