blob: dc3a08bb4daf5d3f92f0e6e3cd4e9fd0db7451ae [file] [log] [blame]
Craig Toppere57b49e2012-04-27 07:11:58 +00001; RUN: llc -march=x86-64 -mattr=+sse41 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4
2; RUN: llc -march=x86-64 -mattr=-sse41 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4
Lang Hames2d6d3a22011-12-15 19:56:07 +00003; Test case for r146671
4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5target triple = "x86_64-apple-macosx10.7"
6
7define <16 x i8> @shift(<16 x i8> %a, <16 x i8> %b) nounwind {
Lang Hamesda07b3a2011-12-17 01:08:46 +00008 ; Make sure operands to pblend are in the right order.
9 ; CHECK-W-SSE4: psllw $4, [[REG1:%xmm.]]
10 ; CHECK-W-SSE4: pblendvb [[REG1]],{{ %xmm.}}
11 ; CHECK-W-SSE4: psllw $2
12
13 ; Make sure we're masking and pcmp'ing the VSELECT conditon vector.
14 ; CHECK-WO-SSE4: psllw $5, [[REG1:%xmm.]]
15 ; CHECK-WO-SSE4: pand [[REG1]], [[REG2:%xmm.]]
16 ; CHECK-WO-SSE4: pcmpeqb {{%xmm., }}[[REG2]]
Lang Hames2d6d3a22011-12-15 19:56:07 +000017 %1 = shl <16 x i8> %a, %b
18 ret <16 x i8> %1
19}