| Akira Hatanaka | be6a818 | 2013-04-19 19:03:11 +0000 | [diff] [blame] | 1 | let isCodeGenOnly = 1 in { |
| 2 | /// Arithmetic Instructions (ALU Immediate) |
| 3 | def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, CPURegsOpnd>, |
| 4 | ADDI_FM_MM<0xc>; |
| 5 | def ADDi_MM : MMRel, ArithLogicI<"addi", simm16, CPURegsOpnd>, |
| 6 | ADDI_FM_MM<0x4>; |
| 7 | def SLTi_MM : MMRel, SetCC_I<"slti", setlt, simm16, immSExt16, CPURegs>, |
| 8 | SLTI_FM_MM<0x24>; |
| 9 | def SLTiu_MM : MMRel, SetCC_I<"sltiu", setult, simm16, immSExt16, CPURegs>, |
| 10 | SLTI_FM_MM<0x2c>; |
| 11 | def ANDi_MM : MMRel, ArithLogicI<"andi", uimm16, CPURegsOpnd, immZExt16, and>, |
| 12 | ADDI_FM_MM<0x34>; |
| 13 | def ORi_MM : MMRel, ArithLogicI<"ori", uimm16, CPURegsOpnd, immZExt16, or>, |
| 14 | ADDI_FM_MM<0x14>; |
| 15 | def XORi_MM : MMRel, ArithLogicI<"xori", uimm16, CPURegsOpnd, immZExt16, xor>, |
| 16 | ADDI_FM_MM<0x1c>; |
| 17 | def LUi_MM : MMRel, LoadUpper<"lui", CPURegs, uimm16>, LUI_FM_MM; |
| 18 | |
| 19 | /// Arithmetic Instructions (3-Operand, R-Type) |
| 20 | def ADDu_MM : MMRel, ArithLogicR<"addu", CPURegsOpnd>, ADD_FM_MM<0, 0x150>; |
| 21 | def SUBu_MM : MMRel, ArithLogicR<"subu", CPURegsOpnd>, ADD_FM_MM<0, 0x1d0>; |
| 22 | def MUL_MM : MMRel, ArithLogicR<"mul", CPURegsOpnd>, ADD_FM_MM<0, 0x210>; |
| 23 | def ADD_MM : MMRel, ArithLogicR<"add", CPURegsOpnd>, ADD_FM_MM<0, 0x110>; |
| 24 | def SUB_MM : MMRel, ArithLogicR<"sub", CPURegsOpnd>, ADD_FM_MM<0, 0x190>; |
| 25 | def SLT_MM : MMRel, SetCC_R<"slt", setlt, CPURegs>, ADD_FM_MM<0, 0x350>; |
| 26 | def SLTu_MM : MMRel, SetCC_R<"sltu", setult, CPURegs>, |
| 27 | ADD_FM_MM<0, 0x390>; |
| 28 | def AND_MM : MMRel, ArithLogicR<"and", CPURegsOpnd, 1, IIAlu, and>, |
| 29 | ADD_FM_MM<0, 0x250>; |
| 30 | def OR_MM : MMRel, ArithLogicR<"or", CPURegsOpnd, 1, IIAlu, or>, |
| 31 | ADD_FM_MM<0, 0x290>; |
| 32 | def XOR_MM : MMRel, ArithLogicR<"xor", CPURegsOpnd, 1, IIAlu, xor>, |
| 33 | ADD_FM_MM<0, 0x310>; |
| 34 | def NOR_MM : MMRel, LogicNOR<"nor", CPURegsOpnd>, ADD_FM_MM<0, 0x2d0>; |
| 35 | def MULT_MM : MMRel, Mult<"mult", IIImul, CPURegsOpnd, [HI, LO]>, |
| 36 | MULT_FM_MM<0x22c>; |
| 37 | def MULTu_MM : MMRel, Mult<"multu", IIImul, CPURegsOpnd, [HI, LO]>, |
| 38 | MULT_FM_MM<0x26c>; |
| Akira Hatanaka | cd9b74a | 2013-04-25 01:11:15 +0000 | [diff] [blame^] | 39 | |
| 40 | /// Shift Instructions |
| 41 | def SLL_MM : MMRel, shift_rotate_imm<"sll", shamt, CPURegsOpnd>, |
| 42 | SRA_FM_MM<0, 0>; |
| 43 | def SRL_MM : MMRel, shift_rotate_imm<"srl", shamt, CPURegsOpnd>, |
| 44 | SRA_FM_MM<0x40, 0>; |
| 45 | def SRA_MM : MMRel, shift_rotate_imm<"sra", shamt, CPURegsOpnd>, |
| 46 | SRA_FM_MM<0x80, 0>; |
| 47 | def SLLV_MM : MMRel, shift_rotate_reg<"sllv", CPURegsOpnd>, |
| 48 | SRLV_FM_MM<0x10, 0>; |
| 49 | def SRLV_MM : MMRel, shift_rotate_reg<"srlv", CPURegsOpnd>, |
| 50 | SRLV_FM_MM<0x50, 0>; |
| 51 | def SRAV_MM : MMRel, shift_rotate_reg<"srav", CPURegsOpnd>, |
| 52 | SRLV_FM_MM<0x90, 0>; |
| 53 | def ROTR_MM : MMRel, shift_rotate_imm<"rotr", shamt, CPURegsOpnd>, |
| 54 | SRA_FM_MM<0xc0, 0>; |
| 55 | def ROTRV_MM : MMRel, shift_rotate_reg<"rotrv", CPURegsOpnd>, |
| 56 | SRLV_FM_MM<0xd0, 0>; |
| Akira Hatanaka | be6a818 | 2013-04-19 19:03:11 +0000 | [diff] [blame] | 57 | } |