| Mikhail Maltsev | e04ab4f | 2018-09-12 09:19:19 +0000 | [diff] [blame] | 1 | // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ |
| 2 | // RUN: -mfloat-abi soft -target-feature +neon -emit-llvm -o - -O1 %s \ |
| 3 | // RUN: | FileCheck %s --check-prefix=CHECK-SOFT |
| 4 | // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ |
| 5 | // RUN: -mfloat-abi hard -target-feature +neon -emit-llvm -o - -O1 %s \ |
| 6 | // RUN: | FileCheck %s --check-prefix=CHECK-HARD |
| 7 | // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ |
| 8 | // RUN: -mfloat-abi hard -target-feature +neon -target-feature +fullfp16 \ |
| 9 | // RUN: -emit-llvm -o - -O1 %s \ |
| 10 | // RUN: | FileCheck %s --check-prefix=CHECK-FULL |
| 11 | |
| 12 | typedef __attribute__((neon_vector_type(4))) __fp16 float16x4_t; |
| 13 | typedef __attribute__((neon_vector_type(8))) __fp16 float16x8_t; |
| 14 | |
| 15 | typedef struct { float16x4_t x[2]; } hfa_t; |
| 16 | // CHECK-FULL: %struct.hfa_t = type { [2 x <4 x half>] } |
| 17 | |
| 18 | float16x4_t g4; |
| 19 | float16x8_t g8; |
| 20 | |
| 21 | void st4(float16x4_t a) { g4 = a; } |
| 22 | // CHECK-SOFT: define void @st4(<2 x i32> %a.coerce) |
| 23 | // CHECK-SOFT: store <2 x i32> %a.coerce, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*) |
| 24 | // |
| 25 | // CHECK-HARD: define arm_aapcs_vfpcc void @st4(<2 x i32> %a.coerce) |
| 26 | // CHECK-HARD: store <2 x i32> %a.coerce, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*) |
| 27 | // |
| 28 | // CHECK-FULL: define arm_aapcs_vfpcc void @st4(<4 x half> %a) |
| 29 | // CHECK-FULL: store <4 x half> %a, <4 x half>* @g4 |
| 30 | |
| 31 | float16x4_t ld4(void) { return g4; } |
| 32 | // CHECK-SOFT: define <2 x i32> @ld4() |
| 33 | // CHECK-SOFT: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*) |
| 34 | // CHECK-SOFT: ret <2 x i32> %0 |
| 35 | // |
| 36 | // CHECK-HARD: define arm_aapcs_vfpcc <2 x i32> @ld4() |
| 37 | // CHECK-HARD: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*) |
| 38 | // CHECK-HARD: ret <2 x i32> %0 |
| 39 | // |
| 40 | // CHECK-FULL: define arm_aapcs_vfpcc <4 x half> @ld4() |
| 41 | // CHECK-FULL: %0 = load <4 x half>, <4 x half>* @g4 |
| 42 | // CHECK-FULL: ret <4 x half> %0 |
| 43 | |
| 44 | void st8(float16x8_t a) { g8 = a; } |
| 45 | // CHECK-SOFT: define void @st8(<4 x i32> %a.coerce) |
| 46 | // CHECK-SOFT: store <4 x i32> %a.coerce, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*) |
| 47 | // |
| 48 | // CHECK-HARD: define arm_aapcs_vfpcc void @st8(<4 x i32> %a.coerce) |
| 49 | // CHECK-HARD: store <4 x i32> %a.coerce, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*) |
| 50 | // |
| 51 | // CHECK-FULL: define arm_aapcs_vfpcc void @st8(<8 x half> %a) |
| 52 | // CHECK-FULL: store <8 x half> %a, <8 x half>* @g8 |
| 53 | |
| 54 | float16x8_t ld8(void) { return g8; } |
| 55 | // CHECK-SOFT: define <4 x i32> @ld8() |
| 56 | // CHECK-SOFT: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*) |
| 57 | // CHECK-SOFT: ret <4 x i32> %0 |
| 58 | // |
| 59 | // CHECK-HARD: define arm_aapcs_vfpcc <4 x i32> @ld8() |
| 60 | // CHECK-HARD: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*) |
| 61 | // CHECK-HARD: ret <4 x i32> %0 |
| 62 | // |
| 63 | // CHECK-FULL: define arm_aapcs_vfpcc <8 x half> @ld8() |
| 64 | // CHECK-FULL: %0 = load <8 x half>, <8 x half>* @g8 |
| 65 | // CHECK-FULL: ret <8 x half> %0 |
| 66 | |
| 67 | void test_hfa(hfa_t a) {} |
| 68 | // CHECK-SOFT: define void @test_hfa([2 x i64] %a.coerce) |
| 69 | // CHECK-HARD: define arm_aapcs_vfpcc void @test_hfa([2 x <2 x i32>] %a.coerce) |
| 70 | // CHECK-FULL: define arm_aapcs_vfpcc void @test_hfa(%struct.hfa_t %a.coerce) |
| 71 | |
| 72 | hfa_t ghfa; |
| 73 | hfa_t test_ret_hfa(void) { return ghfa; } |
| 74 | // CHECK-SOFT: define void @test_ret_hfa(%struct.hfa_t* noalias nocapture sret %agg.result) |
| 75 | // CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @test_ret_hfa() |
| 76 | // CHECK-FULL: define arm_aapcs_vfpcc %struct.hfa_t @test_ret_hfa() |