blob: 87f18aeca8fa8e78f4a853fbc5457dfb05aef653 [file] [log] [blame]
Matt Arsenaultb9433482014-03-19 22:19:52 +00001; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
2
3; SI-LABEL: @local_i32_load
4; SI: DS_READ_B32 [[REG:v[0-9]+]], v{{[0-9]+}}, 28, [M0]
5; SI: BUFFER_STORE_DWORD [[REG]],
6define void @local_i32_load(i32 addrspace(1)* %out, i32 addrspace(3)* %in) nounwind {
7 %gep = getelementptr i32 addrspace(3)* %in, i32 7
8 %val = load i32 addrspace(3)* %gep, align 4
9 store i32 %val, i32 addrspace(1)* %out, align 4
10 ret void
11}
12
13; SI-LABEL: @local_i32_load_0_offset
14; SI: DS_READ_B32 [[REG:v[0-9]+]], v{{[0-9]+}}, 0, [M0]
15; SI: BUFFER_STORE_DWORD [[REG]],
16define void @local_i32_load_0_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %in) nounwind {
17 %val = load i32 addrspace(3)* %in, align 4
18 store i32 %val, i32 addrspace(1)* %out, align 4
19 ret void
20}
21
22; SI-LABEL: @local_i8_load_i16_max_offset
23; SI-NOT: ADD
24; SI: DS_READ_U8 [[REG:v[0-9]+]], {{v[0-9]+}}, -1, [M0]
25; SI: BUFFER_STORE_BYTE [[REG]],
26define void @local_i8_load_i16_max_offset(i8 addrspace(1)* %out, i8 addrspace(3)* %in) nounwind {
27 %gep = getelementptr i8 addrspace(3)* %in, i32 65535
28 %val = load i8 addrspace(3)* %gep, align 4
29 store i8 %val, i8 addrspace(1)* %out, align 4
30 ret void
31}
32
33; SI-LABEL: @local_i8_load_over_i16_max_offset
34; SI: S_ADD_I32 [[ADDR:s[0-9]+]], s{{[0-9]+}}, 65536
35; SI: V_MOV_B32_e32 [[VREGADDR:v[0-9]+]], [[ADDR]]
36; SI: DS_READ_U8 [[REG:v[0-9]+]], [[VREGADDR]], 0, [M0]
37; SI: BUFFER_STORE_BYTE [[REG]],
38define void @local_i8_load_over_i16_max_offset(i8 addrspace(1)* %out, i8 addrspace(3)* %in) nounwind {
39 %gep = getelementptr i8 addrspace(3)* %in, i32 65536
40 %val = load i8 addrspace(3)* %gep, align 4
41 store i8 %val, i8 addrspace(1)* %out, align 4
42 ret void
43}
44
45; SI-LABEL: @local_i64_load
46; SI-NOT: ADD
47; SI: DS_READ_B64 [[REG:v[[0-9]+:[0-9]+]]], v{{[0-9]+}}, 56, [M0]
48; SI: BUFFER_STORE_DWORDX2 [[REG]],
49define void @local_i64_load(i64 addrspace(1)* %out, i64 addrspace(3)* %in) nounwind {
50 %gep = getelementptr i64 addrspace(3)* %in, i32 7
51 %val = load i64 addrspace(3)* %gep, align 8
52 store i64 %val, i64 addrspace(1)* %out, align 8
53 ret void
54}
55
56; SI-LABEL: @local_i64_load_0_offset
57; SI: DS_READ_B64 [[REG:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}}, 0, [M0]
58; SI: BUFFER_STORE_DWORDX2 [[REG]],
59define void @local_i64_load_0_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %in) nounwind {
60 %val = load i64 addrspace(3)* %in, align 8
61 store i64 %val, i64 addrspace(1)* %out, align 8
62 ret void
63}
64
65; SI-LABEL: @local_f64_load
66; SI-NOT: ADD
67; SI: DS_READ_B64 [[REG:v[[0-9]+:[0-9]+]]], v{{[0-9]+}}, 56, [M0]
68; SI: BUFFER_STORE_DWORDX2 [[REG]],
69define void @local_f64_load(double addrspace(1)* %out, double addrspace(3)* %in) nounwind {
70 %gep = getelementptr double addrspace(3)* %in, i32 7
71 %val = load double addrspace(3)* %gep, align 8
72 store double %val, double addrspace(1)* %out, align 8
73 ret void
74}
75
76; SI-LABEL: @local_f64_load_0_offset
77; SI: DS_READ_B64 [[REG:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}}, 0, [M0]
78; SI: BUFFER_STORE_DWORDX2 [[REG]],
79define void @local_f64_load_0_offset(double addrspace(1)* %out, double addrspace(3)* %in) nounwind {
80 %val = load double addrspace(3)* %in, align 8
81 store double %val, double addrspace(1)* %out, align 8
82 ret void
83}
Matt Arsenaultd06ebd92014-03-19 22:19:54 +000084
85; SI-LABEL: @local_i64_store
86; SI-NOT: ADD
87; SI: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 56 [M0]
88define void @local_i64_store(i64 addrspace(3)* %out) nounwind {
89 %gep = getelementptr i64 addrspace(3)* %out, i32 7
90 store i64 5678, i64 addrspace(3)* %gep, align 8
91 ret void
92}
93
94; SI-LABEL: @local_i64_store_0_offset
95; SI-NOT: ADD
96; SI: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 0 [M0]
97define void @local_i64_store_0_offset(i64 addrspace(3)* %out) nounwind {
98 store i64 1234, i64 addrspace(3)* %out, align 8
99 ret void
100}
101
102; SI-LABEL: @local_f64_store
103; SI-NOT: ADD
104; SI: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 56 [M0]
105define void @local_f64_store(double addrspace(3)* %out) nounwind {
106 %gep = getelementptr double addrspace(3)* %out, i32 7
107 store double 16.0, double addrspace(3)* %gep, align 8
108 ret void
109}
110
111; SI-LABEL: @local_f64_store_0_offset
112; SI: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 0 [M0]
113define void @local_f64_store_0_offset(double addrspace(3)* %out) nounwind {
114 store double 20.0, double addrspace(3)* %out, align 8
115 ret void
116}
117
118; SI-LABEL: @local_v2i64_store
119; SI-NOT: ADD
120; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 120 [M0]
121; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 112 [M0]
122define void @local_v2i64_store(<2 x i64> addrspace(3)* %out) nounwind {
123 %gep = getelementptr <2 x i64> addrspace(3)* %out, i32 7
124 store <2 x i64> <i64 5678, i64 5678>, <2 x i64> addrspace(3)* %gep, align 16
125 ret void
126}
127
128; SI-LABEL: @local_v2i64_store_0_offset
129; SI-NOT: ADD
130; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 8 [M0]
131; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 0 [M0]
132define void @local_v2i64_store_0_offset(<2 x i64> addrspace(3)* %out) nounwind {
133 store <2 x i64> <i64 1234, i64 1234>, <2 x i64> addrspace(3)* %out, align 16
134 ret void
135}
136
137; SI-LABEL: @local_v4i64_store
138; SI-NOT: ADD
139; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 248 [M0]
140; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 240 [M0]
141; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 232 [M0]
142; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 224 [M0]
143define void @local_v4i64_store(<4 x i64> addrspace(3)* %out) nounwind {
144 %gep = getelementptr <4 x i64> addrspace(3)* %out, i32 7
145 store <4 x i64> <i64 5678, i64 5678, i64 5678, i64 5678>, <4 x i64> addrspace(3)* %gep, align 16
146 ret void
147}
148
149; SI-LABEL: @local_v4i64_store_0_offset
150; SI-NOT: ADD
151; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 24 [M0]
152; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 16 [M0]
153; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 8 [M0]
154; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 0 [M0]
155define void @local_v4i64_store_0_offset(<4 x i64> addrspace(3)* %out) nounwind {
156 store <4 x i64> <i64 1234, i64 1234, i64 1234, i64 1234>, <4 x i64> addrspace(3)* %out, align 16
157 ret void
158}