| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 1 | ; Test 16-bit atomic XORs. | 
|  | 2 | ; | 
|  | 3 | ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK | 
|  | 4 | ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 | 
|  | 5 | ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 | 
|  | 6 |  | 
|  | 7 | ; Check XOR of a variable. | 
|  | 8 | ; - CHECK is for the main loop. | 
|  | 9 | ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second | 
|  | 10 | ;   RLL is set up correctly.  The negation is independent of the NILL and L | 
|  | 11 | ;   tested in CHECK. | 
|  | 12 | ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word | 
|  | 13 | ;   before being used.  This shift is independent of the other loop prologue | 
|  | 14 | ;   instructions. | 
|  | 15 | define i16 @f1(i16 *%src, i16 %b) { | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 16 | ; CHECK-LABEL: f1: | 
| Richard Sandiford | 84f54a3 | 2013-07-11 08:59:12 +0000 | [diff] [blame] | 17 | ; CHECK-DAG: sllg [[SHIFT:%r[1-9]+]], %r2, 3 | 
|  | 18 | ; CHECK-DAG: risbg [[BASE:%r[1-9]+]], %r2, 0, 189, 0 | 
|  | 19 | ; CHECK: l [[OLD:%r[0-9]+]], 0([[BASE]]) | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 20 | ; CHECK: [[LABEL:\.[^:]*]]: | 
|  | 21 | ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) | 
|  | 22 | ; CHECK: xr [[ROT]], %r3 | 
|  | 23 | ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) | 
| Richard Sandiford | 84f54a3 | 2013-07-11 08:59:12 +0000 | [diff] [blame] | 24 | ; CHECK: cs [[OLD]], [[NEW]], 0([[BASE]]) | 
| Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 25 | ; CHECK: jlh [[LABEL]] | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 26 | ; CHECK: rll %r2, [[OLD]], 16([[SHIFT]]) | 
|  | 27 | ; CHECK: br %r14 | 
|  | 28 | ; | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 29 | ; CHECK-SHIFT1-LABEL: f1: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 30 | ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3 | 
|  | 31 | ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]] | 
|  | 32 | ; CHECK-SHIFT1: rll | 
|  | 33 | ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]]) | 
|  | 34 | ; CHECK-SHIFT1: rll | 
|  | 35 | ; CHECK-SHIFT1: br %r14 | 
|  | 36 | ; | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 37 | ; CHECK-SHIFT2-LABEL: f1: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 38 | ; CHECK-SHIFT2: sll %r3, 16 | 
|  | 39 | ; CHECK-SHIFT2: rll | 
|  | 40 | ; CHECK-SHIFT2: xr {{%r[0-9]+}}, %r3 | 
|  | 41 | ; CHECK-SHIFT2: rll | 
|  | 42 | ; CHECK-SHIFT2: rll | 
|  | 43 | ; CHECK-SHIFT2: br %r14 | 
|  | 44 | %res = atomicrmw xor i16 *%src, i16 %b seq_cst | 
|  | 45 | ret i16 %res | 
|  | 46 | } | 
|  | 47 |  | 
|  | 48 | ; Check the minimum signed value.  We XOR the rotated word with 0x80000000. | 
|  | 49 | define i16 @f2(i16 *%src) { | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 50 | ; CHECK-LABEL: f2: | 
| Richard Sandiford | 84f54a3 | 2013-07-11 08:59:12 +0000 | [diff] [blame] | 51 | ; CHECK-DAG: sllg [[SHIFT:%r[1-9]+]], %r2, 3 | 
|  | 52 | ; CHECK-DAG: risbg [[BASE:%r[1-9]+]], %r2, 0, 189, 0 | 
|  | 53 | ; CHECK: l [[OLD:%r[0-9]+]], 0([[BASE]]) | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 54 | ; CHECK: [[LABEL:\.[^:]*]]: | 
|  | 55 | ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) | 
|  | 56 | ; CHECK: xilf [[ROT]], 2147483648 | 
|  | 57 | ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]]) | 
| Richard Sandiford | 84f54a3 | 2013-07-11 08:59:12 +0000 | [diff] [blame] | 58 | ; CHECK: cs [[OLD]], [[NEW]], 0([[BASE]]) | 
| Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 59 | ; CHECK: jlh [[LABEL]] | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 60 | ; CHECK: rll %r2, [[OLD]], 16([[SHIFT]]) | 
|  | 61 | ; CHECK: br %r14 | 
|  | 62 | ; | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 63 | ; CHECK-SHIFT1-LABEL: f2: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 64 | ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3 | 
|  | 65 | ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]] | 
|  | 66 | ; CHECK-SHIFT1: rll | 
|  | 67 | ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]]) | 
|  | 68 | ; CHECK-SHIFT1: rll | 
|  | 69 | ; CHECK-SHIFT1: br %r14 | 
|  | 70 | ; | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 71 | ; CHECK-SHIFT2-LABEL: f2: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 72 | ; CHECK-SHIFT2: br %r14 | 
|  | 73 | %res = atomicrmw xor i16 *%src, i16 -32768 seq_cst | 
|  | 74 | ret i16 %res | 
|  | 75 | } | 
|  | 76 |  | 
|  | 77 | ; Check XORs of -1.  We XOR the rotated word with 0xffff0000. | 
|  | 78 | define i16 @f3(i16 *%src) { | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 79 | ; CHECK-LABEL: f3: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 80 | ; CHECK: xilf [[ROT]], 4294901760 | 
|  | 81 | ; CHECK: br %r14 | 
|  | 82 | ; | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 83 | ; CHECK-SHIFT1-LABEL: f3: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 84 | ; CHECK-SHIFT1: br %r14 | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 85 | ; CHECK-SHIFT2-LABEL: f3: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 86 | ; CHECK-SHIFT2: br %r14 | 
|  | 87 | %res = atomicrmw xor i16 *%src, i16 -1 seq_cst | 
|  | 88 | ret i16 %res | 
|  | 89 | } | 
|  | 90 |  | 
|  | 91 | ; Check XORs of 1.  We XOR the rotated word with 0x00010000. | 
|  | 92 | define i16 @f4(i16 *%src) { | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 93 | ; CHECK-LABEL: f4: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 94 | ; CHECK: xilf [[ROT]], 65536 | 
|  | 95 | ; CHECK: br %r14 | 
|  | 96 | ; | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 97 | ; CHECK-SHIFT1-LABEL: f4: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 98 | ; CHECK-SHIFT1: br %r14 | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 99 | ; CHECK-SHIFT2-LABEL: f4: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 100 | ; CHECK-SHIFT2: br %r14 | 
|  | 101 | %res = atomicrmw xor i16 *%src, i16 1 seq_cst | 
|  | 102 | ret i16 %res | 
|  | 103 | } | 
|  | 104 |  | 
|  | 105 | ; Check the maximum signed value.  We XOR the rotated word with 0x7fff0000. | 
|  | 106 | define i16 @f5(i16 *%src) { | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 107 | ; CHECK-LABEL: f5: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 108 | ; CHECK: xilf [[ROT]], 2147418112 | 
|  | 109 | ; CHECK: br %r14 | 
|  | 110 | ; | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 111 | ; CHECK-SHIFT1-LABEL: f5: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 112 | ; CHECK-SHIFT1: br %r14 | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 113 | ; CHECK-SHIFT2-LABEL: f5: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 114 | ; CHECK-SHIFT2: br %r14 | 
|  | 115 | %res = atomicrmw xor i16 *%src, i16 32767 seq_cst | 
|  | 116 | ret i16 %res | 
|  | 117 | } | 
|  | 118 |  | 
|  | 119 | ; Check XORs of a large unsigned value.  We XOR the rotated word with | 
|  | 120 | ; 0xfffd0000. | 
|  | 121 | define i16 @f6(i16 *%src) { | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 122 | ; CHECK-LABEL: f6: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 123 | ; CHECK: xilf [[ROT]], 4294770688 | 
|  | 124 | ; CHECK: br %r14 | 
|  | 125 | ; | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 126 | ; CHECK-SHIFT1-LABEL: f6: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 127 | ; CHECK-SHIFT1: br %r14 | 
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame^] | 128 | ; CHECK-SHIFT2-LABEL: f6: | 
| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 129 | ; CHECK-SHIFT2: br %r14 | 
|  | 130 | %res = atomicrmw xor i16 *%src, i16 65533 seq_cst | 
|  | 131 | ret i16 %res | 
|  | 132 | } |