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Chris Lattnerf5bd1b72003-10-05 19:27:59 +00001//===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//
John Criswelld3032032003-10-20 20:20:30 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
Chris Lattnerf5bd1b72003-10-05 19:27:59 +00009//
10// FIXME: Document.
11//
12//===----------------------------------------------------------------------===//
13
14#include "CodeEmitterGen.h"
15#include "Record.h"
16#include "Support/Debug.h"
17
18void CodeEmitterGen::run(std::ostream &o) {
19 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
20
21 EmitSourceFileHeader("Machine Code Emitter", o);
22
23 std::string Namespace = "V9::";
24 std::string ClassName = "SparcV9CodeEmitter::";
25
26 //const std::string &Namespace = Inst->getValue("Namespace")->getName();
27 o << "unsigned " << ClassName
28 << "getBinaryCodeForInstr(MachineInstr &MI) {\n"
29 << " unsigned Value = 0;\n"
30 << " DEBUG(std::cerr << MI);\n"
31 << " switch (MI.getOpcode()) {\n";
32 for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
33 I != E; ++I) {
34 Record *R = *I;
35 o << " case " << Namespace << R->getName() << ": {\n"
36 << " DEBUG(std::cerr << \"Emitting " << R->getName() << "\\n\");\n";
37
38 BitsInit *BI = R->getValueAsBitsInit("Inst");
39
40 unsigned Value = 0;
41 const std::vector<RecordVal> &Vals = R->getValues();
42
43 DEBUG(o << " // prefilling: ");
44 // Start by filling in fixed values...
45 for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
46 if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1))) {
47 Value |= B->getValue() << (e-i-1);
48 DEBUG(o << B->getValue());
49 } else {
50 DEBUG(o << "0");
51 }
52 }
53 DEBUG(o << "\n");
54
55 DEBUG(o << " // " << *R->getValue("Inst") << "\n");
56 o << " Value = " << Value << "U;\n\n";
57
58 // Loop over all of the fields in the instruction determining which are the
59 // operands to the instruction.
60 //
61 unsigned op = 0;
62 std::map<std::string, unsigned> OpOrder;
63 std::map<std::string, bool> OpContinuous;
64 for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
65 if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
66 // Is the operand continuous? If so, we can just mask and OR it in
67 // instead of doing it bit-by-bit, saving a lot in runtime cost.
68 const BitsInit *InstInit = BI;
69 int beginBitInVar = -1, endBitInVar = -1;
70 int beginBitInInst = -1, endBitInInst = -1;
71 bool continuous = true;
72
73 for (int bit = InstInit->getNumBits()-1; bit >= 0; --bit) {
74 if (VarBitInit *VBI =
75 dynamic_cast<VarBitInit*>(InstInit->getBit(bit))) {
76 TypedInit *TI = VBI->getVariable();
77 if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
78 // only process the current variable
79 if (VI->getName() != Vals[i].getName())
80 continue;
81
82 if (beginBitInVar == -1)
83 beginBitInVar = VBI->getBitNum();
84
85 if (endBitInVar == -1)
86 endBitInVar = VBI->getBitNum();
87 else {
88 if (endBitInVar == (int)VBI->getBitNum() + 1)
89 endBitInVar = VBI->getBitNum();
90 else {
91 continuous = false;
92 break;
93 }
94 }
95
96 if (beginBitInInst == -1)
97 beginBitInInst = bit;
98 if (endBitInInst == -1)
99 endBitInInst = bit;
100 else {
101 if (endBitInInst == bit + 1)
102 endBitInInst = bit;
103 else {
104 continuous = false;
105 break;
106 }
107 }
108
109 // maintain same distance between bits in field and bits in
110 // instruction. if the relative distances stay the same
111 // throughout,
112 if (beginBitInVar - (int)VBI->getBitNum() !=
113 beginBitInInst - bit) {
114 continuous = false;
115 break;
116 }
117 }
118 }
119 }
120
121 // If we have found no bit in "Inst" which comes from this field, then
122 // this is not an operand!!
123 if (beginBitInInst != -1) {
124 o << " // op" << op << ": " << Vals[i].getName() << "\n"
125 << " int64_t op" << op
126 <<" = getMachineOpValue(MI, MI.getOperand("<<op<<"));\n";
127 //<< " MachineOperand &op" << op <<" = MI.getOperand("<<op<<");\n";
128 OpOrder[Vals[i].getName()] = op++;
129
130 DEBUG(o << " // Var: begin = " << beginBitInVar
131 << ", end = " << endBitInVar
132 << "; Inst: begin = " << beginBitInInst
133 << ", end = " << endBitInInst << "\n");
134
135 if (continuous) {
136 DEBUG(o << " // continuous: op" << OpOrder[Vals[i].getName()]
137 << "\n");
138
139 // Mask off the right bits
140 // Low mask (ie. shift, if necessary)
141 assert(endBitInVar >= 0 && "Negative shift amount in masking!");
142 if (endBitInVar != 0) {
143 o << " op" << OpOrder[Vals[i].getName()]
144 << " >>= " << endBitInVar << ";\n";
145 beginBitInVar -= endBitInVar;
146 endBitInVar = 0;
147 }
148
149 // High mask
150 o << " op" << OpOrder[Vals[i].getName()]
151 << " &= (1<<" << beginBitInVar+1 << ") - 1;\n";
152
153 // Shift the value to the correct place (according to place in inst)
154 assert(endBitInInst >= 0 && "Negative shift amount in inst position!");
155 if (endBitInInst != 0)
156 o << " op" << OpOrder[Vals[i].getName()]
157 << " <<= " << endBitInInst << ";\n";
158
159 // Just OR in the result
160 o << " Value |= op" << OpOrder[Vals[i].getName()] << ";\n";
161 }
162
163 // otherwise, will be taken care of in the loop below using this
164 // value:
165 OpContinuous[Vals[i].getName()] = continuous;
166 }
167 }
168 }
169
170 for (unsigned f = 0, e = Vals.size(); f != e; ++f) {
171 if (Vals[f].getPrefix()) {
172 BitsInit *FieldInitializer = (BitsInit*)Vals[f].getValue();
173
174 // Scan through the field looking for bit initializers of the current
175 // variable...
176 for (int i = FieldInitializer->getNumBits()-1; i >= 0; --i) {
177 if (BitInit *BI = dynamic_cast<BitInit*>(FieldInitializer->getBit(i)))
178 {
179 DEBUG(o << " // bit init: f: " << f << ", i: " << i << "\n");
180 } else if (UnsetInit *UI =
181 dynamic_cast<UnsetInit*>(FieldInitializer->getBit(i))) {
182 DEBUG(o << " // unset init: f: " << f << ", i: " << i << "\n");
183 } else if (VarBitInit *VBI =
184 dynamic_cast<VarBitInit*>(FieldInitializer->getBit(i))) {
185 TypedInit *TI = VBI->getVariable();
186 if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
187 // If the bits of the field are laid out consecutively in the
188 // instruction, then instead of separately ORing in bits, just
189 // mask and shift the entire field for efficiency.
190 if (OpContinuous[VI->getName()]) {
191 // already taken care of in the loop above, thus there is no
192 // need to individually OR in the bits
193
194 // for debugging, output the regular version anyway, commented
195 DEBUG(o << " // Value |= getValueBit(op"
196 << OpOrder[VI->getName()] << ", " << VBI->getBitNum()
197 << ")" << " << " << i << ";\n");
198 } else {
199 o << " Value |= getValueBit(op" << OpOrder[VI->getName()]
200 << ", " << VBI->getBitNum()
201 << ")" << " << " << i << ";\n";
202 }
203 } else if (FieldInit *FI = dynamic_cast<FieldInit*>(TI)) {
204 // FIXME: implement this!
205 o << "FIELD INIT not implemented yet!\n";
206 } else {
207 o << "Error: UNIMPLEMENTED\n";
208 }
209 }
210 }
211 }
212 }
213
214 o << " break;\n"
215 << " }\n";
216 }
217
218 o << " default:\n"
219 << " std::cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
220 << " abort();\n"
221 << " }\n"
222 << " return Value;\n"
223 << "}\n";
224}