| Tim Renouf | d68fa1b | 2018-01-09 21:36:25 +0000 | [diff] [blame^] | 1 | ; RUN: llc -march=amdgcn -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck %s |
| 2 | ; RUN: llc -march=amdgcn -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck %s |
| 3 | |
| 4 | ; On gfx6 and gfx7, this test shows a bug in SelectionDAG where scalarizing the |
| 5 | ; extension of a vector of f16 generates an illegal node that errors later. |
| 6 | |
| 7 | ; CHECK-LABEL: {{^}}main: |
| 8 | ; CHECK: v_cvt_f32_f16 |
| 9 | |
| 10 | define amdgpu_gs void @main(i32 inreg %arg) local_unnamed_addr #0 { |
| 11 | .entry: |
| 12 | %tmp = load volatile float, float addrspace(1)* undef |
| 13 | %tmp1 = bitcast float %tmp to i32 |
| 14 | %im0.i = lshr i32 %tmp1, 16 |
| 15 | %tmp2 = insertelement <2 x i32> undef, i32 %im0.i, i32 1 |
| 16 | %tmp3 = trunc <2 x i32> %tmp2 to <2 x i16> |
| 17 | %tmp4 = bitcast <2 x i16> %tmp3 to <2 x half> |
| 18 | %tmp5 = fpext <2 x half> %tmp4 to <2 x float> |
| 19 | %bc = bitcast <2 x float> %tmp5 to <2 x i32> |
| 20 | %tmp6 = extractelement <2 x i32> %bc, i32 1 |
| 21 | store volatile i32 %tmp6, i32 addrspace(1)* undef |
| 22 | ret void |
| 23 | } |
| 24 | |
| 25 | attributes #0 = { nounwind } |
| 26 | |