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gerrit-public.fairphone.software / toolchain / llvm-project / d85260827ce64ae0e8a24a57aa48e7898b51e90d / . / llvm / test / CodeGen / ARM / fnmscs.ll
blob: 5fa6b219388d5b10e921ecb23f0ebce94c69befe [file] [log] [blame]
Saleem Abdulrasool72587352014-04-03 16:01:44 +0000[diff] [blame]1; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o - \
2; RUN: | FileCheck %s -check-prefix=VFP2
3
4; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - \
5; RUN: | FileCheck %s -check-prefix=NEON
6
7; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
8; RUN: | FileCheck %s -check-prefix=A8
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10; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 -regalloc=basic %s -o - \
11; RUN: | FileCheck %s -check-prefix=A8
12
13; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
14; RUN: | FileCheck %s -check-prefix=A8U
15
16; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
17; RUN: | FileCheck %s -check-prefix=A8U
David Goodwin3b9c52c2009-08-04 17:53:06 +0000[diff] [blame]18
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]19define float @t1(float %acc, float %a, float %b) nounwind {
David Goodwin3b9c52c2009-08-04 17:53:06 +0000[diff] [blame]20entry:
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]21; VFP2-LABEL: t1:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]22; VFP2: vnmla.f32
23
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]24; NEON-LABEL: t1:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]25; NEON: vnmla.f32
26
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]27; A8U-LABEL: t1:
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]28; A8U: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
29; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
30
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]31; A8-LABEL: t1:
Jakob Stoklund Olesen0888bcf2011-03-31 22:14:03 +0000[diff] [blame]32; A8: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]33; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
David Goodwin3b9c52c2009-08-04 17:53:06 +0000[diff] [blame]34 %0 = fmul float %a, %b
David Goodwin108b5222009-08-10 22:31:04 +0000[diff] [blame]35 %1 = fsub float -0.0, %0
David Goodwin3b9c52c2009-08-04 17:53:06 +0000[diff] [blame]36 %2 = fsub float %1, %acc
37 ret float %2
38}
39
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]40define float @t2(float %acc, float %a, float %b) nounwind {
David Goodwina2824d52009-08-04 18:11:59 +0000[diff] [blame]41entry:
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]42; VFP2-LABEL: t2:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]43; VFP2: vnmla.f32
44
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]45; NEON-LABEL: t2:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]46; NEON: vnmla.f32
47
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]48; A8U-LABEL: t2:
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]49; A8U: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
50; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
51
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]52; A8-LABEL: t2:
Evan Cheng93b5cdc2011-05-03 19:09:32 +0000[diff] [blame]53; A8: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]54; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
David Goodwina2824d52009-08-04 18:11:59 +0000[diff] [blame]55 %0 = fmul float %a, %b
56 %1 = fmul float -1.0, %0
57 %2 = fsub float %1, %acc
58 ret float %2
59}
60
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]61define double @t3(double %acc, double %a, double %b) nounwind {
62entry:
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]63; VFP2-LABEL: t3:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]64; VFP2: vnmla.f64
65
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]66; NEON-LABEL: t3:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]67; NEON: vnmla.f64
68
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]69; A8U-LABEL: t3:
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]70; A8U: vnmul.f64 d
71; A8U: vsub.f64 d
72
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]73; A8-LABEL: t3:
Jakob Stoklund Olesenac6cfa42013-01-19 00:03:32 +0000[diff] [blame]74; A8: vnmul.f64 d
75; A8: vsub.f64 d
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]76 %0 = fmul double %a, %b
77 %1 = fsub double -0.0, %0
78 %2 = fsub double %1, %acc
79 ret double %2
80}
81
82define double @t4(double %acc, double %a, double %b) nounwind {
83entry:
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]84; VFP2-LABEL: t4:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]85; VFP2: vnmla.f64
86
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]87; NEON-LABEL: t4:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]88; NEON: vnmla.f64
89
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]90; A8U-LABEL: t4:
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]91; A8U: vnmul.f64 d
92; A8U: vsub.f64 d
93
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]94; A8-LABEL: t4:
Jakob Stoklund Olesenac6cfa42013-01-19 00:03:32 +0000[diff] [blame]95; A8: vnmul.f64 d
96; A8: vsub.f64 d
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]97 %0 = fmul double %a, %b
98 %1 = fmul double -1.0, %0
99 %2 = fsub double %1, %acc
100 ret double %2
101}