Chandler Carruth | 985454e | 2012-07-18 18:58:22 +0000 | [diff] [blame] | 1 | ; Tests for the two-address instruction pass. |
Tim Northover | b4ddc08 | 2014-05-30 10:09:59 +0000 | [diff] [blame] | 2 | ; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 -arm-atomic-cfg-tidy=0 %s -o - | FileCheck %s |
Chandler Carruth | 985454e | 2012-07-18 18:58:22 +0000 | [diff] [blame] | 3 | |
| 4 | define void @PR13378() nounwind { |
| 5 | ; This was orriginally a crasher trying to schedule the instructions. |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 6 | ; CHECK-LABEL: PR13378: |
Evan Cheng | 90ae8f8 | 2012-09-18 01:42:45 +0000 | [diff] [blame] | 7 | ; CHECK: vld1.32 |
Matthias Braun | 77219d8 | 2013-10-11 18:09:19 +0000 | [diff] [blame] | 8 | ; CHECK-NEXT: vst1.32 |
| 9 | ; CHECK-NEXT: vst1.32 |
| 10 | ; CHECK-NEXT: vmov.f32 |
| 11 | ; CHECK-NEXT: vmov.f32 |
| 12 | ; CHECK-NEXT: vst1.32 |
Chandler Carruth | 985454e | 2012-07-18 18:58:22 +0000 | [diff] [blame] | 13 | |
| 14 | entry: |
Evan Cheng | 363d73c | 2012-09-20 21:35:21 +0000 | [diff] [blame] | 15 | %0 = load <4 x float>* undef, align 4 |
| 16 | store <4 x float> zeroinitializer, <4 x float>* undef, align 4 |
| 17 | store <4 x float> %0, <4 x float>* undef, align 4 |
Chandler Carruth | 985454e | 2012-07-18 18:58:22 +0000 | [diff] [blame] | 18 | %1 = insertelement <4 x float> %0, float 1.000000e+00, i32 3 |
Evan Cheng | 363d73c | 2012-09-20 21:35:21 +0000 | [diff] [blame] | 19 | store <4 x float> %1, <4 x float>* undef, align 4 |
Chandler Carruth | 985454e | 2012-07-18 18:58:22 +0000 | [diff] [blame] | 20 | unreachable |
| 21 | } |