Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s | FileCheck %s |
| 2 | |
| 3 | target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" |
| 4 | target triple = "powerpc64-unknown-linux-gnu" |
| 5 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 6 | define i8* @test_stbu(i8* %base, i8 zeroext %val) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 7 | entry: |
| 8 | %arrayidx = getelementptr inbounds i8* %base, i64 16 |
| 9 | store i8 %val, i8* %arrayidx, align 1 |
| 10 | ret i8* %arrayidx |
| 11 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 12 | ; CHECK: @test_stbu |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 13 | ; CHECK: %entry |
| 14 | ; CHECK-NEXT: stbu |
| 15 | ; CHECK-NEXT: blr |
| 16 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 17 | define i8* @test_stbux(i8* %base, i8 zeroext %val, i64 %offset) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 18 | entry: |
| 19 | %arrayidx = getelementptr inbounds i8* %base, i64 %offset |
| 20 | store i8 %val, i8* %arrayidx, align 1 |
| 21 | ret i8* %arrayidx |
| 22 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 23 | ; CHECK: @test_stbux |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 24 | ; CHECK: %entry |
| 25 | ; CHECK-NEXT: stbux |
| 26 | ; CHECK-NEXT: blr |
| 27 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 28 | define i16* @test_sthu(i16* %base, i16 zeroext %val) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 29 | entry: |
| 30 | %arrayidx = getelementptr inbounds i16* %base, i64 16 |
| 31 | store i16 %val, i16* %arrayidx, align 2 |
| 32 | ret i16* %arrayidx |
| 33 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 34 | ; CHECK: @test_sthu |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 35 | ; CHECK: %entry |
| 36 | ; CHECK-NEXT: sthu |
| 37 | ; CHECK-NEXT: blr |
| 38 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 39 | define i16* @test_sthux(i16* %base, i16 zeroext %val, i64 %offset) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 40 | entry: |
| 41 | %arrayidx = getelementptr inbounds i16* %base, i64 %offset |
| 42 | store i16 %val, i16* %arrayidx, align 2 |
| 43 | ret i16* %arrayidx |
| 44 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 45 | ; CHECK: @test_sthux |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 46 | ; CHECK: %entry |
| 47 | ; CHECK-NEXT: sldi |
| 48 | ; CHECK-NEXT: sthux |
| 49 | ; CHECK-NEXT: blr |
| 50 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 51 | define i32* @test_stwu(i32* %base, i32 zeroext %val) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 52 | entry: |
| 53 | %arrayidx = getelementptr inbounds i32* %base, i64 16 |
| 54 | store i32 %val, i32* %arrayidx, align 4 |
| 55 | ret i32* %arrayidx |
| 56 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 57 | ; CHECK: @test_stwu |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 58 | ; CHECK: %entry |
| 59 | ; CHECK-NEXT: stwu |
| 60 | ; CHECK-NEXT: blr |
| 61 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 62 | define i32* @test_stwux(i32* %base, i32 zeroext %val, i64 %offset) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 63 | entry: |
| 64 | %arrayidx = getelementptr inbounds i32* %base, i64 %offset |
| 65 | store i32 %val, i32* %arrayidx, align 4 |
| 66 | ret i32* %arrayidx |
| 67 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 68 | ; CHECK: @test_stwux |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 69 | ; CHECK: %entry |
| 70 | ; CHECK-NEXT: sldi |
| 71 | ; CHECK-NEXT: stwux |
| 72 | ; CHECK-NEXT: blr |
| 73 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 74 | define i8* @test_stbu8(i8* %base, i64 %val) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 75 | entry: |
| 76 | %conv = trunc i64 %val to i8 |
| 77 | %arrayidx = getelementptr inbounds i8* %base, i64 16 |
| 78 | store i8 %conv, i8* %arrayidx, align 1 |
| 79 | ret i8* %arrayidx |
| 80 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 81 | ; CHECK: @test_stbu8 |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 82 | ; CHECK: %entry |
| 83 | ; CHECK-NEXT: stbu |
| 84 | ; CHECK-NEXT: blr |
| 85 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 86 | define i8* @test_stbux8(i8* %base, i64 %val, i64 %offset) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 87 | entry: |
| 88 | %conv = trunc i64 %val to i8 |
| 89 | %arrayidx = getelementptr inbounds i8* %base, i64 %offset |
| 90 | store i8 %conv, i8* %arrayidx, align 1 |
| 91 | ret i8* %arrayidx |
| 92 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 93 | ; CHECK: @test_stbux8 |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 94 | ; CHECK: %entry |
| 95 | ; CHECK-NEXT: stbux |
| 96 | ; CHECK-NEXT: blr |
| 97 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 98 | define i16* @test_sthu8(i16* %base, i64 %val) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 99 | entry: |
| 100 | %conv = trunc i64 %val to i16 |
| 101 | %arrayidx = getelementptr inbounds i16* %base, i64 16 |
| 102 | store i16 %conv, i16* %arrayidx, align 2 |
| 103 | ret i16* %arrayidx |
| 104 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 105 | ; CHECK: @test_sthu |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 106 | ; CHECK: %entry |
| 107 | ; CHECK-NEXT: sthu |
| 108 | ; CHECK-NEXT: blr |
| 109 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 110 | define i16* @test_sthux8(i16* %base, i64 %val, i64 %offset) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 111 | entry: |
| 112 | %conv = trunc i64 %val to i16 |
| 113 | %arrayidx = getelementptr inbounds i16* %base, i64 %offset |
| 114 | store i16 %conv, i16* %arrayidx, align 2 |
| 115 | ret i16* %arrayidx |
| 116 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 117 | ; CHECK: @test_sthux |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 118 | ; CHECK: %entry |
| 119 | ; CHECK-NEXT: sldi |
| 120 | ; CHECK-NEXT: sthux |
| 121 | ; CHECK-NEXT: blr |
| 122 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 123 | define i32* @test_stwu8(i32* %base, i64 %val) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 124 | entry: |
| 125 | %conv = trunc i64 %val to i32 |
| 126 | %arrayidx = getelementptr inbounds i32* %base, i64 16 |
| 127 | store i32 %conv, i32* %arrayidx, align 4 |
| 128 | ret i32* %arrayidx |
| 129 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 130 | ; CHECK: @test_stwu |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 131 | ; CHECK: %entry |
| 132 | ; CHECK-NEXT: stwu |
| 133 | ; CHECK-NEXT: blr |
| 134 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 135 | define i32* @test_stwux8(i32* %base, i64 %val, i64 %offset) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 136 | entry: |
| 137 | %conv = trunc i64 %val to i32 |
| 138 | %arrayidx = getelementptr inbounds i32* %base, i64 %offset |
| 139 | store i32 %conv, i32* %arrayidx, align 4 |
| 140 | ret i32* %arrayidx |
| 141 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 142 | ; CHECK: @test_stwux |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 143 | ; CHECK: %entry |
| 144 | ; CHECK-NEXT: sldi |
| 145 | ; CHECK-NEXT: stwux |
| 146 | ; CHECK-NEXT: blr |
| 147 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 148 | define i64* @test_stdu(i64* %base, i64 %val) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 149 | entry: |
| 150 | %arrayidx = getelementptr inbounds i64* %base, i64 16 |
| 151 | store i64 %val, i64* %arrayidx, align 8 |
| 152 | ret i64* %arrayidx |
| 153 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 154 | ; CHECK: @test_stdu |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 155 | ; CHECK: %entry |
| 156 | ; CHECK-NEXT: stdu |
| 157 | ; CHECK-NEXT: blr |
| 158 | |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 159 | define i64* @test_stdux(i64* %base, i64 %val, i64 %offset) nounwind { |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 160 | entry: |
| 161 | %arrayidx = getelementptr inbounds i64* %base, i64 %offset |
| 162 | store i64 %val, i64* %arrayidx, align 8 |
| 163 | ret i64* %arrayidx |
| 164 | } |
Stephen Lin | 98cbca2 | 2013-07-18 22:29:15 +0000 | [diff] [blame] | 165 | ; CHECK: @test_stdux |
Ulrich Weigand | d850167 | 2013-03-19 19:52:04 +0000 | [diff] [blame] | 166 | ; CHECK: %entry |
| 167 | ; CHECK-NEXT: sldi |
| 168 | ; CHECK-NEXT: stdux |
| 169 | ; CHECK-NEXT: blr |
| 170 | |