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gerrit-public.fairphone.software / toolchain / llvm-project / d8f528adb833ab8b13cfa840f10e8b920ee0158b / . / llvm / test / CodeGen / X86 / vector-shuffle-256-v32.ll
blob: 127159db2c4eb6436e2d3b9c86806e905fc6d285 [file] [log] [blame]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1; RUN: llc < %s -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
2; RUN: llc < %s -mcpu=x86-64 -mattr=+avx2 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
3
4target triple = "x86_64-unknown-unknown"
5
6define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
7; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
8; AVX1: # BB#0:
9; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
10; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0
11; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
12; AVX1-NEXT: retq
13;
14; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
15; AVX2: # BB#0:
16; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
17; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm0
18; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
19; AVX2-NEXT: retq
20 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
21 ret <32 x i8> %shuffle
22}
23
24define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00(<32 x i8> %a, <32 x i8> %b) {
25; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00
26; AVX1: # BB#0:
27; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
28; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
29; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0]
30; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
31; AVX1-NEXT: retq
32;
33; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00
34; AVX2: # BB#0:
35; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
36; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
37; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0]
38; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
39; AVX2-NEXT: retq
40 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0>
41 ret <32 x i8> %shuffle
42}
43
44define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00(<32 x i8> %a, <32 x i8> %b) {
45; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00
46; AVX1: # BB#0:
47; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
48; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
49; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0]
50; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
51; AVX1-NEXT: retq
52;
53; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00
54; AVX2: # BB#0:
55; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
56; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
57; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0]
58; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
59; AVX2-NEXT: retq
60 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0>
61 ret <32 x i8> %shuffle
62}
63
64define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_03_00_00_00(<32 x i8> %a, <32 x i8> %b) {
65; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_03_00_00_00
66; AVX1: # BB#0:
67; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
68; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
69; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,3,0,0,0]
70; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
71; AVX1-NEXT: retq
72;
73; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_03_00_00_00
74; AVX2: # BB#0:
75; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
76; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
77; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,3,0,0,0]
78; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
79; AVX2-NEXT: retq
80 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0>
81 ret <32 x i8> %shuffle
82}
83
84define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_04_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
85; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_04_00_00_00_00
86; AVX1: # BB#0:
87; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
88; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
89; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,4,0,0,0,0]
90; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
91; AVX1-NEXT: retq
92;
93; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_04_00_00_00_00
94; AVX2: # BB#0:
95; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
96; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
97; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,4,0,0,0,0]
98; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
99; AVX2-NEXT: retq
100 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 0>
101 ret <32 x i8> %shuffle
102}
103
104define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_05_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
105; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_05_00_00_00_00_00
106; AVX1: # BB#0:
107; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
108; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
109; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,5,0,0,0,0,0]
110; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
111; AVX1-NEXT: retq
112;
113; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_05_00_00_00_00_00
114; AVX2: # BB#0:
115; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
116; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
117; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,5,0,0,0,0,0]
118; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
119; AVX2-NEXT: retq
120 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0>
121 ret <32 x i8> %shuffle
122}
123
124define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_06_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
125; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_06_00_00_00_00_00_00
126; AVX1: # BB#0:
127; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
128; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
129; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,6,0,0,0,0,0,0]
130; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
131; AVX1-NEXT: retq
132;
133; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_06_00_00_00_00_00_00
134; AVX2: # BB#0:
135; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
136; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
137; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,6,0,0,0,0,0,0]
138; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
139; AVX2-NEXT: retq
140 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 6, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
141 ret <32 x i8> %shuffle
142}
143
144define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
145; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00
146; AVX1: # BB#0:
147; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
148; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
149; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,7,0,0,0,0,0,0,0]
150; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
151; AVX1-NEXT: retq
152;
153; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00
154; AVX2: # BB#0:
155; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
156; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
157; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,7,0,0,0,0,0,0,0]
158; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
159; AVX2-NEXT: retq
160 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
161 ret <32 x i8> %shuffle
162}
163
164define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
165; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00
166; AVX1: # BB#0:
167; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
168; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
169; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,8,0,0,0,0,0,0,0,0]
170; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
171; AVX1-NEXT: retq
172;
173; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00
174; AVX2: # BB#0:
175; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
176; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
177; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,8,0,0,0,0,0,0,0,0]
178; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
179; AVX2-NEXT: retq
180 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
181 ret <32 x i8> %shuffle
182}
183
184define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_09_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
185; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_09_00_00_00_00_00_00_00_00_00
186; AVX1: # BB#0:
187; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
188; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
189; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,9,0,0,0,0,0,0,0,0,0]
190; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
191; AVX1-NEXT: retq
192;
193; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_09_00_00_00_00_00_00_00_00_00
194; AVX2: # BB#0:
195; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
196; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
197; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,9,0,0,0,0,0,0,0,0,0]
198; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
199; AVX2-NEXT: retq
200 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 9, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
201 ret <32 x i8> %shuffle
202}
203
204define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_10_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
205; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_10_00_00_00_00_00_00_00_00_00_00
206; AVX1: # BB#0:
207; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
208; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
209; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,10,0,0,0,0,0,0,0,0,0,0]
210; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
211; AVX1-NEXT: retq
212;
213; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_10_00_00_00_00_00_00_00_00_00_00
214; AVX2: # BB#0:
215; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
216; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
217; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,10,0,0,0,0,0,0,0,0,0,0]
218; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
219; AVX2-NEXT: retq
220 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
221 ret <32 x i8> %shuffle
222}
223
224define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_11_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
225; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_11_00_00_00_00_00_00_00_00_00_00_00
226; AVX1: # BB#0:
227; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
228; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
229; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,11,0,0,0,0,0,0,0,0,0,0,0]
230; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
231; AVX1-NEXT: retq
232;
233; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_11_00_00_00_00_00_00_00_00_00_00_00
234; AVX2: # BB#0:
235; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
236; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
237; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,11,0,0,0,0,0,0,0,0,0,0,0]
238; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
239; AVX2-NEXT: retq
240 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 11, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
241 ret <32 x i8> %shuffle
242}
243
244define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_12_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
245; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_12_00_00_00_00_00_00_00_00_00_00_00_00
246; AVX1: # BB#0:
247; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
248; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
249; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,12,0,0,0,0,0,0,0,0,0,0,0,0]
250; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
251; AVX1-NEXT: retq
252;
253; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_12_00_00_00_00_00_00_00_00_00_00_00_00
254; AVX2: # BB#0:
255; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
256; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
257; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,12,0,0,0,0,0,0,0,0,0,0,0,0]
258; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
259; AVX2-NEXT: retq
260 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 12, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
261 ret <32 x i8> %shuffle
262}
263
264define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_13_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
265; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_13_00_00_00_00_00_00_00_00_00_00_00_00_00
266; AVX1: # BB#0:
267; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
268; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
269; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,13,0,0,0,0,0,0,0,0,0,0,0,0,0]
270; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
271; AVX1-NEXT: retq
272;
273; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_13_00_00_00_00_00_00_00_00_00_00_00_00_00
274; AVX2: # BB#0:
275; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
276; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
277; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,13,0,0,0,0,0,0,0,0,0,0,0,0,0]
278; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
279; AVX2-NEXT: retq
280 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 13, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
281 ret <32 x i8> %shuffle
282}
283
284define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
285; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00
286; AVX1: # BB#0:
287; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
288; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
289; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,14,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
290; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
291; AVX1-NEXT: retq
292;
293; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00
294; AVX2: # BB#0:
295; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
296; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
297; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,14,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
298; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
299; AVX2-NEXT: retq
300 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
301 ret <32 x i8> %shuffle
302}
303
304define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
305; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
306; AVX1: # BB#0:
307; AVX1-NEXT: movl $15, %eax
308; AVX1-NEXT: vmovd %eax, %xmm1
309; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
310; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
311; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
312; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
313; AVX1-NEXT: retq
314;
315; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
316; AVX2: # BB#0:
317; AVX2-NEXT: movl $15, %eax
318; AVX2-NEXT: vmovd %eax, %xmm1
319; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
320; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
321; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0
322; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
323; AVX2-NEXT: retq
324 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
325 ret <32 x i8> %shuffle
326}
327
328define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
329; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
330; AVX1: # BB#0:
331; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
332; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
333; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
334; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0]
335; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],zero
336; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
337; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
338; AVX1-NEXT: retq
339;
340; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
341; AVX2: # BB#0:
342; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
343; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
344; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
345; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0]
346; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],zero
347; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
348; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
349; AVX2-NEXT: retq
350 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
351 ret <32 x i8> %shuffle
352}
353
354define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_17_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
355; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_17_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
356; AVX1: # BB#0:
357; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
358; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
359; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
360; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero
361; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0]
362; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
363; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
364; AVX1-NEXT: retq
365;
366; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_17_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
367; AVX2: # BB#0:
368; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
369; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
370; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
371; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero
372; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0]
373; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
374; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
375; AVX2-NEXT: retq
376 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 17, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
377 ret <32 x i8> %shuffle
378}
379
380define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_18_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
381; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_18_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
382; AVX1: # BB#0:
383; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
384; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
385; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
386; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[2],zero,zero
387; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0]
388; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
389; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
390; AVX1-NEXT: retq
391;
392; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_18_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
393; AVX2: # BB#0:
394; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
395; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
396; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
397; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[2],zero,zero
398; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0]
399; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
400; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
401; AVX2-NEXT: retq
402 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 18, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
403 ret <32 x i8> %shuffle
404}
405
406define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_19_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
407; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_19_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
408; AVX1: # BB#0:
409; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
410; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
411; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
412; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[3],zero,zero,zero
413; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0]
414; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
415; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
416; AVX1-NEXT: retq
417;
418; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_19_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
419; AVX2: # BB#0:
420; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
421; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
422; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
423; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[3],zero,zero,zero
424; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0]
425; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
426; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
427; AVX2-NEXT: retq
428 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 19, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
429 ret <32 x i8> %shuffle
430}
431
432define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_20_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
433; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_20_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
434; AVX1: # BB#0:
435; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
436; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
437; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
438; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[4],zero,zero,zero,zero
439; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0]
440; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
441; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
442; AVX1-NEXT: retq
443;
444; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_20_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
445; AVX2: # BB#0:
446; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
447; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
448; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
449; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[4],zero,zero,zero,zero
450; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0]
451; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
452; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
453; AVX2-NEXT: retq
454 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
455 ret <32 x i8> %shuffle
456}
457
458define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_21_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
459; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_21_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
460; AVX1: # BB#0:
461; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
462; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
463; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
464; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[5],zero,zero,zero,zero,zero
465; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0]
466; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
467; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
468; AVX1-NEXT: retq
469;
470; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_21_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
471; AVX2: # BB#0:
472; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
473; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
474; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
475; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[5],zero,zero,zero,zero,zero
476; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0]
477; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
478; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
479; AVX2-NEXT: retq
480 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 21, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
481 ret <32 x i8> %shuffle
482}
483
484define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_22_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
485; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_22_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
486; AVX1: # BB#0:
487; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
488; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
489; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
490; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[6],zero,zero,zero,zero,zero,zero
491; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0]
492; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
493; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
494; AVX1-NEXT: retq
495;
496; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_22_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
497; AVX2: # BB#0:
498; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
499; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
500; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
501; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[6],zero,zero,zero,zero,zero,zero
502; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0]
503; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
504; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
505; AVX2-NEXT: retq
506 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 22, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
507 ret <32 x i8> %shuffle
508}
509
510define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_23_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
511; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_23_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
512; AVX1: # BB#0:
513; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
514; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
515; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
516; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[7],zero,zero,zero,zero,zero,zero,zero
517; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0]
518; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
519; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
520; AVX1-NEXT: retq
521;
522; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_23_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
523; AVX2: # BB#0:
524; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
525; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
526; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
527; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[7],zero,zero,zero,zero,zero,zero,zero
528; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0]
529; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
530; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
531; AVX2-NEXT: retq
532 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 23, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
533 ret <32 x i8> %shuffle
534}
535
536define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_24_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
537; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_24_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
538; AVX1: # BB#0:
539; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
540; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
541; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
542; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,xmm2[8],zero,zero,zero,zero,zero,zero,zero,zero
543; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0]
544; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
545; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
546; AVX1-NEXT: retq
547;
548; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_24_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
549; AVX2: # BB#0:
550; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
551; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
552; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
553; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,xmm2[8],zero,zero,zero,zero,zero,zero,zero,zero
554; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0]
555; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
556; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
557; AVX2-NEXT: retq
558 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 24, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
559 ret <32 x i8> %shuffle
560}
561
562define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_25_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
563; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_25_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
564; AVX1: # BB#0:
565; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
566; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
567; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
568; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,xmm2[9],zero,zero,zero,zero,zero,zero,zero,zero,zero
569; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0]
570; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
571; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
572; AVX1-NEXT: retq
573;
574; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_25_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
575; AVX2: # BB#0:
576; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
577; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
578; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
579; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,xmm2[9],zero,zero,zero,zero,zero,zero,zero,zero,zero
580; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0]
581; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
582; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
583; AVX2-NEXT: retq
584 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
585 ret <32 x i8> %shuffle
586}
587
588define <32 x i8> @shuffle_v32i8_00_00_00_00_00_26_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
589; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_26_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
590; AVX1: # BB#0:
591; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
592; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
593; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
594; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,xmm2[10],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
595; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0]
596; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
597; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
598; AVX1-NEXT: retq
599;
600; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_26_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
601; AVX2: # BB#0:
602; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
603; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
604; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
605; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,xmm2[10],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
606; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0]
607; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
608; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
609; AVX2-NEXT: retq
610 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 26, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
611 ret <32 x i8> %shuffle
612}
613
614define <32 x i8> @shuffle_v32i8_00_00_00_00_27_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
615; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_27_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
616; AVX1: # BB#0:
617; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
618; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
619; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
620; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,xmm2[11],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
621; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0]
622; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
623; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
624; AVX1-NEXT: retq
625;
626; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_27_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
627; AVX2: # BB#0:
628; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
629; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
630; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
631; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,xmm2[11],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
632; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0]
633; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
634; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
635; AVX2-NEXT: retq
636 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 27, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
637 ret <32 x i8> %shuffle
638}
639
640define <32 x i8> @shuffle_v32i8_00_00_00_28_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
641; AVX1-LABEL: @shuffle_v32i8_00_00_00_28_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
642; AVX1: # BB#0:
643; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
644; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
645; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
646; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,xmm2[12],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
647; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0,0]
648; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
649; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
650; AVX1-NEXT: retq
651;
652; AVX2-LABEL: @shuffle_v32i8_00_00_00_28_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
653; AVX2: # BB#0:
654; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
655; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
656; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
657; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,xmm2[12],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
658; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0,0]
659; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
660; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
661; AVX2-NEXT: retq
662 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 28, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
663 ret <32 x i8> %shuffle
664}
665
666define <32 x i8> @shuffle_v32i8_00_00_29_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
667; AVX1-LABEL: @shuffle_v32i8_00_00_29_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
668; AVX1: # BB#0:
669; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
670; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
671; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
672; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,xmm2[13],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
673; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0]
674; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
675; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
676; AVX1-NEXT: retq
677;
678; AVX2-LABEL: @shuffle_v32i8_00_00_29_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
679; AVX2: # BB#0:
680; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
681; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
682; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
683; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,xmm2[13],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
684; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0]
685; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
686; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
687; AVX2-NEXT: retq
688 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 29, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
689 ret <32 x i8> %shuffle
690}
691
692define <32 x i8> @shuffle_v32i8_00_30_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
693; AVX1-LABEL: @shuffle_v32i8_00_30_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
694; AVX1: # BB#0:
695; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
696; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
697; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
698; AVX1-NEXT: vpshufb {{.*}} # xmm2 = zero,xmm2[14],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
699; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0]
700; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
701; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
702; AVX1-NEXT: retq
703;
704; AVX2-LABEL: @shuffle_v32i8_00_30_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
705; AVX2: # BB#0:
706; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
707; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
708; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
709; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,xmm2[14],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
710; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0]
711; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
712; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
713; AVX2-NEXT: retq
714 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
715 ret <32 x i8> %shuffle
716}
717
718define <32 x i8> @shuffle_v32i8_31_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
719; AVX1-LABEL: @shuffle_v32i8_31_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
720; AVX1: # BB#0:
721; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
722; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
723; AVX1-NEXT: movl $128, %eax
724; AVX1-NEXT: vmovd %eax, %xmm2
725; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm2
726; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
727; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
728; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0
729; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
730; AVX1-NEXT: retq
731;
732; AVX2-LABEL: @shuffle_v32i8_31_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
733; AVX2: # BB#0:
734; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
735; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
736; AVX2-NEXT: movl $128, %eax
737; AVX2-NEXT: vmovd %eax, %xmm2
738; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm2
739; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
740; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
741; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
742; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
743; AVX2-NEXT: retq
744 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 31, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
745 ret <32 x i8> %shuffle
746}
747
748define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
749; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16
750; AVX1: # BB#0:
751; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
752; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
753; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
754; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
755; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
756; AVX1-NEXT: retq
757;
758; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16
759; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]760; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
761; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]762; AVX2-NEXT: retq
763 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
764 ret <32 x i8> %shuffle
765}
766
767define <32 x i8> @shuffle_v32i8_15_15_15_15_15_15_15_15_15_15_15_15_15_15_15_15_31_31_31_31_31_31_31_31_31_31_31_31_31_31_31_31(<32 x i8> %a, <32 x i8> %b) {
768; AVX1-LABEL: @shuffle_v32i8_15_15_15_15_15_15_15_15_15_15_15_15_15_15_15_15_31_31_31_31_31_31_31_31_31_31_31_31_31_31_31_31
769; AVX1: # BB#0:
770; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]771; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]772; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
773; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
774; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
775; AVX1-NEXT: retq
776;
777; AVX2-LABEL: @shuffle_v32i8_15_15_15_15_15_15_15_15_15_15_15_15_15_15_15_15_31_31_31_31_31_31_31_31_31_31_31_31_31_31_31_31
778; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]779; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]780; AVX2-NEXT: retq
781 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
782 ret <32 x i8> %shuffle
783}
784
785define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_08_08_08_08_08_08_08_08_16_16_16_16_16_16_16_16_24_24_24_24_24_24_24_24(<32 x i8> %a, <32 x i8> %b) {
786; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_08_08_08_08_08_08_08_08_16_16_16_16_16_16_16_16_24_24_24_24_24_24_24_24
787; AVX1: # BB#0:
788; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]789; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [0,0,0,0,0,0,0,0,8,8,8,8,8,8,8,8]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]790; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
791; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
792; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
793; AVX1-NEXT: retq
794;
795; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_08_08_08_08_08_08_08_08_16_16_16_16_16_16_16_16_24_24_24_24_24_24_24_24
796; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]797; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,0,0,0,0,8,8,8,8,8,8,8,8,16,16,16,16,16,16,16,16,24,24,24,24,24,24,24,24]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]798; AVX2-NEXT: retq
799 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
800 ret <32 x i8> %shuffle
801}
802
803define <32 x i8> @shuffle_v32i8_07_07_07_07_07_07_07_07_15_15_15_15_15_15_15_15_23_23_23_23_23_23_23_23_31_31_31_31_31_31_31_31(<32 x i8> %a, <32 x i8> %b) {
804; AVX1-LABEL: @shuffle_v32i8_07_07_07_07_07_07_07_07_15_15_15_15_15_15_15_15_23_23_23_23_23_23_23_23_31_31_31_31_31_31_31_31
805; AVX1: # BB#0:
806; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]807; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [7,7,7,7,7,7,7,7,15,15,15,15,15,15,15,15]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]808; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
809; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
810; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
811; AVX1-NEXT: retq
812;
813; AVX2-LABEL: @shuffle_v32i8_07_07_07_07_07_07_07_07_15_15_15_15_15_15_15_15_23_23_23_23_23_23_23_23_31_31_31_31_31_31_31_31
814; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]815; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[7,7,7,7,7,7,7,7,15,15,15,15,15,15,15,15,23,23,23,23,23,23,23,23,31,31,31,31,31,31,31,31]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]816; AVX2-NEXT: retq
817 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
818 ret <32 x i8> %shuffle
819}
820
821define <32 x i8> @shuffle_v32i8_00_00_00_00_04_04_04_04_08_08_08_08_12_12_12_12_16_16_16_16_20_20_20_20_24_24_24_24_28_28_28_28(<32 x i8> %a, <32 x i8> %b) {
822; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_04_04_04_04_08_08_08_08_12_12_12_12_16_16_16_16_20_20_20_20_24_24_24_24_28_28_28_28
823; AVX1: # BB#0:
824; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]825; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [0,0,0,0,4,4,4,4,8,8,8,8,12,12,12,12]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]826; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
827; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
828; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
829; AVX1-NEXT: retq
830;
831; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_04_04_04_04_08_08_08_08_12_12_12_12_16_16_16_16_20_20_20_20_24_24_24_24_28_28_28_28
832; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]833; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,4,4,4,4,8,8,8,8,12,12,12,12,16,16,16,16,20,20,20,20,24,24,24,24,28,28,28,28]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]834; AVX2-NEXT: retq
835 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4, i32 8, i32 8, i32 8, i32 8, i32 12, i32 12, i32 12, i32 12, i32 16, i32 16, i32 16, i32 16, i32 20, i32 20, i32 20, i32 20, i32 24, i32 24, i32 24, i32 24, i32 28, i32 28, i32 28, i32 28>
836 ret <32 x i8> %shuffle
837}
838
839define <32 x i8> @shuffle_v32i8_03_03_03_03_07_07_07_07_11_11_11_11_15_15_15_15_19_19_19_19_23_23_23_23_27_27_27_27_31_31_31_31(<32 x i8> %a, <32 x i8> %b) {
840; AVX1-LABEL: @shuffle_v32i8_03_03_03_03_07_07_07_07_11_11_11_11_15_15_15_15_19_19_19_19_23_23_23_23_27_27_27_27_31_31_31_31
841; AVX1: # BB#0:
842; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]843; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [3,3,3,3,7,7,7,7,11,11,11,11,15,15,15,15]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]844; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
845; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
846; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
847; AVX1-NEXT: retq
848;
849; AVX2-LABEL: @shuffle_v32i8_03_03_03_03_07_07_07_07_11_11_11_11_15_15_15_15_19_19_19_19_23_23_23_23_27_27_27_27_31_31_31_31
850; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]851; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[3,3,3,3,7,7,7,7,11,11,11,11,15,15,15,15,19,19,19,19,23,23,23,23,27,27,27,27,31,31,31,31]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]852; AVX2-NEXT: retq
853 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 3, i32 3, i32 3, i32 3, i32 7, i32 7, i32 7, i32 7, i32 11, i32 11, i32 11, i32 11, i32 15, i32 15, i32 15, i32 15, i32 19, i32 19, i32 19, i32 19, i32 23, i32 23, i32 23, i32 23, i32 27, i32 27, i32 27, i32 27, i32 31, i32 31, i32 31, i32 31>
854 ret <32 x i8> %shuffle
855}
856
857define <32 x i8> @shuffle_v32i8_00_00_02_02_04_04_06_06_08_08_10_10_12_12_14_14_16_16_18_18_20_20_22_22_24_24_26_26_28_28_30_30(<32 x i8> %a, <32 x i8> %b) {
858; AVX1-LABEL: @shuffle_v32i8_00_00_02_02_04_04_06_06_08_08_10_10_12_12_14_14_16_16_18_18_20_20_22_22_24_24_26_26_28_28_30_30
859; AVX1: # BB#0:
860; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]861; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]862; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
863; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
864; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
865; AVX1-NEXT: retq
866;
867; AVX2-LABEL: @shuffle_v32i8_00_00_02_02_04_04_06_06_08_08_10_10_12_12_14_14_16_16_18_18_20_20_22_22_24_24_26_26_28_28_30_30
868; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]869; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14,16,16,18,18,20,20,22,22,24,24,26,26,28,28,30,30]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]870; AVX2-NEXT: retq
871 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14, i32 16, i32 16, i32 18, i32 18, i32 20, i32 20, i32 22, i32 22, i32 24, i32 24, i32 26, i32 26, i32 28, i32 28, i32 30, i32 30>
872 ret <32 x i8> %shuffle
873}
874
875define <32 x i8> @shuffle_v32i8_01_01_03_03_05_05_07_07_09_09_11_11_13_13_15_15_17_17_19_19_21_21_23_23_25_25_27_27_29_29_31_31(<32 x i8> %a, <32 x i8> %b) {
876; AVX1-LABEL: @shuffle_v32i8_01_01_03_03_05_05_07_07_09_09_11_11_13_13_15_15_17_17_19_19_21_21_23_23_25_25_27_27_29_29_31_31
877; AVX1: # BB#0:
878; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]879; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]880; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
881; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
882; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
883; AVX1-NEXT: retq
884;
885; AVX2-LABEL: @shuffle_v32i8_01_01_03_03_05_05_07_07_09_09_11_11_13_13_15_15_17_17_19_19_21_21_23_23_25_25_27_27_29_29_31_31
886; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]887; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15,17,17,19,19,21,21,23,23,25,25,27,27,29,29,31,31]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]888; AVX2-NEXT: retq
889 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15, i32 17, i32 17, i32 19, i32 19, i32 21, i32 21, i32 23, i32 23, i32 25, i32 25, i32 27, i32 27, i32 29, i32 29, i32 31, i32 31>
890 ret <32 x i8> %shuffle
891}
892
893define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00(<32 x i8> %a, <32 x i8> %b) {
894; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00
895; AVX1: # BB#0:
896; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0]
897; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
898; AVX1-NEXT: retq
899;
900; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00
901; AVX2: # BB#0:
902; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0]
903; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
904; AVX2-NEXT: retq
905 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0>
906 ret <32 x i8> %shuffle
907}
908
909define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00(<32 x i8> %a, <32 x i8> %b) {
910; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00
911; AVX1: # BB#0:
912; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0]
913; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
914; AVX1-NEXT: retq
915;
916; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00
917; AVX2: # BB#0:
918; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0]
919; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
920; AVX2-NEXT: retq
921 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0>
922 ret <32 x i8> %shuffle
923}
924
925define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
926; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00
927; AVX1: # BB#0:
928; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,7,0,0,0,0,0,0,0]
929; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
930; AVX1-NEXT: retq
931;
932; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00
933; AVX2: # BB#0:
934; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,7,0,0,0,0,0,0,0]
935; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
936; AVX2-NEXT: retq
937 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
938 ret <32 x i8> %shuffle
939}
940
941define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
942; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00
943; AVX1: # BB#0:
944; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,8,0,0,0,0,0,0,0,0]
945; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
946; AVX1-NEXT: retq
947;
948; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00
949; AVX2: # BB#0:
950; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,8,0,0,0,0,0,0,0,0]
951; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
952; AVX2-NEXT: retq
953 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
954 ret <32 x i8> %shuffle
955}
956
957define <32 x i8> @shuffle_v32i8_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
958; AVX1-LABEL: @shuffle_v32i8_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00
959; AVX1: # BB#0:
960; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,14,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
961; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
962; AVX1-NEXT: retq
963;
964; AVX2-LABEL: @shuffle_v32i8_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00
965; AVX2: # BB#0:
966; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,14,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
967; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
968; AVX2-NEXT: retq
969 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
970 ret <32 x i8> %shuffle
971}
972
973define <32 x i8> @shuffle_v32i8_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<32 x i8> %a, <32 x i8> %b) {
974; AVX1-LABEL: @shuffle_v32i8_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
975; AVX1: # BB#0:
976; AVX1-NEXT: movl $15, %eax
977; AVX1-NEXT: vmovd %eax, %xmm1
978; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0
979; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
980; AVX1-NEXT: retq
981;
982; AVX2-LABEL: @shuffle_v32i8_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
983; AVX2: # BB#0:
984; AVX2-NEXT: movl $15, %eax
985; AVX2-NEXT: vmovd %eax, %xmm1
986; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm0
987; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
988; AVX2-NEXT: retq
989 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
990 ret <32 x i8> %shuffle
991}
992
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]993define <32 x i8> @shuffle_v32i8_00_33_02_35_04_37_06_39_08_41_10_43_12_45_14_47_16_49_18_51_20_53_22_55_24_57_26_59_28_61_30_63(<32 x i8> %a, <32 x i8> %b) {
994; AVX1-LABEL: @shuffle_v32i8_00_33_02_35_04_37_06_39_08_41_10_43_12_45_14_47_16_49_18_51_20_53_22_55_24_57_26_59_28_61_30_63
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]995; AVX1: # BB#0:
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]996; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
997; AVX1-NEXT: vmovdqa {{.*}} # xmm3 = <1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]998; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]999; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4
1000; AVX1-NEXT: vmovdqa {{.*}} # xmm5 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1001; AVX1-NEXT: vpshufb %xmm5, %xmm4, %xmm4
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]1002; AVX1-NEXT: vpunpcklbw {{.*}} # xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
1003; AVX1-NEXT: vpshufb %xmm3, %xmm1, %xmm1
1004; AVX1-NEXT: vpshufb %xmm5, %xmm0, %xmm0
1005; AVX1-NEXT: vpunpcklbw {{.*}} # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1006; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1007; AVX1-NEXT: retq
1008;
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]1009; AVX2-LABEL: @shuffle_v32i8_00_33_02_35_04_37_06_39_08_41_10_43_12_45_14_47_16_49_18_51_20_53_22_55_24_57_26_59_28_61_30_63
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1010; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1011; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128]
1012; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1013; AVX2-NEXT: retq
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]1014 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 33, i32 2, i32 35, i32 4, i32 37, i32 6, i32 39, i32 8, i32 41, i32 10, i32 43, i32 12, i32 45, i32 14, i32 47, i32 16, i32 49, i32 18, i32 51, i32 20, i32 53, i32 22, i32 55, i32 24, i32 57, i32 26, i32 59, i32 28, i32 61, i32 30, i32 63>
1015 ret <32 x i8> %shuffle
1016}
1017
1018define <32 x i8> @shuffle_v32i8_32_01_34_03_36_05_38_07_40_09_42_11_44_13_46_15_48_17_50_19_52_21_54_23_56_25_58_27_60_29_62_31(<32 x i8> %a, <32 x i8> %b) {
1019; AVX1-LABEL: @shuffle_v32i8_32_01_34_03_36_05_38_07_40_09_42_11_44_13_46_15_48_17_50_19_52_21_54_23_56_25_58_27_60_29_62_31
1020; AVX1: # BB#0:
1021; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
1022; AVX1-NEXT: vmovdqa {{.*}} # xmm3 = <1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u>
1023; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2
1024; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
1025; AVX1-NEXT: vmovdqa {{.*}} # xmm5 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1026; AVX1-NEXT: vpshufb %xmm5, %xmm4, %xmm4
1027; AVX1-NEXT: vpunpcklbw {{.*}} # xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
1028; AVX1-NEXT: vpshufb %xmm3, %xmm0, %xmm0
1029; AVX1-NEXT: vpshufb %xmm5, %xmm1, %xmm1
1030; AVX1-NEXT: vpunpcklbw {{.*}} # xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1031; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1032; AVX1-NEXT: retq
1033;
1034; AVX2-LABEL: @shuffle_v32i8_32_01_34_03_36_05_38_07_40_09_42_11_44_13_46_15_48_17_50_19_52_21_54_23_56_25_58_27_60_29_62_31
1035; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1036; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128]
1037; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]1038; AVX2-NEXT: retq
1039 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 32, i32 1, i32 34, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 29, i32 62, i32 31>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1040 ret <32 x i8> %shuffle
1041}
1042
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1043define <32 x i8> @shuffle_v32i8_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32(<32 x i8> %a, <32 x i8> %b) {
1044; AVX1-LABEL: @shuffle_v32i8_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1045; AVX1: # BB#0:
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1046; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1047; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1048; AVX1-NEXT: vpunpcklbw {{.*}} # xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1049; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
1050; AVX1-NEXT: retq
1051;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1052; AVX2-LABEL: @shuffle_v32i8_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1053; AVX2: # BB#0:
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1054; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1055; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1056; AVX2-NEXT: vpunpcklbw {{.*}} # xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1057; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
1058; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1059 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1060 ret <32 x i8> %shuffle
1061}
1062
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1063define <32 x i8> @shuffle_v32i8_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_16_48_16_48_16_48_16_48_16_48_16_48_16_48_16_48(<32 x i8> %a, <32 x i8> %b) {
1064; AVX1-LABEL: @shuffle_v32i8_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_16_48_16_48_16_48_16_48_16_48_16_48_16_48_16_48
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1065; AVX1: # BB#0:
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1066; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1067; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1068; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1069; AVX1-NEXT: vpunpcklbw {{.*}} # xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1070; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1071; AVX1-NEXT: vpunpcklbw {{.*}} # xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1072; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1073; AVX1-NEXT: retq
1074;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1075; AVX2-LABEL: @shuffle_v32i8_00_32_00_32_00_32_00_32_00_32_00_32_00_32_00_32_16_48_16_48_16_48_16_48_16_48_16_48_16_48_16_48
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1076; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1077; AVX2-NEXT: vpxor %ymm2, %ymm2, %ymm2
1078; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1
1079; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,16,17,16,17,16,17,16,17,16,17,16,17,16,17,16,17]
1080; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128]
1081; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1082; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1083 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 0, i32 32, i32 16, i32 48, i32 16, i32 48, i32 16, i32 48, i32 16, i32 48, i32 16, i32 48, i32 16, i32 48, i32 16, i32 48, i32 16, i32 48>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1084 ret <32 x i8> %shuffle
1085}
1086
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1087define <32 x i8> @shuffle_v32i8_32_32_32_32_32_32_32_32_08_09_10_11_12_13_14_15_48_48_48_48_48_48_48_48_24_25_26_27_28_29_30_31(<32 x i8> %a, <32 x i8> %b) {
1088; AVX1-LABEL: @shuffle_v32i8_32_32_32_32_32_32_32_32_08_09_10_11_12_13_14_15_48_48_48_48_48_48_48_48_24_25_26_27_28_29_30_31
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1089; AVX1: # BB#0:
1090; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1091; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
1092; AVX1-NEXT: vpunpcklbw {{.*}} # xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1093; AVX1-NEXT: vpshuflw {{.*}} # xmm3 = xmm3[0,0,0,0,4,5,6,7]
1094; AVX1-NEXT: vpblendw {{.*}} # xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1095; AVX1-NEXT: vpunpcklbw {{.*}} # xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1096; AVX1-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[0,0,0,0,4,5,6,7]
1097; AVX1-NEXT: vpblendw {{.*}} # xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1098; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1099; AVX1-NEXT: retq
1100;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1101; AVX2-LABEL: @shuffle_v32i8_32_32_32_32_32_32_32_32_08_09_10_11_12_13_14_15_48_48_48_48_48_48_48_48_24_25_26_27_28_29_30_31
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1102; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1103; AVX2-NEXT: vpxor %ymm2, %ymm2, %ymm2
1104; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1
1105; AVX2-NEXT: vpblendd {{.*}} # ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1106; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1107 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1108 ret <32 x i8> %shuffle
1109}
1110
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1111define <32 x i8> @shuffle_v32i8_39_38_37_36_35_34_33_32_15_14_13_12_11_10_09_08_55_54_53_52_51_50_49_48_31_30_29_28_27_26_25_24(<32 x i8> %a, <32 x i8> %b) {
1112; AVX1-LABEL: @shuffle_v32i8_39_38_37_36_35_34_33_32_15_14_13_12_11_10_09_08_55_54_53_52_51_50_49_48_31_30_29_28_27_26_25_24
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1113; AVX1: # BB#0:
1114; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1115; AVX1-NEXT: vmovdqa {{.*}} # xmm3 = <u,u,u,u,u,u,u,u,15,14,13,12,11,10,9,8>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1116; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2
1117; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1118; AVX1-NEXT: vmovdqa {{.*}} # xmm5 = <7,6,5,4,3,2,1,0,u,u,u,u,u,u,u,u>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1119; AVX1-NEXT: vpshufb %xmm5, %xmm4, %xmm4
1120; AVX1-NEXT: vpblendw {{.*}} # xmm2 = xmm4[0,1,2,3],xmm2[4,5,6,7]
1121; AVX1-NEXT: vpshufb %xmm3, %xmm0, %xmm0
1122; AVX1-NEXT: vpshufb %xmm5, %xmm1, %xmm1
1123; AVX1-NEXT: vpblendw {{.*}} # xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1124; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1125; AVX1-NEXT: retq
1126;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1127; AVX2-LABEL: @shuffle_v32i8_39_38_37_36_35_34_33_32_15_14_13_12_11_10_09_08_55_54_53_52_51_50_49_48_31_30_29_28_27_26_25_24
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1128; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1129; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,u,15,14,13,12,11,10,9,8,u,u,u,u,u,u,u,u,31,30,29,28,27,26,25,24]
1130; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[7,6,5,4,3,2,1,0,u,u,u,u,u,u,u,u,23,22,21,20,19,18,17,16,u,u,u,u,u,u,u,u]
1131; AVX2-NEXT: vpblendd {{.*}} # ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1132; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1133 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 39, i32 38, i32 37, i32 36, i32 35, i32 34, i32 33, i32 32, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 55, i32 54, i32 53, i32 52, i32 51, i32 50, i32 49, i32 48, i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1134 ret <32 x i8> %shuffle
1135}
1136
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1137define <32 x i8> @shuffle_v32i8_39_38_37_36_35_34_33_32_07_06_05_04_03_02_01_00_55_54_53_52_51_50_49_48_23_22_21_20_19_18_17_16(<32 x i8> %a, <32 x i8> %b) {
1138; AVX1-LABEL: @shuffle_v32i8_39_38_37_36_35_34_33_32_07_06_05_04_03_02_01_00_55_54_53_52_51_50_49_48_23_22_21_20_19_18_17_16
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1139; AVX1: # BB#0:
1140; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1141; AVX1-NEXT: vmovdqa {{.*}} # xmm3 = <u,u,u,u,u,u,u,u,7,6,5,4,3,2,1,0>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1142; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2
1143; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1144; AVX1-NEXT: vmovdqa {{.*}} # xmm5 = <7,6,5,4,3,2,1,0,u,u,u,u,u,u,u,u>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1145; AVX1-NEXT: vpshufb %xmm5, %xmm4, %xmm4
1146; AVX1-NEXT: vpblendw {{.*}} # xmm2 = xmm4[0,1,2,3],xmm2[4,5,6,7]
1147; AVX1-NEXT: vpshufb %xmm3, %xmm0, %xmm0
1148; AVX1-NEXT: vpshufb %xmm5, %xmm1, %xmm1
1149; AVX1-NEXT: vpblendw {{.*}} # xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1150; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1151; AVX1-NEXT: retq
1152;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1153; AVX2-LABEL: @shuffle_v32i8_39_38_37_36_35_34_33_32_07_06_05_04_03_02_01_00_55_54_53_52_51_50_49_48_23_22_21_20_19_18_17_16
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1154; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1155; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,u,7,6,5,4,3,2,1,0,u,u,u,u,u,u,u,u,23,22,21,20,19,18,17,16]
1156; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[7,6,5,4,3,2,1,0,u,u,u,u,u,u,u,u,23,22,21,20,19,18,17,16,u,u,u,u,u,u,u,u]
1157; AVX2-NEXT: vpblendd {{.*}} # ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1158; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1159 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 39, i32 38, i32 37, i32 36, i32 35, i32 34, i32 33, i32 32, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 55, i32 54, i32 53, i32 52, i32 51, i32 50, i32 49, i32 48, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1160 ret <32 x i8> %shuffle
1161}
1162
1163define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_17_16(<32 x i8> %a, <32 x i8> %b) {
1164; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_17_16
1165; AVX1: # BB#0:
1166; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]1167; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1168; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1169; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
1170; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1171; AVX1-NEXT: retq
1172;
1173; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_17_16
1174; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1175; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,16,16,16,16,16,16,16,16,16,16,16,16,16,16,17,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1176; AVX2-NEXT: retq
1177 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 17, i32 16>
1178 ret <32 x i8> %shuffle
1179}
1180
1181define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_18_16_16(<32 x i8> %a, <32 x i8> %b) {
1182; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_18_16_16
1183; AVX1: # BB#0:
1184; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]1185; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [0,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1186; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1187; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
1188; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1189; AVX1-NEXT: retq
1190;
1191; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_18_16_16
1192; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1193; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0,16,16,16,16,16,16,16,16,16,16,16,16,16,18,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1194; AVX2-NEXT: retq
1195 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 18, i32 16, i32 16>
1196 ret <32 x i8> %shuffle
1197}
1198
1199define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_23_16_16_16_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1200; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_23_16_16_16_16_16_16_16
1201; AVX1: # BB#0:
1202; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]1203; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [0,0,0,0,0,0,0,0,7,0,0,0,0,0,0,0]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1204; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1205; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
1206; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1207; AVX1-NEXT: retq
1208;
1209; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_23_16_16_16_16_16_16_16
1210; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1211; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,0,0,0,0,7,0,0,0,0,0,0,0,16,16,16,16,16,16,16,16,23,16,16,16,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1212; AVX2-NEXT: retq
1213 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 23, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1214 ret <32 x i8> %shuffle
1215}
1216
1217define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_24_16_16_16_16_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1218; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_24_16_16_16_16_16_16_16_16
1219; AVX1: # BB#0:
1220; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]1221; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [0,0,0,0,0,0,0,8,0,0,0,0,0,0,0,0]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1222; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1223; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
1224; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1225; AVX1-NEXT: retq
1226;
1227; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_24_16_16_16_16_16_16_16_16
1228; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1229; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,0,0,0,8,0,0,0,0,0,0,0,0,16,16,16,16,16,16,16,24,16,16,16,16,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1230; AVX2-NEXT: retq
1231 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 24, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1232 ret <32 x i8> %shuffle
1233}
1234
1235define <32 x i8> @shuffle_v32i8_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_30_16_16_16_16_16_16_16_16_16_16_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1236; AVX1-LABEL: @shuffle_v32i8_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_30_16_16_16_16_16_16_16_16_16_16_16_16_16_16
1237; AVX1: # BB#0:
1238; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carruthe7e9c042014-09-24 09:39:41 +0000[diff] [blame]1239; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = [0,14,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1240; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1241; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
1242; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1243; AVX1-NEXT: retq
1244;
1245; AVX2-LABEL: @shuffle_v32i8_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_30_16_16_16_16_16_16_16_16_16_16_16_16_16_16
1246; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1247; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,14,0,0,0,0,0,0,0,0,0,0,0,0,0,0,16,30,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1248; AVX2-NEXT: retq
1249 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 30, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1250 ret <32 x i8> %shuffle
1251}
1252
1253define <32 x i8> @shuffle_v32i8_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_31_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1254; AVX1-LABEL: @shuffle_v32i8_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_31_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16
1255; AVX1: # BB#0:
1256; AVX1-NEXT: movl $15, %eax
1257; AVX1-NEXT: vmovd %eax, %xmm1
1258; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
1259; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm2
1260; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0
1261; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
1262; AVX1-NEXT: retq
1263;
1264; AVX2-LABEL: @shuffle_v32i8_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_31_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16
1265; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1266; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[15,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,31,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1267; AVX2-NEXT: retq
1268 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 31, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1269 ret <32 x i8> %shuffle
1270}
1271
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1272define <32 x i8> @shuffle_v32i8_00_32_01_33_02_34_03_35_04_36_05_37_06_38_07_39_16_48_17_49_18_50_19_51_20_52_21_53_22_54_23_55(<32 x i8> %a, <32 x i8> %b) {
1273; AVX1-LABEL: @shuffle_v32i8_00_32_01_33_02_34_03_35_04_36_05_37_06_38_07_39_16_48_17_49_18_50_19_51_20_52_21_53_22_54_23_55
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1274; AVX1: # BB#0:
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1275; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1276; AVX1-NEXT: vpmovzxbw %xmm1, %xmm1
1277; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1278; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1279; AVX1-NEXT: vpunpcklbw {{.*}} # xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1280; AVX1-NEXT: vpmovzxbw %xmm0, %xmm0
1281; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1282; AVX1-NEXT: vpunpcklbw {{.*}} # xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1283; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1284; AVX1-NEXT: retq
1285;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1286; AVX2-LABEL: @shuffle_v32i8_00_32_01_33_02_34_03_35_04_36_05_37_06_38_07_39_16_48_17_49_18_50_19_51_20_52_21_53_22_54_23_55
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1287; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1288; AVX2-NEXT: vpunpcklbw {{.*}} # ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[16],ymm1[16],ymm0[17],ymm1[17],ymm0[18],ymm1[18],ymm0[19],ymm1[19],ymm0[20],ymm1[20],ymm0[21],ymm1[21],ymm0[22],ymm1[22],ymm0[23],ymm1[23]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1289; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1290 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1291 ret <32 x i8> %shuffle
1292}
1293
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1294define <32 x i8> @shuffle_v32i8_08_40_09_41_10_42_11_43_12_44_13_45_14_46_15_47_24_56_25_57_26_58_27_59_28_60_29_61_30_62_31_63(<32 x i8> %a, <32 x i8> %b) {
1295; AVX1-LABEL: @shuffle_v32i8_08_40_09_41_10_42_11_43_12_44_13_45_14_46_15_47_24_56_25_57_26_58_27_59_28_60_29_61_30_62_31_63
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1296; AVX1: # BB#0:
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1297; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1298; AVX1-NEXT: vmovdqa {{.*}} # xmm2 = <8,9,10,11,12,13,14,15,u,u,u,u,u,u,u,u>
1299; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1300; AVX1-NEXT: vpunpcklbw {{.*}} # xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1301; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1302; AVX1-NEXT: vpunpcklbw {{.*}} # xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1303; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1304; AVX1-NEXT: retq
1305;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1306; AVX2-LABEL: @shuffle_v32i8_08_40_09_41_10_42_11_43_12_44_13_45_14_46_15_47_24_56_25_57_26_58_27_59_28_60_29_61_30_62_31_63
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1307; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1308; AVX2-NEXT: vpunpckhbw {{.*}} # ymm0 = ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15],ymm0[24],ymm1[24],ymm0[25],ymm1[25],ymm0[26],ymm1[26],ymm0[27],ymm1[27],ymm0[28],ymm1[28],ymm0[29],ymm1[29],ymm0[30],ymm1[30],ymm0[31],ymm1[31]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1309; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1310 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1311 ret <32 x i8> %shuffle
1312}
1313
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1314define <32 x i8> @shuffle_v32i8_00_32_01_33_02_34_03_35_04_36_05_37_06_38_07_39_24_56_25_57_26_58_27_59_28_60_29_61_30_62_31_63(<32 x i8> %a, <32 x i8> %b) {
1315; AVX1-LABEL: @shuffle_v32i8_00_32_01_33_02_34_03_35_04_36_05_37_06_38_07_39_24_56_25_57_26_58_27_59_28_60_29_61_30_62_31_63
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1316; AVX1: # BB#0:
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1317; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1318; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm1[8,9,10,11,12,13,14,15,u,u,u,u,u,u,u,u]
1319; AVX1-NEXT: vpunpcklbw {{.*}} # xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1320; AVX1-NEXT: vpmovzxbw %xmm0, %xmm0
1321; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1322; AVX1-NEXT: vpunpcklbw {{.*}} # xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1323; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1324; AVX1-NEXT: retq
1325;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1326; AVX2-LABEL: @shuffle_v32i8_00_32_01_33_02_34_03_35_04_36_05_37_06_38_07_39_24_56_25_57_26_58_27_59_28_60_29_61_30_62_31_63
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1327; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1328; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,u,1,u,2,u,3,u,4,u,5,u,6,u,7,u,24,u,25,u,26,u,27,u,28,u,29,u,30,u,31,u]
1329; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[u,0,u,1,u,2,u,3,u,4,u,5,u,6,u,7,u,24,u,25,u,26,u,27,u,28,u,29,u,30,u,31]
1330; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128]
1331; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1332; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1333 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>
1334 ret <32 x i8> %shuffle
1335}
1336
1337define <32 x i8> @shuffle_v32i8_08_40_09_41_10_42_11_43_12_44_13_45_14_46_15_47_16_48_17_49_18_50_19_51_20_52_21_53_22_54_23_55(<32 x i8> %a, <32 x i8> %b) {
1338; AVX1-LABEL: @shuffle_v32i8_08_40_09_41_10_42_11_43_12_44_13_45_14_46_15_47_16_48_17_49_18_50_19_51_20_52_21_53_22_54_23_55
1339; AVX1: # BB#0:
1340; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1341; AVX1-NEXT: vpmovzxbw %xmm1, %xmm1
1342; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm1[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1343; AVX1-NEXT: vpunpcklbw {{.*}} # xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1344; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[8,9,10,11,12,13,14,15,u,u,u,u,u,u,u,u]
1345; AVX1-NEXT: vpunpcklbw {{.*}} # xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1346; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1347; AVX1-NEXT: retq
1348;
1349; AVX2-LABEL: @shuffle_v32i8_08_40_09_41_10_42_11_43_12_44_13_45_14_46_15_47_16_48_17_49_18_50_19_51_20_52_21_53_22_54_23_55
1350; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1351; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[8,u,9,u,10,u,11,u,12,u,13,u,14,u,15,u,16,u,17,u,18,u,19,u,20,u,21,u,22,u,23,u]
1352; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[u,8,u,9,u,10,u,11,u,12,u,13,u,14,u,15,u,16,u,17,u,18,u,19,u,20,u,21,u,22,u,23]
1353; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128,0,128]
1354; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1355; AVX2-NEXT: retq
1356 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1357 ret <32 x i8> %shuffle
1358}
1359
1360define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00_16_17_16_16_16_16_16_16_16_16_16_16_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1361; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00_16_17_16_16_16_16_16_16_16_16_16_16_16_16_16_16
1362; AVX1: # BB#0:
1363; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0]
1364; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
1365; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
1366; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1367; AVX1-NEXT: retq
1368;
1369; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_01_00_16_17_16_16_16_16_16_16_16_16_16_16_16_16_16_16
1370; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1371; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,16,17,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1372; AVX2-NEXT: retq
1373 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 16, i32 17, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1374 ret <32 x i8> %shuffle
1375}
1376
1377define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00_16_16_18_16_16_16_16_16_16_16_16_16_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1378; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00_16_16_18_16_16_16_16_16_16_16_16_16_16_16_16_16
1379; AVX1: # BB#0:
1380; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0]
1381; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
1382; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,2,0,0,0,0,0,0,0,0,0,0,0,0,0]
1383; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1384; AVX1-NEXT: retq
1385;
1386; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_02_00_00_16_16_18_16_16_16_16_16_16_16_16_16_16_16_16_16
1387; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1388; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0,16,16,18,16,16,16,16,16,16,16,16,16,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1389; AVX2-NEXT: retq
1390 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0, i32 16, i32 16, i32 18, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1391 ret <32 x i8> %shuffle
1392}
1393
1394define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00_16_16_16_16_16_16_16_23_16_16_16_16_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1395; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00_16_16_16_16_16_16_16_23_16_16_16_16_16_16_16_16
1396; AVX1: # BB#0:
1397; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm0[0,0,0,0,0,0,0,0,7,0,0,0,0,0,0,0]
1398; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
1399; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,7,0,0,0,0,0,0,0,0]
1400; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1401; AVX1-NEXT: retq
1402;
1403; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_07_00_00_00_00_00_00_00_16_16_16_16_16_16_16_23_16_16_16_16_16_16_16_16
1404; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1405; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,0,0,0,0,7,0,0,0,0,0,0,0,16,16,16,16,16,16,16,23,16,16,16,16,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1406; AVX2-NEXT: retq
1407 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 23, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1408 ret <32 x i8> %shuffle
1409}
1410
1411define <32 x i8> @shuffle_v32i8_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_24_16_16_16_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1412; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_24_16_16_16_16_16_16_16
1413; AVX1: # BB#0:
1414; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm0[0,0,0,0,0,0,0,8,0,0,0,0,0,0,0,0]
1415; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
1416; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,8,0,0,0,0,0,0,0]
1417; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1418; AVX1-NEXT: retq
1419;
1420; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_24_16_16_16_16_16_16_16
1421; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1422; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,0,0,0,8,0,0,0,0,0,0,0,0,16,16,16,16,16,16,16,16,24,16,16,16,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1423; AVX2-NEXT: retq
1424 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 24, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1425 ret <32 x i8> %shuffle
1426}
1427
1428define <32 x i8> @shuffle_v32i8_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_30_16(<32 x i8> %a, <32 x i8> %b) {
1429; AVX1-LABEL: @shuffle_v32i8_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_30_16
1430; AVX1: # BB#0:
1431; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm0[0,14,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
1432; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
1433; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,14,0]
1434; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1435; AVX1-NEXT: retq
1436;
1437; AVX2-LABEL: @shuffle_v32i8_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_30_16
1438; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1439; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,14,0,0,0,0,0,0,0,0,0,0,0,0,0,0,16,16,16,16,16,16,16,16,16,16,16,16,16,16,30,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1440; AVX2-NEXT: retq
1441 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 30, i32 16>
1442 ret <32 x i8> %shuffle
1443}
1444
1445define <32 x i8> @shuffle_v32i8_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16_31(<32 x i8> %a, <32 x i8> %b) {
1446; AVX1-LABEL: @shuffle_v32i8_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16_31
1447; AVX1: # BB#0:
1448; AVX1-NEXT: movl $15, %eax
1449; AVX1-NEXT: vmovd %eax, %xmm1
1450; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm1
1451; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
1452; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,15]
1453; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1454; AVX1-NEXT: retq
1455;
1456; AVX2-LABEL: @shuffle_v32i8_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_16_16_16_16_16_16_16_31
1457; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1458; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[15,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,31]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1459; AVX2-NEXT: retq
1460 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 31>
1461 ret <32 x i8> %shuffle
1462}
1463
1464define <32 x i8> @shuffle_v32i8_00_00_00_00_04_04_04_04_08_08_08_08_12_12_12_12_28_28_28_28_24_24_24_24_20_20_20_20_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1465; AVX1-LABEL: @shuffle_v32i8_00_00_00_00_04_04_04_04_08_08_08_08_12_12_12_12_28_28_28_28_24_24_24_24_20_20_20_20_16_16_16_16
1466; AVX1: # BB#0:
1467; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm0[0,0,0,0,4,4,4,4,8,8,8,8,12,12,12,12]
1468; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
1469; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[12,12,12,12,8,8,8,8,4,4,4,4,0,0,0,0]
1470; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1471; AVX1-NEXT: retq
1472;
1473; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_04_04_04_04_08_08_08_08_12_12_12_12_28_28_28_28_24_24_24_24_20_20_20_20_16_16_16_16
1474; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1475; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,0,4,4,4,4,8,8,8,8,12,12,12,12,28,28,28,28,24,24,24,24,20,20,20,20,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1476; AVX2-NEXT: retq
1477 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4, i32 8, i32 8, i32 8, i32 8, i32 12, i32 12, i32 12, i32 12, i32 28, i32 28, i32 28, i32 28, i32 24, i32 24, i32 24, i32 24, i32 20, i32 20, i32 20, i32 20, i32 16, i32 16, i32 16, i32 16>
1478 ret <32 x i8> %shuffle
1479}
1480
1481define <32 x i8> @shuffle_v32i8_08_08_08_08_08_08_08_08_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_24_24_24_24_24_24_24_24(<32 x i8> %a, <32 x i8> %b) {
1482; AVX1-LABEL: @shuffle_v32i8_08_08_08_08_08_08_08_08_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_24_24_24_24_24_24_24_24
1483; AVX1: # BB#0:
1484; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm0[8,8,8,8,8,8,8,8,0,0,0,0,0,0,0,0]
1485; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
1486; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,8,8,8,8,8,8,8,8]
1487; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1488; AVX1-NEXT: retq
1489;
1490; AVX2-LABEL: @shuffle_v32i8_08_08_08_08_08_08_08_08_00_00_00_00_00_00_00_00_16_16_16_16_16_16_16_16_24_24_24_24_24_24_24_24
1491; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1492; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[8,8,8,8,8,8,8,8,0,0,0,0,0,0,0,0,16,16,16,16,16,16,16,16,24,24,24,24,24,24,24,24]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1493; AVX2-NEXT: retq
1494 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
1495 ret <32 x i8> %shuffle
1496}
1497
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1498define <32 x i8> @shuffle_v32i8_00_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_16_16_16_16_uu_uu_uu_uu_uu_16_16_16_16_16_30_16(<32 x i8> %a, <32 x i8> %b) {
1499; AVX1-LABEL: @shuffle_v32i8_00_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_16_16_16_16_uu_uu_uu_uu_uu_16_16_16_16_16_30_16
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1500; AVX1: # BB#0:
1501; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1502; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm1[0,0,0,0,u,u,u,u,u,0,0,0,0,0,14,0]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1503; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1504; AVX1-NEXT: retq
1505;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1506; AVX2-LABEL: @shuffle_v32i8_00_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_16_16_16_16_uu_uu_uu_uu_uu_16_16_16_16_16_30_16
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1507; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1508; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,16,16,16,16,u,u,u,u,u,16,16,16,16,16,30,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1509; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1510 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 16, i32 16, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 16, i32 16, i32 16, i32 16, i32 30, i32 16>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1511 ret <32 x i8> %shuffle
1512}
1513
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]1514define <32 x i8> @shuffle_v32i8_uu_14_uu_uu_00_00_00_00_00_00_00_00_00_00_00_00_16_16_uu_16_uu_uu_uu_uu_16_16_16_16_16_16_30_16(<32 x i8> %a, <32 x i8> %b) {
1515; AVX1-LABEL: @shuffle_v32i8_uu_14_uu_uu_00_00_00_00_00_00_00_00_00_00_00_00_16_16_uu_16_uu_uu_uu_uu_16_16_16_16_16_16_30_16
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1516; AVX1: # BB#0:
1517; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm0[0,0,1,1,0,0,0,0,0,0,0,0,0,0,0,0]
1518; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]1519; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,u,0,u,u,u,u,0,0,0,0,0,0,14,0]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1520; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1521; AVX1-NEXT: retq
1522;
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]1523; AVX2-LABEL: @shuffle_v32i8_uu_14_uu_uu_00_00_00_00_00_00_00_00_00_00_00_00_16_16_uu_16_uu_uu_uu_uu_16_16_16_16_16_16_30_16
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1524; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1525; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,14,u,u,0,0,0,0,0,0,0,0,0,0,0,0,16,16,u,16,u,u,u,u,16,16,16,16,16,16,30,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1526; AVX2-NEXT: retq
Chandler Carruth397d12c2014-09-25 02:44:39 +0000[diff] [blame]1527 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 undef, i32 14, i32 undef, i32 undef, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 undef, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 30, i32 16>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1528 ret <32 x i8> %shuffle
1529}
1530
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1531define <32 x i8> @shuffle_v32i8_00_00_00_uu_uu_uu_04_uu_08_08_08_08_uu_uu_12_uu_28_28_28_28_uu_uu_uu_24_20_20_20_20_16_16_16_16(<32 x i8> %a, <32 x i8> %b) {
1532; AVX1-LABEL: @shuffle_v32i8_00_00_00_uu_uu_uu_04_uu_08_08_08_08_uu_uu_12_uu_28_28_28_28_uu_uu_uu_24_20_20_20_20_16_16_16_16
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1533; AVX1: # BB#0:
1534; AVX1-NEXT: vpshufb {{.*}} # xmm1 = xmm0[0,0,0,0,4,4,4,4,8,8,8,8,12,12,12,12]
1535; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1536; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[12,12,12,12,12,12,13,13,4,4,4,4,0,0,0,0]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1537; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1538; AVX1-NEXT: retq
1539;
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1540; AVX2-LABEL: @shuffle_v32i8_00_00_00_uu_uu_uu_04_uu_08_08_08_08_uu_uu_12_uu_28_28_28_28_uu_uu_uu_24_20_20_20_20_16_16_16_16
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1541; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1542; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,0,0,u,u,u,4,u,8,8,8,8,u,u,12,u,28,28,28,28,u,u,u,24,20,20,20,20,16,16,16,16]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1543; AVX2-NEXT: retq
Chandler Carrutha03011f2014-09-25 02:20:02 +0000[diff] [blame]1544 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 undef, i32 undef, i32 undef, i32 4, i32 undef, i32 8, i32 8, i32 8, i32 8, i32 undef, i32 undef, i32 12, i32 undef, i32 28, i32 28, i32 28, i32 28, i32 undef, i32 undef, i32 undef, i32 24, i32 20, i32 20, i32 20, i32 20, i32 16, i32 16, i32 16, i32 16>
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1545 ret <32 x i8> %shuffle
1546}
1547
1548define <32 x i8> @shuffle_v32i8_08_08_08_08_08_08_08_08_uu_uu_uu_uu_uu_uu_uu_uu_16_16_16_uu_uu_uu_uu_uu_uu_uu_24_24_24_24_24_24(<32 x i8> %a, <32 x i8> %b) {
1549; AVX1-LABEL: @shuffle_v32i8_08_08_08_08_08_08_08_08_uu_uu_uu_uu_uu_uu_uu_uu_16_16_16_uu_uu_uu_uu_uu_uu_uu_24_24_24_24_24_24
1550; AVX1: # BB#0:
1551; AVX1-NEXT: vpunpckhbw {{.*}} # xmm1 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
1552; AVX1-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[0,0,0,0,4,5,6,7]
1553; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
1554; AVX1-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,8,8,9,9,8,8,8,8,8,8,8,8]
1555; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1556; AVX1-NEXT: retq
1557;
1558; AVX2-LABEL: @shuffle_v32i8_08_08_08_08_08_08_08_08_uu_uu_uu_uu_uu_uu_uu_uu_16_16_16_uu_uu_uu_uu_uu_uu_uu_24_24_24_24_24_24
1559; AVX2: # BB#0:
Chandler Carruthd8f528a2014-09-25 02:52:12 +0000[diff] [blame^]1560; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[8,8,8,8,8,8,8,8,u,u,u,u,u,u,u,u,16,16,16,u,u,u,u,u,u,u,24,24,24,24,24,24]
Chandler Carruth44deb802014-09-22 20:25:08 +0000[diff] [blame]1561; AVX2-NEXT: retq
1562 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 16, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
1563 ret <32 x i8> %shuffle
1564}