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Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +00001//===- GCNRegPressure.h -----------------------------------------*- C++ -*-===//
Valery Pykhtinfd4c4102017-03-21 13:15:46 +00002//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Valery Pykhtinfd4c4102017-03-21 13:15:46 +00006//
7//===----------------------------------------------------------------------===//
Valery Pykhtinfd4c4102017-03-21 13:15:46 +00008
9#ifndef LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
10#define LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
11
12#include "AMDGPUSubtarget.h"
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +000013#include "llvm/ADT/DenseMap.h"
Matthias Braunf8422972017-12-13 02:51:04 +000014#include "llvm/CodeGen/LiveIntervals.h"
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +000015#include "llvm/CodeGen/MachineBasicBlock.h"
16#include "llvm/CodeGen/MachineInstr.h"
17#include "llvm/CodeGen/SlotIndexes.h"
18#include "llvm/MC/LaneBitmask.h"
19#include "llvm/Support/Debug.h"
20#include <algorithm>
Valery Pykhtinfd4c4102017-03-21 13:15:46 +000021#include <limits>
22
23namespace llvm {
24
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +000025class MachineRegisterInfo;
26class raw_ostream;
27
Valery Pykhtinfd4c4102017-03-21 13:15:46 +000028struct GCNRegPressure {
29 enum RegKind {
30 SGPR32,
31 SGPR_TUPLE,
32 VGPR32,
33 VGPR_TUPLE,
34 TOTAL_KINDS
35 };
36
37 GCNRegPressure() {
38 clear();
39 }
40
Stanislav Mekhanoshin7e3794d2017-05-09 20:50:04 +000041 bool empty() const { return getSGPRNum() == 0 && getVGPRNum() == 0; }
Valery Pykhtinfd4c4102017-03-21 13:15:46 +000042
43 void clear() { std::fill(&Value[0], &Value[TOTAL_KINDS], 0); }
44
Stanislav Mekhanoshin7e3794d2017-05-09 20:50:04 +000045 unsigned getSGPRNum() const { return Value[SGPR32]; }
46 unsigned getVGPRNum() const { return Value[VGPR32]; }
Valery Pykhtinfd4c4102017-03-21 13:15:46 +000047
48 unsigned getVGPRTuplesWeight() const { return Value[VGPR_TUPLE]; }
49 unsigned getSGPRTuplesWeight() const { return Value[SGPR_TUPLE]; }
50
Tom Stellard5bfbae52018-07-11 20:59:01 +000051 unsigned getOccupancy(const GCNSubtarget &ST) const {
Stanislav Mekhanoshin7e3794d2017-05-09 20:50:04 +000052 return std::min(ST.getOccupancyWithNumSGPRs(getSGPRNum()),
53 ST.getOccupancyWithNumVGPRs(getVGPRNum()));
Valery Pykhtinfd4c4102017-03-21 13:15:46 +000054 }
55
56 void inc(unsigned Reg,
57 LaneBitmask PrevMask,
58 LaneBitmask NewMask,
59 const MachineRegisterInfo &MRI);
60
Tom Stellard5bfbae52018-07-11 20:59:01 +000061 bool higherOccupancy(const GCNSubtarget &ST, const GCNRegPressure& O) const {
Valery Pykhtinfd4c4102017-03-21 13:15:46 +000062 return getOccupancy(ST) > O.getOccupancy(ST);
63 }
64
Tom Stellard5bfbae52018-07-11 20:59:01 +000065 bool less(const GCNSubtarget &ST, const GCNRegPressure& O,
Valery Pykhtinfd4c4102017-03-21 13:15:46 +000066 unsigned MaxOccupancy = std::numeric_limits<unsigned>::max()) const;
67
68 bool operator==(const GCNRegPressure &O) const {
69 return std::equal(&Value[0], &Value[TOTAL_KINDS], O.Value);
70 }
71
72 bool operator!=(const GCNRegPressure &O) const {
73 return !(*this == O);
74 }
75
Tom Stellard5bfbae52018-07-11 20:59:01 +000076 void print(raw_ostream &OS, const GCNSubtarget *ST = nullptr) const;
Valery Pykhtinfd4c4102017-03-21 13:15:46 +000077 void dump() const { print(dbgs()); }
78
79private:
80 unsigned Value[TOTAL_KINDS];
81
82 static unsigned getRegKind(unsigned Reg, const MachineRegisterInfo &MRI);
83
84 friend GCNRegPressure max(const GCNRegPressure &P1,
85 const GCNRegPressure &P2);
86};
87
88inline GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2) {
89 GCNRegPressure Res;
90 for (unsigned I = 0; I < GCNRegPressure::TOTAL_KINDS; ++I)
91 Res.Value[I] = std::max(P1.Value[I], P2.Value[I]);
92 return Res;
93}
94
95class GCNRPTracker {
96public:
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +000097 using LiveRegSet = DenseMap<unsigned, LaneBitmask>;
Valery Pykhtinfd4c4102017-03-21 13:15:46 +000098
99protected:
Stanislav Mekhanoshin464cecf2017-05-16 15:43:52 +0000100 const LiveIntervals &LIS;
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000101 LiveRegSet LiveRegs;
102 GCNRegPressure CurPressure, MaxPressure;
103 const MachineInstr *LastTrackedMI = nullptr;
104 mutable const MachineRegisterInfo *MRI = nullptr;
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +0000105
Stanislav Mekhanoshin464cecf2017-05-16 15:43:52 +0000106 GCNRPTracker(const LiveIntervals &LIS_) : LIS(LIS_) {}
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +0000107
Stanislav Mekhanoshin28624f92018-06-04 17:21:54 +0000108 void reset(const MachineInstr &MI, const LiveRegSet *LiveRegsCopy,
109 bool After);
110
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000111public:
112 // live regs for the current state
113 const decltype(LiveRegs) &getLiveRegs() const { return LiveRegs; }
114 const MachineInstr *getLastTrackedMI() const { return LastTrackedMI; }
115
Stanislav Mekhanoshin464cecf2017-05-16 15:43:52 +0000116 void clearMaxPressure() { MaxPressure.clear(); }
117
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000118 // returns MaxPressure, resetting it
119 decltype(MaxPressure) moveMaxPressure() {
120 auto Res = MaxPressure;
121 MaxPressure.clear();
122 return Res;
123 }
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +0000124
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000125 decltype(LiveRegs) moveLiveRegs() {
126 return std::move(LiveRegs);
127 }
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +0000128
Stanislav Mekhanoshinacca0f52017-05-16 16:31:45 +0000129 static void printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
130 const MachineRegisterInfo &MRI);
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000131};
132
133class GCNUpwardRPTracker : public GCNRPTracker {
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000134public:
Stanislav Mekhanoshin464cecf2017-05-16 15:43:52 +0000135 GCNUpwardRPTracker(const LiveIntervals &LIS_) : GCNRPTracker(LIS_) {}
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +0000136
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000137 // reset tracker to the point just below MI
138 // filling live regs upon this point using LIS
Stanislav Mekhanoshin464cecf2017-05-16 15:43:52 +0000139 void reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000140
141 // move to the state just above the MI
142 void recede(const MachineInstr &MI);
143
144 // checks whether the tracker's state after receding MI corresponds
145 // to reported by LIS
146 bool isValid() const;
147};
148
Stanislav Mekhanoshin464cecf2017-05-16 15:43:52 +0000149class GCNDownwardRPTracker : public GCNRPTracker {
150 // Last position of reset or advanceBeforeNext
151 MachineBasicBlock::const_iterator NextMI;
152
153 MachineBasicBlock::const_iterator MBBEnd;
154
155public:
156 GCNDownwardRPTracker(const LiveIntervals &LIS_) : GCNRPTracker(LIS_) {}
157
158 const MachineBasicBlock::const_iterator getNext() const { return NextMI; }
159
160 // Reset tracker to the point before the MI
161 // filling live regs upon this point using LIS.
162 // Returns false if block is empty except debug values.
163 bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
164
165 // Move to the state right before the next MI. Returns false if reached
166 // end of the block.
167 bool advanceBeforeNext();
168
169 // Move to the state at the MI, advanceBeforeNext has to be called first.
170 void advanceToNext();
171
172 // Move to the state at the next MI. Returns false if reached end of block.
173 bool advance();
174
175 // Advance instructions until before End.
176 bool advance(MachineBasicBlock::const_iterator End);
177
178 // Reset to Begin and advance to End.
179 bool advance(MachineBasicBlock::const_iterator Begin,
180 MachineBasicBlock::const_iterator End,
181 const LiveRegSet *LiveRegsCopy = nullptr);
182};
183
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000184LaneBitmask getLiveLaneMask(unsigned Reg,
185 SlotIndex SI,
186 const LiveIntervals &LIS,
187 const MachineRegisterInfo &MRI);
188
189GCNRPTracker::LiveRegSet getLiveRegs(SlotIndex SI,
190 const LiveIntervals &LIS,
191 const MachineRegisterInfo &MRI);
192
193inline GCNRPTracker::LiveRegSet getLiveRegsAfter(const MachineInstr &MI,
194 const LiveIntervals &LIS) {
195 return getLiveRegs(LIS.getInstructionIndex(MI).getDeadSlot(), LIS,
196 MI.getParent()->getParent()->getRegInfo());
197}
198
199inline GCNRPTracker::LiveRegSet getLiveRegsBefore(const MachineInstr &MI,
200 const LiveIntervals &LIS) {
201 return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS,
202 MI.getParent()->getParent()->getRegInfo());
203}
204
205template <typename Range>
206GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI,
207 Range &&LiveRegs) {
208 GCNRegPressure Res;
209 for (const auto &RM : LiveRegs)
210 Res.inc(RM.first, LaneBitmask::getNone(), RM.second, MRI);
211 return Res;
212}
213
214void printLivesAt(SlotIndex SI,
215 const LiveIntervals &LIS,
216 const MachineRegisterInfo &MRI);
217
Eugene Zelenkoc8fbf6f2017-08-10 00:46:15 +0000218} // end namespace llvm
Valery Pykhtinfd4c4102017-03-21 13:15:46 +0000219
220#endif // LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H