| Nemanja Ivanovic | accab03 | 2017-05-31 08:04:07 +0000 | [diff] [blame] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | 
|  | 2 | ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ | 
| Nemanja Ivanovic | db7e770 | 2017-11-30 13:39:10 +0000 | [diff] [blame^] | 3 | ; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ | 
| Nemanja Ivanovic | accab03 | 2017-05-31 08:04:07 +0000 | [diff] [blame] | 4 | ; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl | 
|  | 5 | ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ | 
| Nemanja Ivanovic | db7e770 | 2017-11-30 13:39:10 +0000 | [diff] [blame^] | 6 | ; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ | 
| Nemanja Ivanovic | accab03 | 2017-05-31 08:04:07 +0000 | [diff] [blame] | 7 | ; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl | 
|  | 8 | ; ModuleID = 'ComparisonTestCases/testComparesiequll.c' | 
|  | 9 |  | 
|  | 10 | @glob = common local_unnamed_addr global i64 0, align 8 | 
|  | 11 |  | 
|  | 12 | ; Function Attrs: norecurse nounwind readnone | 
|  | 13 | define signext i32 @test_iequll(i64 %a, i64 %b) { | 
|  | 14 | ; CHECK-LABEL: test_iequll: | 
|  | 15 | ; CHECK:       # BB#0: # %entry | 
|  | 16 | ; CHECK-NEXT:    xor r3, r3, r4 | 
|  | 17 | ; CHECK-NEXT:    cntlzd r3, r3 | 
|  | 18 | ; CHECK-NEXT:    rldicl r3, r3, 58, 63 | 
|  | 19 | ; CHECK-NEXT:    blr | 
|  | 20 | entry: | 
|  | 21 | %cmp = icmp eq i64 %a, %b | 
|  | 22 | %conv = zext i1 %cmp to i32 | 
|  | 23 | ret i32 %conv | 
|  | 24 | } | 
|  | 25 |  | 
|  | 26 | ; Function Attrs: norecurse nounwind readnone | 
|  | 27 | define signext i32 @test_iequll_sext(i64 %a, i64 %b) { | 
|  | 28 | ; CHECK-LABEL: test_iequll_sext: | 
|  | 29 | ; CHECK:       # BB#0: # %entry | 
|  | 30 | ; CHECK-NEXT:    xor r3, r3, r4 | 
|  | 31 | ; CHECK-NEXT:    addic r3, r3, -1 | 
|  | 32 | ; CHECK-NEXT:    subfe r3, r3, r3 | 
|  | 33 | ; CHECK-NEXT:    blr | 
|  | 34 | entry: | 
|  | 35 | %cmp = icmp eq i64 %a, %b | 
|  | 36 | %sub = sext i1 %cmp to i32 | 
|  | 37 | ret i32 %sub | 
|  | 38 | } | 
|  | 39 |  | 
|  | 40 | ; Function Attrs: norecurse nounwind readnone | 
|  | 41 | define signext i32 @test_iequll_z(i64 %a) { | 
|  | 42 | ; CHECK-LABEL: test_iequll_z: | 
|  | 43 | ; CHECK:       # BB#0: # %entry | 
|  | 44 | ; CHECK-NEXT:    cntlzd r3, r3 | 
|  | 45 | ; CHECK-NEXT:    rldicl r3, r3, 58, 63 | 
|  | 46 | ; CHECK-NEXT:    blr | 
|  | 47 | entry: | 
|  | 48 | %cmp = icmp eq i64 %a, 0 | 
|  | 49 | %conv = zext i1 %cmp to i32 | 
|  | 50 | ret i32 %conv | 
|  | 51 | } | 
|  | 52 |  | 
|  | 53 | ; Function Attrs: norecurse nounwind readnone | 
|  | 54 | define signext i32 @test_iequll_sext_z(i64 %a) { | 
|  | 55 | ; CHECK-LABEL: test_iequll_sext_z: | 
|  | 56 | ; CHECK:       # BB#0: # %entry | 
|  | 57 | ; CHECK-NEXT:    addic r3, r3, -1 | 
|  | 58 | ; CHECK-NEXT:    subfe r3, r3, r3 | 
|  | 59 | ; CHECK-NEXT:    blr | 
|  | 60 | entry: | 
|  | 61 | %cmp = icmp eq i64 %a, 0 | 
|  | 62 | %sub = sext i1 %cmp to i32 | 
|  | 63 | ret i32 %sub | 
|  | 64 | } | 
|  | 65 |  | 
|  | 66 | ; Function Attrs: norecurse nounwind | 
|  | 67 | define void @test_iequll_store(i64 %a, i64 %b) { | 
|  | 68 | ; CHECK-LABEL: test_iequll_store: | 
|  | 69 | ; CHECK:       # BB#0: # %entry | 
|  | 70 | ; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha | 
|  | 71 | ; CHECK-NEXT:    xor r3, r3, r4 | 
|  | 72 | ; CHECK-NEXT:    ld r12, .LC0@toc@l(r5) | 
|  | 73 | ; CHECK-NEXT:    cntlzd r3, r3 | 
|  | 74 | ; CHECK-NEXT:    rldicl r3, r3, 58, 63 | 
|  | 75 | ; CHECK-NEXT:    std r3, 0(r12) | 
|  | 76 | ; CHECK-NEXT:    blr | 
|  | 77 | entry: | 
|  | 78 | %cmp = icmp eq i64 %a, %b | 
|  | 79 | %conv1 = zext i1 %cmp to i64 | 
|  | 80 | store i64 %conv1, i64* @glob, align 8 | 
|  | 81 | ret void | 
|  | 82 | } | 
|  | 83 |  | 
|  | 84 | ; Function Attrs: norecurse nounwind | 
|  | 85 | define void @test_iequll_sext_store(i64 %a, i64 %b) { | 
|  | 86 | ; CHECK-LABEL: test_iequll_sext_store: | 
|  | 87 | ; CHECK:       # BB#0: # %entry | 
|  | 88 | ; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha | 
|  | 89 | ; CHECK-NEXT:    xor r3, r3, r4 | 
|  | 90 | ; CHECK-NEXT:    ld r12, .LC0@toc@l(r5) | 
|  | 91 | ; CHECK-NEXT:    addic r3, r3, -1 | 
|  | 92 | ; CHECK-NEXT:    subfe r3, r3, r3 | 
|  | 93 | ; CHECK-NEXT:    std r3, 0(r12) | 
|  | 94 | ; CHECK-NEXT:    blr | 
|  | 95 | entry: | 
|  | 96 | %cmp = icmp eq i64 %a, %b | 
|  | 97 | %conv1 = sext i1 %cmp to i64 | 
|  | 98 | store i64 %conv1, i64* @glob, align 8 | 
|  | 99 | ret void | 
|  | 100 | } | 
|  | 101 |  | 
|  | 102 | ; Function Attrs: norecurse nounwind | 
|  | 103 | define void @test_iequll_z_store(i64 %a) { | 
|  | 104 | ; CHECK-LABEL: test_iequll_z_store: | 
|  | 105 | ; CHECK:       # BB#0: # %entry | 
|  | 106 | ; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha | 
|  | 107 | ; CHECK-NEXT:    cntlzd r3, r3 | 
|  | 108 | ; CHECK-NEXT:    ld r4, .LC0@toc@l(r4) | 
|  | 109 | ; CHECK-NEXT:    rldicl r3, r3, 58, 63 | 
|  | 110 | ; CHECK-NEXT:    std r3, 0(r4) | 
|  | 111 | ; CHECK-NEXT:    blr | 
|  | 112 | entry: | 
|  | 113 | %cmp = icmp eq i64 %a, 0 | 
|  | 114 | %conv1 = zext i1 %cmp to i64 | 
|  | 115 | store i64 %conv1, i64* @glob, align 8 | 
|  | 116 | ret void | 
|  | 117 | } | 
|  | 118 |  | 
|  | 119 | ; Function Attrs: norecurse nounwind | 
|  | 120 | define void @test_iequll_sext_z_store(i64 %a) { | 
|  | 121 | ; CHECK-LABEL: test_iequll_sext_z_store: | 
|  | 122 | ; CHECK:       # BB#0: # %entry | 
|  | 123 | ; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha | 
|  | 124 | ; CHECK-NEXT:    addic r3, r3, -1 | 
|  | 125 | ; CHECK-NEXT:    ld r4, .LC0@toc@l(r4) | 
|  | 126 | ; CHECK-NEXT:    subfe r3, r3, r3 | 
|  | 127 | ; CHECK-NEXT:    std r3, 0(r4) | 
|  | 128 | ; CHECK-NEXT:    blr | 
|  | 129 | entry: | 
|  | 130 | %cmp = icmp eq i64 %a, 0 | 
|  | 131 | %conv1 = sext i1 %cmp to i64 | 
|  | 132 | store i64 %conv1, i64* @glob, align 8 | 
|  | 133 | ret void | 
|  | 134 | } |