Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / dc790dd5d0eda1a22388824bd518045bc57741c1 / . / llvm / test / CodeGen / RISCV / atomic-rmw.ll
blob: 9e1e26860879cdb98dd9b1e1117431a3d4658e50 [file] [log] [blame]
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame^]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN: | FileCheck -check-prefix=RV32I %s
4
5define i8 @atomicrmw_xchg_i8_monotonic(i8* %a, i8 %b) {
6; RV32I-LABEL: atomicrmw_xchg_i8_monotonic:
7; RV32I: # %bb.0:
8; RV32I-NEXT: addi sp, sp, -16
9; RV32I-NEXT: sw ra, 12(sp)
10; RV32I-NEXT: mv a2, zero
11; RV32I-NEXT: call __atomic_exchange_1
12; RV32I-NEXT: lw ra, 12(sp)
13; RV32I-NEXT: addi sp, sp, 16
14; RV32I-NEXT: ret
15 %1 = atomicrmw xchg i8* %a, i8 %b monotonic
16 ret i8 %1
17}
18
19define i8 @atomicrmw_xchg_i8_acquire(i8* %a, i8 %b) {
20; RV32I-LABEL: atomicrmw_xchg_i8_acquire:
21; RV32I: # %bb.0:
22; RV32I-NEXT: addi sp, sp, -16
23; RV32I-NEXT: sw ra, 12(sp)
24; RV32I-NEXT: addi a2, zero, 2
25; RV32I-NEXT: call __atomic_exchange_1
26; RV32I-NEXT: lw ra, 12(sp)
27; RV32I-NEXT: addi sp, sp, 16
28; RV32I-NEXT: ret
29 %1 = atomicrmw xchg i8* %a, i8 %b acquire
30 ret i8 %1
31}
32
33define i8 @atomicrmw_xchg_i8_release(i8* %a, i8 %b) {
34; RV32I-LABEL: atomicrmw_xchg_i8_release:
35; RV32I: # %bb.0:
36; RV32I-NEXT: addi sp, sp, -16
37; RV32I-NEXT: sw ra, 12(sp)
38; RV32I-NEXT: addi a2, zero, 3
39; RV32I-NEXT: call __atomic_exchange_1
40; RV32I-NEXT: lw ra, 12(sp)
41; RV32I-NEXT: addi sp, sp, 16
42; RV32I-NEXT: ret
43 %1 = atomicrmw xchg i8* %a, i8 %b release
44 ret i8 %1
45}
46
47define i8 @atomicrmw_xchg_i8_acq_rel(i8* %a, i8 %b) {
48; RV32I-LABEL: atomicrmw_xchg_i8_acq_rel:
49; RV32I: # %bb.0:
50; RV32I-NEXT: addi sp, sp, -16
51; RV32I-NEXT: sw ra, 12(sp)
52; RV32I-NEXT: addi a2, zero, 4
53; RV32I-NEXT: call __atomic_exchange_1
54; RV32I-NEXT: lw ra, 12(sp)
55; RV32I-NEXT: addi sp, sp, 16
56; RV32I-NEXT: ret
57 %1 = atomicrmw xchg i8* %a, i8 %b acq_rel
58 ret i8 %1
59}
60
61define i8 @atomicrmw_xchg_i8_seq_cst(i8* %a, i8 %b) {
62; RV32I-LABEL: atomicrmw_xchg_i8_seq_cst:
63; RV32I: # %bb.0:
64; RV32I-NEXT: addi sp, sp, -16
65; RV32I-NEXT: sw ra, 12(sp)
66; RV32I-NEXT: addi a2, zero, 5
67; RV32I-NEXT: call __atomic_exchange_1
68; RV32I-NEXT: lw ra, 12(sp)
69; RV32I-NEXT: addi sp, sp, 16
70; RV32I-NEXT: ret
71 %1 = atomicrmw xchg i8* %a, i8 %b seq_cst
72 ret i8 %1
73}
74
75define i8 @atomicrmw_add_i8_monotonic(i8 *%a, i8 %b) nounwind {
76; RV32I-LABEL: atomicrmw_add_i8_monotonic:
77; RV32I: # %bb.0:
78; RV32I-NEXT: addi sp, sp, -16
79; RV32I-NEXT: sw ra, 12(sp)
80; RV32I-NEXT: mv a2, zero
81; RV32I-NEXT: call __atomic_fetch_add_1
82; RV32I-NEXT: lw ra, 12(sp)
83; RV32I-NEXT: addi sp, sp, 16
84; RV32I-NEXT: ret
85 %1 = atomicrmw add i8* %a, i8 %b monotonic
86 ret i8 %1
87}
88
89define i8 @atomicrmw_add_i8_acquire(i8 *%a, i8 %b) nounwind {
90; RV32I-LABEL: atomicrmw_add_i8_acquire:
91; RV32I: # %bb.0:
92; RV32I-NEXT: addi sp, sp, -16
93; RV32I-NEXT: sw ra, 12(sp)
94; RV32I-NEXT: addi a2, zero, 2
95; RV32I-NEXT: call __atomic_fetch_add_1
96; RV32I-NEXT: lw ra, 12(sp)
97; RV32I-NEXT: addi sp, sp, 16
98; RV32I-NEXT: ret
99 %1 = atomicrmw add i8* %a, i8 %b acquire
100 ret i8 %1
101}
102
103define i8 @atomicrmw_add_i8_release(i8 *%a, i8 %b) nounwind {
104; RV32I-LABEL: atomicrmw_add_i8_release:
105; RV32I: # %bb.0:
106; RV32I-NEXT: addi sp, sp, -16
107; RV32I-NEXT: sw ra, 12(sp)
108; RV32I-NEXT: addi a2, zero, 3
109; RV32I-NEXT: call __atomic_fetch_add_1
110; RV32I-NEXT: lw ra, 12(sp)
111; RV32I-NEXT: addi sp, sp, 16
112; RV32I-NEXT: ret
113 %1 = atomicrmw add i8* %a, i8 %b release
114 ret i8 %1
115}
116
117define i8 @atomicrmw_add_i8_acq_rel(i8 *%a, i8 %b) nounwind {
118; RV32I-LABEL: atomicrmw_add_i8_acq_rel:
119; RV32I: # %bb.0:
120; RV32I-NEXT: addi sp, sp, -16
121; RV32I-NEXT: sw ra, 12(sp)
122; RV32I-NEXT: addi a2, zero, 4
123; RV32I-NEXT: call __atomic_fetch_add_1
124; RV32I-NEXT: lw ra, 12(sp)
125; RV32I-NEXT: addi sp, sp, 16
126; RV32I-NEXT: ret
127 %1 = atomicrmw add i8* %a, i8 %b acq_rel
128 ret i8 %1
129}
130
131define i8 @atomicrmw_add_i8_seq_cst(i8 *%a, i8 %b) nounwind {
132; RV32I-LABEL: atomicrmw_add_i8_seq_cst:
133; RV32I: # %bb.0:
134; RV32I-NEXT: addi sp, sp, -16
135; RV32I-NEXT: sw ra, 12(sp)
136; RV32I-NEXT: addi a2, zero, 5
137; RV32I-NEXT: call __atomic_fetch_add_1
138; RV32I-NEXT: lw ra, 12(sp)
139; RV32I-NEXT: addi sp, sp, 16
140; RV32I-NEXT: ret
141 %1 = atomicrmw add i8* %a, i8 %b seq_cst
142 ret i8 %1
143}
144
145define i8 @atomicrmw_sub_i8_monotonic(i8* %a, i8 %b) {
146; RV32I-LABEL: atomicrmw_sub_i8_monotonic:
147; RV32I: # %bb.0:
148; RV32I-NEXT: addi sp, sp, -16
149; RV32I-NEXT: sw ra, 12(sp)
150; RV32I-NEXT: mv a2, zero
151; RV32I-NEXT: call __atomic_fetch_sub_1
152; RV32I-NEXT: lw ra, 12(sp)
153; RV32I-NEXT: addi sp, sp, 16
154; RV32I-NEXT: ret
155 %1 = atomicrmw sub i8* %a, i8 %b monotonic
156 ret i8 %1
157}
158
159define i8 @atomicrmw_sub_i8_acquire(i8* %a, i8 %b) {
160; RV32I-LABEL: atomicrmw_sub_i8_acquire:
161; RV32I: # %bb.0:
162; RV32I-NEXT: addi sp, sp, -16
163; RV32I-NEXT: sw ra, 12(sp)
164; RV32I-NEXT: addi a2, zero, 2
165; RV32I-NEXT: call __atomic_fetch_sub_1
166; RV32I-NEXT: lw ra, 12(sp)
167; RV32I-NEXT: addi sp, sp, 16
168; RV32I-NEXT: ret
169 %1 = atomicrmw sub i8* %a, i8 %b acquire
170 ret i8 %1
171}
172
173define i8 @atomicrmw_sub_i8_release(i8* %a, i8 %b) {
174; RV32I-LABEL: atomicrmw_sub_i8_release:
175; RV32I: # %bb.0:
176; RV32I-NEXT: addi sp, sp, -16
177; RV32I-NEXT: sw ra, 12(sp)
178; RV32I-NEXT: addi a2, zero, 3
179; RV32I-NEXT: call __atomic_fetch_sub_1
180; RV32I-NEXT: lw ra, 12(sp)
181; RV32I-NEXT: addi sp, sp, 16
182; RV32I-NEXT: ret
183 %1 = atomicrmw sub i8* %a, i8 %b release
184 ret i8 %1
185}
186
187define i8 @atomicrmw_sub_i8_acq_rel(i8* %a, i8 %b) {
188; RV32I-LABEL: atomicrmw_sub_i8_acq_rel:
189; RV32I: # %bb.0:
190; RV32I-NEXT: addi sp, sp, -16
191; RV32I-NEXT: sw ra, 12(sp)
192; RV32I-NEXT: addi a2, zero, 4
193; RV32I-NEXT: call __atomic_fetch_sub_1
194; RV32I-NEXT: lw ra, 12(sp)
195; RV32I-NEXT: addi sp, sp, 16
196; RV32I-NEXT: ret
197 %1 = atomicrmw sub i8* %a, i8 %b acq_rel
198 ret i8 %1
199}
200
201define i8 @atomicrmw_sub_i8_seq_cst(i8* %a, i8 %b) {
202; RV32I-LABEL: atomicrmw_sub_i8_seq_cst:
203; RV32I: # %bb.0:
204; RV32I-NEXT: addi sp, sp, -16
205; RV32I-NEXT: sw ra, 12(sp)
206; RV32I-NEXT: addi a2, zero, 5
207; RV32I-NEXT: call __atomic_fetch_sub_1
208; RV32I-NEXT: lw ra, 12(sp)
209; RV32I-NEXT: addi sp, sp, 16
210; RV32I-NEXT: ret
211 %1 = atomicrmw sub i8* %a, i8 %b seq_cst
212 ret i8 %1
213}
214
215define i8 @atomicrmw_and_i8_monotonic(i8 *%a, i8 %b) nounwind {
216; RV32I-LABEL: atomicrmw_and_i8_monotonic:
217; RV32I: # %bb.0:
218; RV32I-NEXT: addi sp, sp, -16
219; RV32I-NEXT: sw ra, 12(sp)
220; RV32I-NEXT: mv a2, zero
221; RV32I-NEXT: call __atomic_fetch_and_1
222; RV32I-NEXT: lw ra, 12(sp)
223; RV32I-NEXT: addi sp, sp, 16
224; RV32I-NEXT: ret
225 %1 = atomicrmw and i8* %a, i8 %b monotonic
226 ret i8 %1
227}
228
229define i8 @atomicrmw_and_i8_acquire(i8 *%a, i8 %b) nounwind {
230; RV32I-LABEL: atomicrmw_and_i8_acquire:
231; RV32I: # %bb.0:
232; RV32I-NEXT: addi sp, sp, -16
233; RV32I-NEXT: sw ra, 12(sp)
234; RV32I-NEXT: addi a2, zero, 2
235; RV32I-NEXT: call __atomic_fetch_and_1
236; RV32I-NEXT: lw ra, 12(sp)
237; RV32I-NEXT: addi sp, sp, 16
238; RV32I-NEXT: ret
239 %1 = atomicrmw and i8* %a, i8 %b acquire
240 ret i8 %1
241}
242
243define i8 @atomicrmw_and_i8_release(i8 *%a, i8 %b) nounwind {
244; RV32I-LABEL: atomicrmw_and_i8_release:
245; RV32I: # %bb.0:
246; RV32I-NEXT: addi sp, sp, -16
247; RV32I-NEXT: sw ra, 12(sp)
248; RV32I-NEXT: addi a2, zero, 3
249; RV32I-NEXT: call __atomic_fetch_and_1
250; RV32I-NEXT: lw ra, 12(sp)
251; RV32I-NEXT: addi sp, sp, 16
252; RV32I-NEXT: ret
253 %1 = atomicrmw and i8* %a, i8 %b release
254 ret i8 %1
255}
256
257define i8 @atomicrmw_and_i8_acq_rel(i8 *%a, i8 %b) nounwind {
258; RV32I-LABEL: atomicrmw_and_i8_acq_rel:
259; RV32I: # %bb.0:
260; RV32I-NEXT: addi sp, sp, -16
261; RV32I-NEXT: sw ra, 12(sp)
262; RV32I-NEXT: addi a2, zero, 4
263; RV32I-NEXT: call __atomic_fetch_and_1
264; RV32I-NEXT: lw ra, 12(sp)
265; RV32I-NEXT: addi sp, sp, 16
266; RV32I-NEXT: ret
267 %1 = atomicrmw and i8* %a, i8 %b acq_rel
268 ret i8 %1
269}
270
271define i8 @atomicrmw_and_i8_seq_cst(i8 *%a, i8 %b) nounwind {
272; RV32I-LABEL: atomicrmw_and_i8_seq_cst:
273; RV32I: # %bb.0:
274; RV32I-NEXT: addi sp, sp, -16
275; RV32I-NEXT: sw ra, 12(sp)
276; RV32I-NEXT: addi a2, zero, 5
277; RV32I-NEXT: call __atomic_fetch_and_1
278; RV32I-NEXT: lw ra, 12(sp)
279; RV32I-NEXT: addi sp, sp, 16
280; RV32I-NEXT: ret
281 %1 = atomicrmw and i8* %a, i8 %b seq_cst
282 ret i8 %1
283}
284
285define i8 @atomicrmw_nand_i8_monotonic(i8* %a, i8 %b) {
286; RV32I-LABEL: atomicrmw_nand_i8_monotonic:
287; RV32I: # %bb.0:
288; RV32I-NEXT: addi sp, sp, -16
289; RV32I-NEXT: sw ra, 12(sp)
290; RV32I-NEXT: mv a2, zero
291; RV32I-NEXT: call __atomic_fetch_nand_1
292; RV32I-NEXT: lw ra, 12(sp)
293; RV32I-NEXT: addi sp, sp, 16
294; RV32I-NEXT: ret
295 %1 = atomicrmw nand i8* %a, i8 %b monotonic
296 ret i8 %1
297}
298
299define i8 @atomicrmw_nand_i8_acquire(i8* %a, i8 %b) {
300; RV32I-LABEL: atomicrmw_nand_i8_acquire:
301; RV32I: # %bb.0:
302; RV32I-NEXT: addi sp, sp, -16
303; RV32I-NEXT: sw ra, 12(sp)
304; RV32I-NEXT: addi a2, zero, 2
305; RV32I-NEXT: call __atomic_fetch_nand_1
306; RV32I-NEXT: lw ra, 12(sp)
307; RV32I-NEXT: addi sp, sp, 16
308; RV32I-NEXT: ret
309 %1 = atomicrmw nand i8* %a, i8 %b acquire
310 ret i8 %1
311}
312
313define i8 @atomicrmw_nand_i8_release(i8* %a, i8 %b) {
314; RV32I-LABEL: atomicrmw_nand_i8_release:
315; RV32I: # %bb.0:
316; RV32I-NEXT: addi sp, sp, -16
317; RV32I-NEXT: sw ra, 12(sp)
318; RV32I-NEXT: addi a2, zero, 3
319; RV32I-NEXT: call __atomic_fetch_nand_1
320; RV32I-NEXT: lw ra, 12(sp)
321; RV32I-NEXT: addi sp, sp, 16
322; RV32I-NEXT: ret
323 %1 = atomicrmw nand i8* %a, i8 %b release
324 ret i8 %1
325}
326
327define i8 @atomicrmw_nand_i8_acq_rel(i8* %a, i8 %b) {
328; RV32I-LABEL: atomicrmw_nand_i8_acq_rel:
329; RV32I: # %bb.0:
330; RV32I-NEXT: addi sp, sp, -16
331; RV32I-NEXT: sw ra, 12(sp)
332; RV32I-NEXT: addi a2, zero, 4
333; RV32I-NEXT: call __atomic_fetch_nand_1
334; RV32I-NEXT: lw ra, 12(sp)
335; RV32I-NEXT: addi sp, sp, 16
336; RV32I-NEXT: ret
337 %1 = atomicrmw nand i8* %a, i8 %b acq_rel
338 ret i8 %1
339}
340
341define i8 @atomicrmw_nand_i8_seq_cst(i8* %a, i8 %b) {
342; RV32I-LABEL: atomicrmw_nand_i8_seq_cst:
343; RV32I: # %bb.0:
344; RV32I-NEXT: addi sp, sp, -16
345; RV32I-NEXT: sw ra, 12(sp)
346; RV32I-NEXT: addi a2, zero, 5
347; RV32I-NEXT: call __atomic_fetch_nand_1
348; RV32I-NEXT: lw ra, 12(sp)
349; RV32I-NEXT: addi sp, sp, 16
350; RV32I-NEXT: ret
351 %1 = atomicrmw nand i8* %a, i8 %b seq_cst
352 ret i8 %1
353}
354
355define i8 @atomicrmw_or_i8_monotonic(i8 *%a, i8 %b) nounwind {
356; RV32I-LABEL: atomicrmw_or_i8_monotonic:
357; RV32I: # %bb.0:
358; RV32I-NEXT: addi sp, sp, -16
359; RV32I-NEXT: sw ra, 12(sp)
360; RV32I-NEXT: mv a2, zero
361; RV32I-NEXT: call __atomic_fetch_or_1
362; RV32I-NEXT: lw ra, 12(sp)
363; RV32I-NEXT: addi sp, sp, 16
364; RV32I-NEXT: ret
365 %1 = atomicrmw or i8* %a, i8 %b monotonic
366 ret i8 %1
367}
368
369define i8 @atomicrmw_or_i8_acquire(i8 *%a, i8 %b) nounwind {
370; RV32I-LABEL: atomicrmw_or_i8_acquire:
371; RV32I: # %bb.0:
372; RV32I-NEXT: addi sp, sp, -16
373; RV32I-NEXT: sw ra, 12(sp)
374; RV32I-NEXT: addi a2, zero, 2
375; RV32I-NEXT: call __atomic_fetch_or_1
376; RV32I-NEXT: lw ra, 12(sp)
377; RV32I-NEXT: addi sp, sp, 16
378; RV32I-NEXT: ret
379 %1 = atomicrmw or i8* %a, i8 %b acquire
380 ret i8 %1
381}
382
383define i8 @atomicrmw_or_i8_release(i8 *%a, i8 %b) nounwind {
384; RV32I-LABEL: atomicrmw_or_i8_release:
385; RV32I: # %bb.0:
386; RV32I-NEXT: addi sp, sp, -16
387; RV32I-NEXT: sw ra, 12(sp)
388; RV32I-NEXT: addi a2, zero, 3
389; RV32I-NEXT: call __atomic_fetch_or_1
390; RV32I-NEXT: lw ra, 12(sp)
391; RV32I-NEXT: addi sp, sp, 16
392; RV32I-NEXT: ret
393 %1 = atomicrmw or i8* %a, i8 %b release
394 ret i8 %1
395}
396
397define i8 @atomicrmw_or_i8_acq_rel(i8 *%a, i8 %b) nounwind {
398; RV32I-LABEL: atomicrmw_or_i8_acq_rel:
399; RV32I: # %bb.0:
400; RV32I-NEXT: addi sp, sp, -16
401; RV32I-NEXT: sw ra, 12(sp)
402; RV32I-NEXT: addi a2, zero, 4
403; RV32I-NEXT: call __atomic_fetch_or_1
404; RV32I-NEXT: lw ra, 12(sp)
405; RV32I-NEXT: addi sp, sp, 16
406; RV32I-NEXT: ret
407 %1 = atomicrmw or i8* %a, i8 %b acq_rel
408 ret i8 %1
409}
410
411define i8 @atomicrmw_or_i8_seq_cst(i8 *%a, i8 %b) nounwind {
412; RV32I-LABEL: atomicrmw_or_i8_seq_cst:
413; RV32I: # %bb.0:
414; RV32I-NEXT: addi sp, sp, -16
415; RV32I-NEXT: sw ra, 12(sp)
416; RV32I-NEXT: addi a2, zero, 5
417; RV32I-NEXT: call __atomic_fetch_or_1
418; RV32I-NEXT: lw ra, 12(sp)
419; RV32I-NEXT: addi sp, sp, 16
420; RV32I-NEXT: ret
421 %1 = atomicrmw or i8* %a, i8 %b seq_cst
422 ret i8 %1
423}
424
425define i8 @atomicrmw_xor_i8_monotonic(i8 *%a, i8 %b) nounwind {
426; RV32I-LABEL: atomicrmw_xor_i8_monotonic:
427; RV32I: # %bb.0:
428; RV32I-NEXT: addi sp, sp, -16
429; RV32I-NEXT: sw ra, 12(sp)
430; RV32I-NEXT: mv a2, zero
431; RV32I-NEXT: call __atomic_fetch_xor_1
432; RV32I-NEXT: lw ra, 12(sp)
433; RV32I-NEXT: addi sp, sp, 16
434; RV32I-NEXT: ret
435 %1 = atomicrmw xor i8* %a, i8 %b monotonic
436 ret i8 %1
437}
438
439define i8 @atomicrmw_xor_i8_acquire(i8 *%a, i8 %b) nounwind {
440; RV32I-LABEL: atomicrmw_xor_i8_acquire:
441; RV32I: # %bb.0:
442; RV32I-NEXT: addi sp, sp, -16
443; RV32I-NEXT: sw ra, 12(sp)
444; RV32I-NEXT: addi a2, zero, 2
445; RV32I-NEXT: call __atomic_fetch_xor_1
446; RV32I-NEXT: lw ra, 12(sp)
447; RV32I-NEXT: addi sp, sp, 16
448; RV32I-NEXT: ret
449 %1 = atomicrmw xor i8* %a, i8 %b acquire
450 ret i8 %1
451}
452
453define i8 @atomicrmw_xor_i8_release(i8 *%a, i8 %b) nounwind {
454; RV32I-LABEL: atomicrmw_xor_i8_release:
455; RV32I: # %bb.0:
456; RV32I-NEXT: addi sp, sp, -16
457; RV32I-NEXT: sw ra, 12(sp)
458; RV32I-NEXT: addi a2, zero, 3
459; RV32I-NEXT: call __atomic_fetch_xor_1
460; RV32I-NEXT: lw ra, 12(sp)
461; RV32I-NEXT: addi sp, sp, 16
462; RV32I-NEXT: ret
463 %1 = atomicrmw xor i8* %a, i8 %b release
464 ret i8 %1
465}
466
467define i8 @atomicrmw_xor_i8_acq_rel(i8 *%a, i8 %b) nounwind {
468; RV32I-LABEL: atomicrmw_xor_i8_acq_rel:
469; RV32I: # %bb.0:
470; RV32I-NEXT: addi sp, sp, -16
471; RV32I-NEXT: sw ra, 12(sp)
472; RV32I-NEXT: addi a2, zero, 4
473; RV32I-NEXT: call __atomic_fetch_xor_1
474; RV32I-NEXT: lw ra, 12(sp)
475; RV32I-NEXT: addi sp, sp, 16
476; RV32I-NEXT: ret
477 %1 = atomicrmw xor i8* %a, i8 %b acq_rel
478 ret i8 %1
479}
480
481define i8 @atomicrmw_xor_i8_seq_cst(i8 *%a, i8 %b) nounwind {
482; RV32I-LABEL: atomicrmw_xor_i8_seq_cst:
483; RV32I: # %bb.0:
484; RV32I-NEXT: addi sp, sp, -16
485; RV32I-NEXT: sw ra, 12(sp)
486; RV32I-NEXT: addi a2, zero, 5
487; RV32I-NEXT: call __atomic_fetch_xor_1
488; RV32I-NEXT: lw ra, 12(sp)
489; RV32I-NEXT: addi sp, sp, 16
490; RV32I-NEXT: ret
491 %1 = atomicrmw xor i8* %a, i8 %b seq_cst
492 ret i8 %1
493}
494
495define i8 @atomicrmw_max_i8_monotonic(i8 *%a, i8 %b) nounwind {
496; RV32I-LABEL: atomicrmw_max_i8_monotonic:
497; RV32I: # %bb.0:
498; RV32I-NEXT: addi sp, sp, -32
499; RV32I-NEXT: sw ra, 28(sp)
500; RV32I-NEXT: sw s1, 24(sp)
501; RV32I-NEXT: sw s2, 20(sp)
502; RV32I-NEXT: sw s3, 16(sp)
503; RV32I-NEXT: sw s4, 12(sp)
504; RV32I-NEXT: mv s2, a1
505; RV32I-NEXT: mv s4, a0
506; RV32I-NEXT: lbu a0, 0(a0)
507; RV32I-NEXT: slli a1, a1, 24
508; RV32I-NEXT: srai s1, a1, 24
509; RV32I-NEXT: addi s3, sp, 11
510; RV32I-NEXT: .LBB35_1: # %atomicrmw.start
511; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
512; RV32I-NEXT: slli a1, a0, 24
513; RV32I-NEXT: srai a1, a1, 24
514; RV32I-NEXT: mv a2, a0
515; RV32I-NEXT: blt s1, a1, .LBB35_3
516; RV32I-NEXT: # %bb.2: # %atomicrmw.start
517; RV32I-NEXT: # in Loop: Header=BB35_1 Depth=1
518; RV32I-NEXT: mv a2, s2
519; RV32I-NEXT: .LBB35_3: # %atomicrmw.start
520; RV32I-NEXT: # in Loop: Header=BB35_1 Depth=1
521; RV32I-NEXT: sb a0, 11(sp)
522; RV32I-NEXT: mv a0, s4
523; RV32I-NEXT: mv a1, s3
524; RV32I-NEXT: mv a3, zero
525; RV32I-NEXT: mv a4, zero
526; RV32I-NEXT: call __atomic_compare_exchange_1
527; RV32I-NEXT: mv a1, a0
528; RV32I-NEXT: lb a0, 11(sp)
529; RV32I-NEXT: beqz a1, .LBB35_1
530; RV32I-NEXT: # %bb.4: # %atomicrmw.end
531; RV32I-NEXT: lw s4, 12(sp)
532; RV32I-NEXT: lw s3, 16(sp)
533; RV32I-NEXT: lw s2, 20(sp)
534; RV32I-NEXT: lw s1, 24(sp)
535; RV32I-NEXT: lw ra, 28(sp)
536; RV32I-NEXT: addi sp, sp, 32
537; RV32I-NEXT: ret
538 %1 = atomicrmw max i8* %a, i8 %b monotonic
539 ret i8 %1
540}
541
542define i8 @atomicrmw_max_i8_acquire(i8 *%a, i8 %b) nounwind {
543; RV32I-LABEL: atomicrmw_max_i8_acquire:
544; RV32I: # %bb.0:
545; RV32I-NEXT: addi sp, sp, -32
546; RV32I-NEXT: sw ra, 28(sp)
547; RV32I-NEXT: sw s1, 24(sp)
548; RV32I-NEXT: sw s2, 20(sp)
549; RV32I-NEXT: sw s3, 16(sp)
550; RV32I-NEXT: sw s4, 12(sp)
551; RV32I-NEXT: sw s5, 8(sp)
552; RV32I-NEXT: mv s2, a1
553; RV32I-NEXT: mv s4, a0
554; RV32I-NEXT: lbu a0, 0(a0)
555; RV32I-NEXT: slli a1, a1, 24
556; RV32I-NEXT: srai s5, a1, 24
557; RV32I-NEXT: addi s3, sp, 7
558; RV32I-NEXT: addi s1, zero, 2
559; RV32I-NEXT: .LBB36_1: # %atomicrmw.start
560; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
561; RV32I-NEXT: slli a1, a0, 24
562; RV32I-NEXT: srai a1, a1, 24
563; RV32I-NEXT: mv a2, a0
564; RV32I-NEXT: blt s5, a1, .LBB36_3
565; RV32I-NEXT: # %bb.2: # %atomicrmw.start
566; RV32I-NEXT: # in Loop: Header=BB36_1 Depth=1
567; RV32I-NEXT: mv a2, s2
568; RV32I-NEXT: .LBB36_3: # %atomicrmw.start
569; RV32I-NEXT: # in Loop: Header=BB36_1 Depth=1
570; RV32I-NEXT: sb a0, 7(sp)
571; RV32I-NEXT: mv a0, s4
572; RV32I-NEXT: mv a1, s3
573; RV32I-NEXT: mv a3, s1
574; RV32I-NEXT: mv a4, s1
575; RV32I-NEXT: call __atomic_compare_exchange_1
576; RV32I-NEXT: mv a1, a0
577; RV32I-NEXT: lb a0, 7(sp)
578; RV32I-NEXT: beqz a1, .LBB36_1
579; RV32I-NEXT: # %bb.4: # %atomicrmw.end
580; RV32I-NEXT: lw s5, 8(sp)
581; RV32I-NEXT: lw s4, 12(sp)
582; RV32I-NEXT: lw s3, 16(sp)
583; RV32I-NEXT: lw s2, 20(sp)
584; RV32I-NEXT: lw s1, 24(sp)
585; RV32I-NEXT: lw ra, 28(sp)
586; RV32I-NEXT: addi sp, sp, 32
587; RV32I-NEXT: ret
588 %1 = atomicrmw max i8* %a, i8 %b acquire
589 ret i8 %1
590}
591
592define i8 @atomicrmw_max_i8_release(i8 *%a, i8 %b) nounwind {
593; RV32I-LABEL: atomicrmw_max_i8_release:
594; RV32I: # %bb.0:
595; RV32I-NEXT: addi sp, sp, -32
596; RV32I-NEXT: sw ra, 28(sp)
597; RV32I-NEXT: sw s1, 24(sp)
598; RV32I-NEXT: sw s2, 20(sp)
599; RV32I-NEXT: sw s3, 16(sp)
600; RV32I-NEXT: sw s4, 12(sp)
601; RV32I-NEXT: sw s5, 8(sp)
602; RV32I-NEXT: mv s2, a1
603; RV32I-NEXT: mv s5, a0
604; RV32I-NEXT: lbu a0, 0(a0)
605; RV32I-NEXT: slli a1, a1, 24
606; RV32I-NEXT: srai s1, a1, 24
607; RV32I-NEXT: addi s3, sp, 7
608; RV32I-NEXT: addi s4, zero, 3
609; RV32I-NEXT: .LBB37_1: # %atomicrmw.start
610; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
611; RV32I-NEXT: slli a1, a0, 24
612; RV32I-NEXT: srai a1, a1, 24
613; RV32I-NEXT: mv a2, a0
614; RV32I-NEXT: blt s1, a1, .LBB37_3
615; RV32I-NEXT: # %bb.2: # %atomicrmw.start
616; RV32I-NEXT: # in Loop: Header=BB37_1 Depth=1
617; RV32I-NEXT: mv a2, s2
618; RV32I-NEXT: .LBB37_3: # %atomicrmw.start
619; RV32I-NEXT: # in Loop: Header=BB37_1 Depth=1
620; RV32I-NEXT: sb a0, 7(sp)
621; RV32I-NEXT: mv a0, s5
622; RV32I-NEXT: mv a1, s3
623; RV32I-NEXT: mv a3, s4
624; RV32I-NEXT: mv a4, zero
625; RV32I-NEXT: call __atomic_compare_exchange_1
626; RV32I-NEXT: mv a1, a0
627; RV32I-NEXT: lb a0, 7(sp)
628; RV32I-NEXT: beqz a1, .LBB37_1
629; RV32I-NEXT: # %bb.4: # %atomicrmw.end
630; RV32I-NEXT: lw s5, 8(sp)
631; RV32I-NEXT: lw s4, 12(sp)
632; RV32I-NEXT: lw s3, 16(sp)
633; RV32I-NEXT: lw s2, 20(sp)
634; RV32I-NEXT: lw s1, 24(sp)
635; RV32I-NEXT: lw ra, 28(sp)
636; RV32I-NEXT: addi sp, sp, 32
637; RV32I-NEXT: ret
638 %1 = atomicrmw max i8* %a, i8 %b release
639 ret i8 %1
640}
641
642define i8 @atomicrmw_max_i8_acq_rel(i8 *%a, i8 %b) nounwind {
643; RV32I-LABEL: atomicrmw_max_i8_acq_rel:
644; RV32I: # %bb.0:
645; RV32I-NEXT: addi sp, sp, -32
646; RV32I-NEXT: sw ra, 28(sp)
647; RV32I-NEXT: sw s1, 24(sp)
648; RV32I-NEXT: sw s2, 20(sp)
649; RV32I-NEXT: sw s3, 16(sp)
650; RV32I-NEXT: sw s4, 12(sp)
651; RV32I-NEXT: sw s5, 8(sp)
652; RV32I-NEXT: sw s6, 4(sp)
653; RV32I-NEXT: mv s2, a1
654; RV32I-NEXT: mv s6, a0
655; RV32I-NEXT: lbu a0, 0(a0)
656; RV32I-NEXT: slli a1, a1, 24
657; RV32I-NEXT: srai s1, a1, 24
658; RV32I-NEXT: addi s3, sp, 3
659; RV32I-NEXT: addi s4, zero, 4
660; RV32I-NEXT: addi s5, zero, 2
661; RV32I-NEXT: .LBB38_1: # %atomicrmw.start
662; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
663; RV32I-NEXT: slli a1, a0, 24
664; RV32I-NEXT: srai a1, a1, 24
665; RV32I-NEXT: mv a2, a0
666; RV32I-NEXT: blt s1, a1, .LBB38_3
667; RV32I-NEXT: # %bb.2: # %atomicrmw.start
668; RV32I-NEXT: # in Loop: Header=BB38_1 Depth=1
669; RV32I-NEXT: mv a2, s2
670; RV32I-NEXT: .LBB38_3: # %atomicrmw.start
671; RV32I-NEXT: # in Loop: Header=BB38_1 Depth=1
672; RV32I-NEXT: sb a0, 3(sp)
673; RV32I-NEXT: mv a0, s6
674; RV32I-NEXT: mv a1, s3
675; RV32I-NEXT: mv a3, s4
676; RV32I-NEXT: mv a4, s5
677; RV32I-NEXT: call __atomic_compare_exchange_1
678; RV32I-NEXT: mv a1, a0
679; RV32I-NEXT: lb a0, 3(sp)
680; RV32I-NEXT: beqz a1, .LBB38_1
681; RV32I-NEXT: # %bb.4: # %atomicrmw.end
682; RV32I-NEXT: lw s6, 4(sp)
683; RV32I-NEXT: lw s5, 8(sp)
684; RV32I-NEXT: lw s4, 12(sp)
685; RV32I-NEXT: lw s3, 16(sp)
686; RV32I-NEXT: lw s2, 20(sp)
687; RV32I-NEXT: lw s1, 24(sp)
688; RV32I-NEXT: lw ra, 28(sp)
689; RV32I-NEXT: addi sp, sp, 32
690; RV32I-NEXT: ret
691 %1 = atomicrmw max i8* %a, i8 %b acq_rel
692 ret i8 %1
693}
694
695define i8 @atomicrmw_max_i8_seq_cst(i8 *%a, i8 %b) nounwind {
696; RV32I-LABEL: atomicrmw_max_i8_seq_cst:
697; RV32I: # %bb.0:
698; RV32I-NEXT: addi sp, sp, -32
699; RV32I-NEXT: sw ra, 28(sp)
700; RV32I-NEXT: sw s1, 24(sp)
701; RV32I-NEXT: sw s2, 20(sp)
702; RV32I-NEXT: sw s3, 16(sp)
703; RV32I-NEXT: sw s4, 12(sp)
704; RV32I-NEXT: sw s5, 8(sp)
705; RV32I-NEXT: mv s2, a1
706; RV32I-NEXT: mv s4, a0
707; RV32I-NEXT: lbu a0, 0(a0)
708; RV32I-NEXT: slli a1, a1, 24
709; RV32I-NEXT: srai s5, a1, 24
710; RV32I-NEXT: addi s3, sp, 7
711; RV32I-NEXT: addi s1, zero, 5
712; RV32I-NEXT: .LBB39_1: # %atomicrmw.start
713; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
714; RV32I-NEXT: slli a1, a0, 24
715; RV32I-NEXT: srai a1, a1, 24
716; RV32I-NEXT: mv a2, a0
717; RV32I-NEXT: blt s5, a1, .LBB39_3
718; RV32I-NEXT: # %bb.2: # %atomicrmw.start
719; RV32I-NEXT: # in Loop: Header=BB39_1 Depth=1
720; RV32I-NEXT: mv a2, s2
721; RV32I-NEXT: .LBB39_3: # %atomicrmw.start
722; RV32I-NEXT: # in Loop: Header=BB39_1 Depth=1
723; RV32I-NEXT: sb a0, 7(sp)
724; RV32I-NEXT: mv a0, s4
725; RV32I-NEXT: mv a1, s3
726; RV32I-NEXT: mv a3, s1
727; RV32I-NEXT: mv a4, s1
728; RV32I-NEXT: call __atomic_compare_exchange_1
729; RV32I-NEXT: mv a1, a0
730; RV32I-NEXT: lb a0, 7(sp)
731; RV32I-NEXT: beqz a1, .LBB39_1
732; RV32I-NEXT: # %bb.4: # %atomicrmw.end
733; RV32I-NEXT: lw s5, 8(sp)
734; RV32I-NEXT: lw s4, 12(sp)
735; RV32I-NEXT: lw s3, 16(sp)
736; RV32I-NEXT: lw s2, 20(sp)
737; RV32I-NEXT: lw s1, 24(sp)
738; RV32I-NEXT: lw ra, 28(sp)
739; RV32I-NEXT: addi sp, sp, 32
740; RV32I-NEXT: ret
741 %1 = atomicrmw max i8* %a, i8 %b seq_cst
742 ret i8 %1
743}
744
745define i8 @atomicrmw_min_i8_monotonic(i8 *%a, i8 %b) nounwind {
746; RV32I-LABEL: atomicrmw_min_i8_monotonic:
747; RV32I: # %bb.0:
748; RV32I-NEXT: addi sp, sp, -32
749; RV32I-NEXT: sw ra, 28(sp)
750; RV32I-NEXT: sw s1, 24(sp)
751; RV32I-NEXT: sw s2, 20(sp)
752; RV32I-NEXT: sw s3, 16(sp)
753; RV32I-NEXT: sw s4, 12(sp)
754; RV32I-NEXT: mv s2, a1
755; RV32I-NEXT: mv s4, a0
756; RV32I-NEXT: lbu a0, 0(a0)
757; RV32I-NEXT: slli a1, a1, 24
758; RV32I-NEXT: srai s1, a1, 24
759; RV32I-NEXT: addi s3, sp, 11
760; RV32I-NEXT: .LBB40_1: # %atomicrmw.start
761; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
762; RV32I-NEXT: slli a1, a0, 24
763; RV32I-NEXT: srai a1, a1, 24
764; RV32I-NEXT: mv a2, a0
765; RV32I-NEXT: bge s1, a1, .LBB40_3
766; RV32I-NEXT: # %bb.2: # %atomicrmw.start
767; RV32I-NEXT: # in Loop: Header=BB40_1 Depth=1
768; RV32I-NEXT: mv a2, s2
769; RV32I-NEXT: .LBB40_3: # %atomicrmw.start
770; RV32I-NEXT: # in Loop: Header=BB40_1 Depth=1
771; RV32I-NEXT: sb a0, 11(sp)
772; RV32I-NEXT: mv a0, s4
773; RV32I-NEXT: mv a1, s3
774; RV32I-NEXT: mv a3, zero
775; RV32I-NEXT: mv a4, zero
776; RV32I-NEXT: call __atomic_compare_exchange_1
777; RV32I-NEXT: mv a1, a0
778; RV32I-NEXT: lb a0, 11(sp)
779; RV32I-NEXT: beqz a1, .LBB40_1
780; RV32I-NEXT: # %bb.4: # %atomicrmw.end
781; RV32I-NEXT: lw s4, 12(sp)
782; RV32I-NEXT: lw s3, 16(sp)
783; RV32I-NEXT: lw s2, 20(sp)
784; RV32I-NEXT: lw s1, 24(sp)
785; RV32I-NEXT: lw ra, 28(sp)
786; RV32I-NEXT: addi sp, sp, 32
787; RV32I-NEXT: ret
788 %1 = atomicrmw min i8* %a, i8 %b monotonic
789 ret i8 %1
790}
791
792define i8 @atomicrmw_min_i8_acquire(i8 *%a, i8 %b) nounwind {
793; RV32I-LABEL: atomicrmw_min_i8_acquire:
794; RV32I: # %bb.0:
795; RV32I-NEXT: addi sp, sp, -32
796; RV32I-NEXT: sw ra, 28(sp)
797; RV32I-NEXT: sw s1, 24(sp)
798; RV32I-NEXT: sw s2, 20(sp)
799; RV32I-NEXT: sw s3, 16(sp)
800; RV32I-NEXT: sw s4, 12(sp)
801; RV32I-NEXT: sw s5, 8(sp)
802; RV32I-NEXT: mv s2, a1
803; RV32I-NEXT: mv s4, a0
804; RV32I-NEXT: lbu a0, 0(a0)
805; RV32I-NEXT: slli a1, a1, 24
806; RV32I-NEXT: srai s5, a1, 24
807; RV32I-NEXT: addi s3, sp, 7
808; RV32I-NEXT: addi s1, zero, 2
809; RV32I-NEXT: .LBB41_1: # %atomicrmw.start
810; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
811; RV32I-NEXT: slli a1, a0, 24
812; RV32I-NEXT: srai a1, a1, 24
813; RV32I-NEXT: mv a2, a0
814; RV32I-NEXT: bge s5, a1, .LBB41_3
815; RV32I-NEXT: # %bb.2: # %atomicrmw.start
816; RV32I-NEXT: # in Loop: Header=BB41_1 Depth=1
817; RV32I-NEXT: mv a2, s2
818; RV32I-NEXT: .LBB41_3: # %atomicrmw.start
819; RV32I-NEXT: # in Loop: Header=BB41_1 Depth=1
820; RV32I-NEXT: sb a0, 7(sp)
821; RV32I-NEXT: mv a0, s4
822; RV32I-NEXT: mv a1, s3
823; RV32I-NEXT: mv a3, s1
824; RV32I-NEXT: mv a4, s1
825; RV32I-NEXT: call __atomic_compare_exchange_1
826; RV32I-NEXT: mv a1, a0
827; RV32I-NEXT: lb a0, 7(sp)
828; RV32I-NEXT: beqz a1, .LBB41_1
829; RV32I-NEXT: # %bb.4: # %atomicrmw.end
830; RV32I-NEXT: lw s5, 8(sp)
831; RV32I-NEXT: lw s4, 12(sp)
832; RV32I-NEXT: lw s3, 16(sp)
833; RV32I-NEXT: lw s2, 20(sp)
834; RV32I-NEXT: lw s1, 24(sp)
835; RV32I-NEXT: lw ra, 28(sp)
836; RV32I-NEXT: addi sp, sp, 32
837; RV32I-NEXT: ret
838 %1 = atomicrmw min i8* %a, i8 %b acquire
839 ret i8 %1
840}
841
842define i8 @atomicrmw_min_i8_release(i8 *%a, i8 %b) nounwind {
843; RV32I-LABEL: atomicrmw_min_i8_release:
844; RV32I: # %bb.0:
845; RV32I-NEXT: addi sp, sp, -32
846; RV32I-NEXT: sw ra, 28(sp)
847; RV32I-NEXT: sw s1, 24(sp)
848; RV32I-NEXT: sw s2, 20(sp)
849; RV32I-NEXT: sw s3, 16(sp)
850; RV32I-NEXT: sw s4, 12(sp)
851; RV32I-NEXT: sw s5, 8(sp)
852; RV32I-NEXT: mv s2, a1
853; RV32I-NEXT: mv s5, a0
854; RV32I-NEXT: lbu a0, 0(a0)
855; RV32I-NEXT: slli a1, a1, 24
856; RV32I-NEXT: srai s1, a1, 24
857; RV32I-NEXT: addi s3, sp, 7
858; RV32I-NEXT: addi s4, zero, 3
859; RV32I-NEXT: .LBB42_1: # %atomicrmw.start
860; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
861; RV32I-NEXT: slli a1, a0, 24
862; RV32I-NEXT: srai a1, a1, 24
863; RV32I-NEXT: mv a2, a0
864; RV32I-NEXT: bge s1, a1, .LBB42_3
865; RV32I-NEXT: # %bb.2: # %atomicrmw.start
866; RV32I-NEXT: # in Loop: Header=BB42_1 Depth=1
867; RV32I-NEXT: mv a2, s2
868; RV32I-NEXT: .LBB42_3: # %atomicrmw.start
869; RV32I-NEXT: # in Loop: Header=BB42_1 Depth=1
870; RV32I-NEXT: sb a0, 7(sp)
871; RV32I-NEXT: mv a0, s5
872; RV32I-NEXT: mv a1, s3
873; RV32I-NEXT: mv a3, s4
874; RV32I-NEXT: mv a4, zero
875; RV32I-NEXT: call __atomic_compare_exchange_1
876; RV32I-NEXT: mv a1, a0
877; RV32I-NEXT: lb a0, 7(sp)
878; RV32I-NEXT: beqz a1, .LBB42_1
879; RV32I-NEXT: # %bb.4: # %atomicrmw.end
880; RV32I-NEXT: lw s5, 8(sp)
881; RV32I-NEXT: lw s4, 12(sp)
882; RV32I-NEXT: lw s3, 16(sp)
883; RV32I-NEXT: lw s2, 20(sp)
884; RV32I-NEXT: lw s1, 24(sp)
885; RV32I-NEXT: lw ra, 28(sp)
886; RV32I-NEXT: addi sp, sp, 32
887; RV32I-NEXT: ret
888 %1 = atomicrmw min i8* %a, i8 %b release
889 ret i8 %1
890}
891
892define i8 @atomicrmw_min_i8_acq_rel(i8 *%a, i8 %b) nounwind {
893; RV32I-LABEL: atomicrmw_min_i8_acq_rel:
894; RV32I: # %bb.0:
895; RV32I-NEXT: addi sp, sp, -32
896; RV32I-NEXT: sw ra, 28(sp)
897; RV32I-NEXT: sw s1, 24(sp)
898; RV32I-NEXT: sw s2, 20(sp)
899; RV32I-NEXT: sw s3, 16(sp)
900; RV32I-NEXT: sw s4, 12(sp)
901; RV32I-NEXT: sw s5, 8(sp)
902; RV32I-NEXT: sw s6, 4(sp)
903; RV32I-NEXT: mv s2, a1
904; RV32I-NEXT: mv s6, a0
905; RV32I-NEXT: lbu a0, 0(a0)
906; RV32I-NEXT: slli a1, a1, 24
907; RV32I-NEXT: srai s1, a1, 24
908; RV32I-NEXT: addi s3, sp, 3
909; RV32I-NEXT: addi s4, zero, 4
910; RV32I-NEXT: addi s5, zero, 2
911; RV32I-NEXT: .LBB43_1: # %atomicrmw.start
912; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
913; RV32I-NEXT: slli a1, a0, 24
914; RV32I-NEXT: srai a1, a1, 24
915; RV32I-NEXT: mv a2, a0
916; RV32I-NEXT: bge s1, a1, .LBB43_3
917; RV32I-NEXT: # %bb.2: # %atomicrmw.start
918; RV32I-NEXT: # in Loop: Header=BB43_1 Depth=1
919; RV32I-NEXT: mv a2, s2
920; RV32I-NEXT: .LBB43_3: # %atomicrmw.start
921; RV32I-NEXT: # in Loop: Header=BB43_1 Depth=1
922; RV32I-NEXT: sb a0, 3(sp)
923; RV32I-NEXT: mv a0, s6
924; RV32I-NEXT: mv a1, s3
925; RV32I-NEXT: mv a3, s4
926; RV32I-NEXT: mv a4, s5
927; RV32I-NEXT: call __atomic_compare_exchange_1
928; RV32I-NEXT: mv a1, a0
929; RV32I-NEXT: lb a0, 3(sp)
930; RV32I-NEXT: beqz a1, .LBB43_1
931; RV32I-NEXT: # %bb.4: # %atomicrmw.end
932; RV32I-NEXT: lw s6, 4(sp)
933; RV32I-NEXT: lw s5, 8(sp)
934; RV32I-NEXT: lw s4, 12(sp)
935; RV32I-NEXT: lw s3, 16(sp)
936; RV32I-NEXT: lw s2, 20(sp)
937; RV32I-NEXT: lw s1, 24(sp)
938; RV32I-NEXT: lw ra, 28(sp)
939; RV32I-NEXT: addi sp, sp, 32
940; RV32I-NEXT: ret
941 %1 = atomicrmw min i8* %a, i8 %b acq_rel
942 ret i8 %1
943}
944
945define i8 @atomicrmw_min_i8_seq_cst(i8 *%a, i8 %b) nounwind {
946; RV32I-LABEL: atomicrmw_min_i8_seq_cst:
947; RV32I: # %bb.0:
948; RV32I-NEXT: addi sp, sp, -32
949; RV32I-NEXT: sw ra, 28(sp)
950; RV32I-NEXT: sw s1, 24(sp)
951; RV32I-NEXT: sw s2, 20(sp)
952; RV32I-NEXT: sw s3, 16(sp)
953; RV32I-NEXT: sw s4, 12(sp)
954; RV32I-NEXT: sw s5, 8(sp)
955; RV32I-NEXT: mv s2, a1
956; RV32I-NEXT: mv s4, a0
957; RV32I-NEXT: lbu a0, 0(a0)
958; RV32I-NEXT: slli a1, a1, 24
959; RV32I-NEXT: srai s5, a1, 24
960; RV32I-NEXT: addi s3, sp, 7
961; RV32I-NEXT: addi s1, zero, 5
962; RV32I-NEXT: .LBB44_1: # %atomicrmw.start
963; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
964; RV32I-NEXT: slli a1, a0, 24
965; RV32I-NEXT: srai a1, a1, 24
966; RV32I-NEXT: mv a2, a0
967; RV32I-NEXT: bge s5, a1, .LBB44_3
968; RV32I-NEXT: # %bb.2: # %atomicrmw.start
969; RV32I-NEXT: # in Loop: Header=BB44_1 Depth=1
970; RV32I-NEXT: mv a2, s2
971; RV32I-NEXT: .LBB44_3: # %atomicrmw.start
972; RV32I-NEXT: # in Loop: Header=BB44_1 Depth=1
973; RV32I-NEXT: sb a0, 7(sp)
974; RV32I-NEXT: mv a0, s4
975; RV32I-NEXT: mv a1, s3
976; RV32I-NEXT: mv a3, s1
977; RV32I-NEXT: mv a4, s1
978; RV32I-NEXT: call __atomic_compare_exchange_1
979; RV32I-NEXT: mv a1, a0
980; RV32I-NEXT: lb a0, 7(sp)
981; RV32I-NEXT: beqz a1, .LBB44_1
982; RV32I-NEXT: # %bb.4: # %atomicrmw.end
983; RV32I-NEXT: lw s5, 8(sp)
984; RV32I-NEXT: lw s4, 12(sp)
985; RV32I-NEXT: lw s3, 16(sp)
986; RV32I-NEXT: lw s2, 20(sp)
987; RV32I-NEXT: lw s1, 24(sp)
988; RV32I-NEXT: lw ra, 28(sp)
989; RV32I-NEXT: addi sp, sp, 32
990; RV32I-NEXT: ret
991 %1 = atomicrmw min i8* %a, i8 %b seq_cst
992 ret i8 %1
993}
994
995define i8 @atomicrmw_umax_i8_monotonic(i8 *%a, i8 %b) nounwind {
996; RV32I-LABEL: atomicrmw_umax_i8_monotonic:
997; RV32I: # %bb.0:
998; RV32I-NEXT: addi sp, sp, -32
999; RV32I-NEXT: sw ra, 28(sp)
1000; RV32I-NEXT: sw s1, 24(sp)
1001; RV32I-NEXT: sw s2, 20(sp)
1002; RV32I-NEXT: sw s3, 16(sp)
1003; RV32I-NEXT: sw s4, 12(sp)
1004; RV32I-NEXT: mv s2, a1
1005; RV32I-NEXT: mv s4, a0
1006; RV32I-NEXT: lbu a0, 0(a0)
1007; RV32I-NEXT: andi s1, a1, 255
1008; RV32I-NEXT: addi s3, sp, 11
1009; RV32I-NEXT: .LBB45_1: # %atomicrmw.start
1010; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1011; RV32I-NEXT: andi a1, a0, 255
1012; RV32I-NEXT: mv a2, a0
1013; RV32I-NEXT: bltu s1, a1, .LBB45_3
1014; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1015; RV32I-NEXT: # in Loop: Header=BB45_1 Depth=1
1016; RV32I-NEXT: mv a2, s2
1017; RV32I-NEXT: .LBB45_3: # %atomicrmw.start
1018; RV32I-NEXT: # in Loop: Header=BB45_1 Depth=1
1019; RV32I-NEXT: sb a0, 11(sp)
1020; RV32I-NEXT: mv a0, s4
1021; RV32I-NEXT: mv a1, s3
1022; RV32I-NEXT: mv a3, zero
1023; RV32I-NEXT: mv a4, zero
1024; RV32I-NEXT: call __atomic_compare_exchange_1
1025; RV32I-NEXT: mv a1, a0
1026; RV32I-NEXT: lb a0, 11(sp)
1027; RV32I-NEXT: beqz a1, .LBB45_1
1028; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1029; RV32I-NEXT: lw s4, 12(sp)
1030; RV32I-NEXT: lw s3, 16(sp)
1031; RV32I-NEXT: lw s2, 20(sp)
1032; RV32I-NEXT: lw s1, 24(sp)
1033; RV32I-NEXT: lw ra, 28(sp)
1034; RV32I-NEXT: addi sp, sp, 32
1035; RV32I-NEXT: ret
1036 %1 = atomicrmw umax i8* %a, i8 %b monotonic
1037 ret i8 %1
1038}
1039
1040define i8 @atomicrmw_umax_i8_acquire(i8 *%a, i8 %b) nounwind {
1041; RV32I-LABEL: atomicrmw_umax_i8_acquire:
1042; RV32I: # %bb.0:
1043; RV32I-NEXT: addi sp, sp, -32
1044; RV32I-NEXT: sw ra, 28(sp)
1045; RV32I-NEXT: sw s1, 24(sp)
1046; RV32I-NEXT: sw s2, 20(sp)
1047; RV32I-NEXT: sw s3, 16(sp)
1048; RV32I-NEXT: sw s4, 12(sp)
1049; RV32I-NEXT: sw s5, 8(sp)
1050; RV32I-NEXT: mv s2, a1
1051; RV32I-NEXT: mv s4, a0
1052; RV32I-NEXT: lbu a0, 0(a0)
1053; RV32I-NEXT: andi s5, a1, 255
1054; RV32I-NEXT: addi s3, sp, 7
1055; RV32I-NEXT: addi s1, zero, 2
1056; RV32I-NEXT: .LBB46_1: # %atomicrmw.start
1057; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1058; RV32I-NEXT: andi a1, a0, 255
1059; RV32I-NEXT: mv a2, a0
1060; RV32I-NEXT: bltu s5, a1, .LBB46_3
1061; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1062; RV32I-NEXT: # in Loop: Header=BB46_1 Depth=1
1063; RV32I-NEXT: mv a2, s2
1064; RV32I-NEXT: .LBB46_3: # %atomicrmw.start
1065; RV32I-NEXT: # in Loop: Header=BB46_1 Depth=1
1066; RV32I-NEXT: sb a0, 7(sp)
1067; RV32I-NEXT: mv a0, s4
1068; RV32I-NEXT: mv a1, s3
1069; RV32I-NEXT: mv a3, s1
1070; RV32I-NEXT: mv a4, s1
1071; RV32I-NEXT: call __atomic_compare_exchange_1
1072; RV32I-NEXT: mv a1, a0
1073; RV32I-NEXT: lb a0, 7(sp)
1074; RV32I-NEXT: beqz a1, .LBB46_1
1075; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1076; RV32I-NEXT: lw s5, 8(sp)
1077; RV32I-NEXT: lw s4, 12(sp)
1078; RV32I-NEXT: lw s3, 16(sp)
1079; RV32I-NEXT: lw s2, 20(sp)
1080; RV32I-NEXT: lw s1, 24(sp)
1081; RV32I-NEXT: lw ra, 28(sp)
1082; RV32I-NEXT: addi sp, sp, 32
1083; RV32I-NEXT: ret
1084 %1 = atomicrmw umax i8* %a, i8 %b acquire
1085 ret i8 %1
1086}
1087
1088define i8 @atomicrmw_umax_i8_release(i8 *%a, i8 %b) nounwind {
1089; RV32I-LABEL: atomicrmw_umax_i8_release:
1090; RV32I: # %bb.0:
1091; RV32I-NEXT: addi sp, sp, -32
1092; RV32I-NEXT: sw ra, 28(sp)
1093; RV32I-NEXT: sw s1, 24(sp)
1094; RV32I-NEXT: sw s2, 20(sp)
1095; RV32I-NEXT: sw s3, 16(sp)
1096; RV32I-NEXT: sw s4, 12(sp)
1097; RV32I-NEXT: sw s5, 8(sp)
1098; RV32I-NEXT: mv s2, a1
1099; RV32I-NEXT: mv s5, a0
1100; RV32I-NEXT: lbu a0, 0(a0)
1101; RV32I-NEXT: andi s1, a1, 255
1102; RV32I-NEXT: addi s3, sp, 7
1103; RV32I-NEXT: addi s4, zero, 3
1104; RV32I-NEXT: .LBB47_1: # %atomicrmw.start
1105; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1106; RV32I-NEXT: andi a1, a0, 255
1107; RV32I-NEXT: mv a2, a0
1108; RV32I-NEXT: bltu s1, a1, .LBB47_3
1109; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1110; RV32I-NEXT: # in Loop: Header=BB47_1 Depth=1
1111; RV32I-NEXT: mv a2, s2
1112; RV32I-NEXT: .LBB47_3: # %atomicrmw.start
1113; RV32I-NEXT: # in Loop: Header=BB47_1 Depth=1
1114; RV32I-NEXT: sb a0, 7(sp)
1115; RV32I-NEXT: mv a0, s5
1116; RV32I-NEXT: mv a1, s3
1117; RV32I-NEXT: mv a3, s4
1118; RV32I-NEXT: mv a4, zero
1119; RV32I-NEXT: call __atomic_compare_exchange_1
1120; RV32I-NEXT: mv a1, a0
1121; RV32I-NEXT: lb a0, 7(sp)
1122; RV32I-NEXT: beqz a1, .LBB47_1
1123; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1124; RV32I-NEXT: lw s5, 8(sp)
1125; RV32I-NEXT: lw s4, 12(sp)
1126; RV32I-NEXT: lw s3, 16(sp)
1127; RV32I-NEXT: lw s2, 20(sp)
1128; RV32I-NEXT: lw s1, 24(sp)
1129; RV32I-NEXT: lw ra, 28(sp)
1130; RV32I-NEXT: addi sp, sp, 32
1131; RV32I-NEXT: ret
1132 %1 = atomicrmw umax i8* %a, i8 %b release
1133 ret i8 %1
1134}
1135
1136define i8 @atomicrmw_umax_i8_acq_rel(i8 *%a, i8 %b) nounwind {
1137; RV32I-LABEL: atomicrmw_umax_i8_acq_rel:
1138; RV32I: # %bb.0:
1139; RV32I-NEXT: addi sp, sp, -32
1140; RV32I-NEXT: sw ra, 28(sp)
1141; RV32I-NEXT: sw s1, 24(sp)
1142; RV32I-NEXT: sw s2, 20(sp)
1143; RV32I-NEXT: sw s3, 16(sp)
1144; RV32I-NEXT: sw s4, 12(sp)
1145; RV32I-NEXT: sw s5, 8(sp)
1146; RV32I-NEXT: sw s6, 4(sp)
1147; RV32I-NEXT: mv s2, a1
1148; RV32I-NEXT: mv s6, a0
1149; RV32I-NEXT: lbu a0, 0(a0)
1150; RV32I-NEXT: andi s1, a1, 255
1151; RV32I-NEXT: addi s3, sp, 3
1152; RV32I-NEXT: addi s4, zero, 4
1153; RV32I-NEXT: addi s5, zero, 2
1154; RV32I-NEXT: .LBB48_1: # %atomicrmw.start
1155; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1156; RV32I-NEXT: andi a1, a0, 255
1157; RV32I-NEXT: mv a2, a0
1158; RV32I-NEXT: bltu s1, a1, .LBB48_3
1159; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1160; RV32I-NEXT: # in Loop: Header=BB48_1 Depth=1
1161; RV32I-NEXT: mv a2, s2
1162; RV32I-NEXT: .LBB48_3: # %atomicrmw.start
1163; RV32I-NEXT: # in Loop: Header=BB48_1 Depth=1
1164; RV32I-NEXT: sb a0, 3(sp)
1165; RV32I-NEXT: mv a0, s6
1166; RV32I-NEXT: mv a1, s3
1167; RV32I-NEXT: mv a3, s4
1168; RV32I-NEXT: mv a4, s5
1169; RV32I-NEXT: call __atomic_compare_exchange_1
1170; RV32I-NEXT: mv a1, a0
1171; RV32I-NEXT: lb a0, 3(sp)
1172; RV32I-NEXT: beqz a1, .LBB48_1
1173; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1174; RV32I-NEXT: lw s6, 4(sp)
1175; RV32I-NEXT: lw s5, 8(sp)
1176; RV32I-NEXT: lw s4, 12(sp)
1177; RV32I-NEXT: lw s3, 16(sp)
1178; RV32I-NEXT: lw s2, 20(sp)
1179; RV32I-NEXT: lw s1, 24(sp)
1180; RV32I-NEXT: lw ra, 28(sp)
1181; RV32I-NEXT: addi sp, sp, 32
1182; RV32I-NEXT: ret
1183 %1 = atomicrmw umax i8* %a, i8 %b acq_rel
1184 ret i8 %1
1185}
1186
1187define i8 @atomicrmw_umax_i8_seq_cst(i8 *%a, i8 %b) nounwind {
1188; RV32I-LABEL: atomicrmw_umax_i8_seq_cst:
1189; RV32I: # %bb.0:
1190; RV32I-NEXT: addi sp, sp, -32
1191; RV32I-NEXT: sw ra, 28(sp)
1192; RV32I-NEXT: sw s1, 24(sp)
1193; RV32I-NEXT: sw s2, 20(sp)
1194; RV32I-NEXT: sw s3, 16(sp)
1195; RV32I-NEXT: sw s4, 12(sp)
1196; RV32I-NEXT: sw s5, 8(sp)
1197; RV32I-NEXT: mv s2, a1
1198; RV32I-NEXT: mv s4, a0
1199; RV32I-NEXT: lbu a0, 0(a0)
1200; RV32I-NEXT: andi s5, a1, 255
1201; RV32I-NEXT: addi s3, sp, 7
1202; RV32I-NEXT: addi s1, zero, 5
1203; RV32I-NEXT: .LBB49_1: # %atomicrmw.start
1204; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1205; RV32I-NEXT: andi a1, a0, 255
1206; RV32I-NEXT: mv a2, a0
1207; RV32I-NEXT: bltu s5, a1, .LBB49_3
1208; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1209; RV32I-NEXT: # in Loop: Header=BB49_1 Depth=1
1210; RV32I-NEXT: mv a2, s2
1211; RV32I-NEXT: .LBB49_3: # %atomicrmw.start
1212; RV32I-NEXT: # in Loop: Header=BB49_1 Depth=1
1213; RV32I-NEXT: sb a0, 7(sp)
1214; RV32I-NEXT: mv a0, s4
1215; RV32I-NEXT: mv a1, s3
1216; RV32I-NEXT: mv a3, s1
1217; RV32I-NEXT: mv a4, s1
1218; RV32I-NEXT: call __atomic_compare_exchange_1
1219; RV32I-NEXT: mv a1, a0
1220; RV32I-NEXT: lb a0, 7(sp)
1221; RV32I-NEXT: beqz a1, .LBB49_1
1222; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1223; RV32I-NEXT: lw s5, 8(sp)
1224; RV32I-NEXT: lw s4, 12(sp)
1225; RV32I-NEXT: lw s3, 16(sp)
1226; RV32I-NEXT: lw s2, 20(sp)
1227; RV32I-NEXT: lw s1, 24(sp)
1228; RV32I-NEXT: lw ra, 28(sp)
1229; RV32I-NEXT: addi sp, sp, 32
1230; RV32I-NEXT: ret
1231 %1 = atomicrmw umax i8* %a, i8 %b seq_cst
1232 ret i8 %1
1233}
1234
1235define i8 @atomicrmw_umin_i8_monotonic(i8 *%a, i8 %b) nounwind {
1236; RV32I-LABEL: atomicrmw_umin_i8_monotonic:
1237; RV32I: # %bb.0:
1238; RV32I-NEXT: addi sp, sp, -32
1239; RV32I-NEXT: sw ra, 28(sp)
1240; RV32I-NEXT: sw s1, 24(sp)
1241; RV32I-NEXT: sw s2, 20(sp)
1242; RV32I-NEXT: sw s3, 16(sp)
1243; RV32I-NEXT: sw s4, 12(sp)
1244; RV32I-NEXT: mv s2, a1
1245; RV32I-NEXT: mv s4, a0
1246; RV32I-NEXT: lbu a0, 0(a0)
1247; RV32I-NEXT: andi s1, a1, 255
1248; RV32I-NEXT: addi s3, sp, 11
1249; RV32I-NEXT: .LBB50_1: # %atomicrmw.start
1250; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1251; RV32I-NEXT: andi a1, a0, 255
1252; RV32I-NEXT: mv a2, a0
1253; RV32I-NEXT: bgeu s1, a1, .LBB50_3
1254; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1255; RV32I-NEXT: # in Loop: Header=BB50_1 Depth=1
1256; RV32I-NEXT: mv a2, s2
1257; RV32I-NEXT: .LBB50_3: # %atomicrmw.start
1258; RV32I-NEXT: # in Loop: Header=BB50_1 Depth=1
1259; RV32I-NEXT: sb a0, 11(sp)
1260; RV32I-NEXT: mv a0, s4
1261; RV32I-NEXT: mv a1, s3
1262; RV32I-NEXT: mv a3, zero
1263; RV32I-NEXT: mv a4, zero
1264; RV32I-NEXT: call __atomic_compare_exchange_1
1265; RV32I-NEXT: mv a1, a0
1266; RV32I-NEXT: lb a0, 11(sp)
1267; RV32I-NEXT: beqz a1, .LBB50_1
1268; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1269; RV32I-NEXT: lw s4, 12(sp)
1270; RV32I-NEXT: lw s3, 16(sp)
1271; RV32I-NEXT: lw s2, 20(sp)
1272; RV32I-NEXT: lw s1, 24(sp)
1273; RV32I-NEXT: lw ra, 28(sp)
1274; RV32I-NEXT: addi sp, sp, 32
1275; RV32I-NEXT: ret
1276 %1 = atomicrmw umin i8* %a, i8 %b monotonic
1277 ret i8 %1
1278}
1279
1280define i8 @atomicrmw_umin_i8_acquire(i8 *%a, i8 %b) nounwind {
1281; RV32I-LABEL: atomicrmw_umin_i8_acquire:
1282; RV32I: # %bb.0:
1283; RV32I-NEXT: addi sp, sp, -32
1284; RV32I-NEXT: sw ra, 28(sp)
1285; RV32I-NEXT: sw s1, 24(sp)
1286; RV32I-NEXT: sw s2, 20(sp)
1287; RV32I-NEXT: sw s3, 16(sp)
1288; RV32I-NEXT: sw s4, 12(sp)
1289; RV32I-NEXT: sw s5, 8(sp)
1290; RV32I-NEXT: mv s2, a1
1291; RV32I-NEXT: mv s4, a0
1292; RV32I-NEXT: lbu a0, 0(a0)
1293; RV32I-NEXT: andi s5, a1, 255
1294; RV32I-NEXT: addi s3, sp, 7
1295; RV32I-NEXT: addi s1, zero, 2
1296; RV32I-NEXT: .LBB51_1: # %atomicrmw.start
1297; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1298; RV32I-NEXT: andi a1, a0, 255
1299; RV32I-NEXT: mv a2, a0
1300; RV32I-NEXT: bgeu s5, a1, .LBB51_3
1301; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1302; RV32I-NEXT: # in Loop: Header=BB51_1 Depth=1
1303; RV32I-NEXT: mv a2, s2
1304; RV32I-NEXT: .LBB51_3: # %atomicrmw.start
1305; RV32I-NEXT: # in Loop: Header=BB51_1 Depth=1
1306; RV32I-NEXT: sb a0, 7(sp)
1307; RV32I-NEXT: mv a0, s4
1308; RV32I-NEXT: mv a1, s3
1309; RV32I-NEXT: mv a3, s1
1310; RV32I-NEXT: mv a4, s1
1311; RV32I-NEXT: call __atomic_compare_exchange_1
1312; RV32I-NEXT: mv a1, a0
1313; RV32I-NEXT: lb a0, 7(sp)
1314; RV32I-NEXT: beqz a1, .LBB51_1
1315; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1316; RV32I-NEXT: lw s5, 8(sp)
1317; RV32I-NEXT: lw s4, 12(sp)
1318; RV32I-NEXT: lw s3, 16(sp)
1319; RV32I-NEXT: lw s2, 20(sp)
1320; RV32I-NEXT: lw s1, 24(sp)
1321; RV32I-NEXT: lw ra, 28(sp)
1322; RV32I-NEXT: addi sp, sp, 32
1323; RV32I-NEXT: ret
1324 %1 = atomicrmw umin i8* %a, i8 %b acquire
1325 ret i8 %1
1326}
1327
1328define i8 @atomicrmw_umin_i8_release(i8 *%a, i8 %b) nounwind {
1329; RV32I-LABEL: atomicrmw_umin_i8_release:
1330; RV32I: # %bb.0:
1331; RV32I-NEXT: addi sp, sp, -32
1332; RV32I-NEXT: sw ra, 28(sp)
1333; RV32I-NEXT: sw s1, 24(sp)
1334; RV32I-NEXT: sw s2, 20(sp)
1335; RV32I-NEXT: sw s3, 16(sp)
1336; RV32I-NEXT: sw s4, 12(sp)
1337; RV32I-NEXT: sw s5, 8(sp)
1338; RV32I-NEXT: mv s2, a1
1339; RV32I-NEXT: mv s5, a0
1340; RV32I-NEXT: lbu a0, 0(a0)
1341; RV32I-NEXT: andi s1, a1, 255
1342; RV32I-NEXT: addi s3, sp, 7
1343; RV32I-NEXT: addi s4, zero, 3
1344; RV32I-NEXT: .LBB52_1: # %atomicrmw.start
1345; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1346; RV32I-NEXT: andi a1, a0, 255
1347; RV32I-NEXT: mv a2, a0
1348; RV32I-NEXT: bgeu s1, a1, .LBB52_3
1349; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1350; RV32I-NEXT: # in Loop: Header=BB52_1 Depth=1
1351; RV32I-NEXT: mv a2, s2
1352; RV32I-NEXT: .LBB52_3: # %atomicrmw.start
1353; RV32I-NEXT: # in Loop: Header=BB52_1 Depth=1
1354; RV32I-NEXT: sb a0, 7(sp)
1355; RV32I-NEXT: mv a0, s5
1356; RV32I-NEXT: mv a1, s3
1357; RV32I-NEXT: mv a3, s4
1358; RV32I-NEXT: mv a4, zero
1359; RV32I-NEXT: call __atomic_compare_exchange_1
1360; RV32I-NEXT: mv a1, a0
1361; RV32I-NEXT: lb a0, 7(sp)
1362; RV32I-NEXT: beqz a1, .LBB52_1
1363; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1364; RV32I-NEXT: lw s5, 8(sp)
1365; RV32I-NEXT: lw s4, 12(sp)
1366; RV32I-NEXT: lw s3, 16(sp)
1367; RV32I-NEXT: lw s2, 20(sp)
1368; RV32I-NEXT: lw s1, 24(sp)
1369; RV32I-NEXT: lw ra, 28(sp)
1370; RV32I-NEXT: addi sp, sp, 32
1371; RV32I-NEXT: ret
1372 %1 = atomicrmw umin i8* %a, i8 %b release
1373 ret i8 %1
1374}
1375
1376define i8 @atomicrmw_umin_i8_acq_rel(i8 *%a, i8 %b) nounwind {
1377; RV32I-LABEL: atomicrmw_umin_i8_acq_rel:
1378; RV32I: # %bb.0:
1379; RV32I-NEXT: addi sp, sp, -32
1380; RV32I-NEXT: sw ra, 28(sp)
1381; RV32I-NEXT: sw s1, 24(sp)
1382; RV32I-NEXT: sw s2, 20(sp)
1383; RV32I-NEXT: sw s3, 16(sp)
1384; RV32I-NEXT: sw s4, 12(sp)
1385; RV32I-NEXT: sw s5, 8(sp)
1386; RV32I-NEXT: sw s6, 4(sp)
1387; RV32I-NEXT: mv s2, a1
1388; RV32I-NEXT: mv s6, a0
1389; RV32I-NEXT: lbu a0, 0(a0)
1390; RV32I-NEXT: andi s1, a1, 255
1391; RV32I-NEXT: addi s3, sp, 3
1392; RV32I-NEXT: addi s4, zero, 4
1393; RV32I-NEXT: addi s5, zero, 2
1394; RV32I-NEXT: .LBB53_1: # %atomicrmw.start
1395; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1396; RV32I-NEXT: andi a1, a0, 255
1397; RV32I-NEXT: mv a2, a0
1398; RV32I-NEXT: bgeu s1, a1, .LBB53_3
1399; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1400; RV32I-NEXT: # in Loop: Header=BB53_1 Depth=1
1401; RV32I-NEXT: mv a2, s2
1402; RV32I-NEXT: .LBB53_3: # %atomicrmw.start
1403; RV32I-NEXT: # in Loop: Header=BB53_1 Depth=1
1404; RV32I-NEXT: sb a0, 3(sp)
1405; RV32I-NEXT: mv a0, s6
1406; RV32I-NEXT: mv a1, s3
1407; RV32I-NEXT: mv a3, s4
1408; RV32I-NEXT: mv a4, s5
1409; RV32I-NEXT: call __atomic_compare_exchange_1
1410; RV32I-NEXT: mv a1, a0
1411; RV32I-NEXT: lb a0, 3(sp)
1412; RV32I-NEXT: beqz a1, .LBB53_1
1413; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1414; RV32I-NEXT: lw s6, 4(sp)
1415; RV32I-NEXT: lw s5, 8(sp)
1416; RV32I-NEXT: lw s4, 12(sp)
1417; RV32I-NEXT: lw s3, 16(sp)
1418; RV32I-NEXT: lw s2, 20(sp)
1419; RV32I-NEXT: lw s1, 24(sp)
1420; RV32I-NEXT: lw ra, 28(sp)
1421; RV32I-NEXT: addi sp, sp, 32
1422; RV32I-NEXT: ret
1423 %1 = atomicrmw umin i8* %a, i8 %b acq_rel
1424 ret i8 %1
1425}
1426
1427define i8 @atomicrmw_umin_i8_seq_cst(i8 *%a, i8 %b) nounwind {
1428; RV32I-LABEL: atomicrmw_umin_i8_seq_cst:
1429; RV32I: # %bb.0:
1430; RV32I-NEXT: addi sp, sp, -32
1431; RV32I-NEXT: sw ra, 28(sp)
1432; RV32I-NEXT: sw s1, 24(sp)
1433; RV32I-NEXT: sw s2, 20(sp)
1434; RV32I-NEXT: sw s3, 16(sp)
1435; RV32I-NEXT: sw s4, 12(sp)
1436; RV32I-NEXT: sw s5, 8(sp)
1437; RV32I-NEXT: mv s2, a1
1438; RV32I-NEXT: mv s4, a0
1439; RV32I-NEXT: lbu a0, 0(a0)
1440; RV32I-NEXT: andi s5, a1, 255
1441; RV32I-NEXT: addi s3, sp, 7
1442; RV32I-NEXT: addi s1, zero, 5
1443; RV32I-NEXT: .LBB54_1: # %atomicrmw.start
1444; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1445; RV32I-NEXT: andi a1, a0, 255
1446; RV32I-NEXT: mv a2, a0
1447; RV32I-NEXT: bgeu s5, a1, .LBB54_3
1448; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1449; RV32I-NEXT: # in Loop: Header=BB54_1 Depth=1
1450; RV32I-NEXT: mv a2, s2
1451; RV32I-NEXT: .LBB54_3: # %atomicrmw.start
1452; RV32I-NEXT: # in Loop: Header=BB54_1 Depth=1
1453; RV32I-NEXT: sb a0, 7(sp)
1454; RV32I-NEXT: mv a0, s4
1455; RV32I-NEXT: mv a1, s3
1456; RV32I-NEXT: mv a3, s1
1457; RV32I-NEXT: mv a4, s1
1458; RV32I-NEXT: call __atomic_compare_exchange_1
1459; RV32I-NEXT: mv a1, a0
1460; RV32I-NEXT: lb a0, 7(sp)
1461; RV32I-NEXT: beqz a1, .LBB54_1
1462; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1463; RV32I-NEXT: lw s5, 8(sp)
1464; RV32I-NEXT: lw s4, 12(sp)
1465; RV32I-NEXT: lw s3, 16(sp)
1466; RV32I-NEXT: lw s2, 20(sp)
1467; RV32I-NEXT: lw s1, 24(sp)
1468; RV32I-NEXT: lw ra, 28(sp)
1469; RV32I-NEXT: addi sp, sp, 32
1470; RV32I-NEXT: ret
1471 %1 = atomicrmw umin i8* %a, i8 %b seq_cst
1472 ret i8 %1
1473}
1474
1475define i16 @atomicrmw_xchg_i16_monotonic(i16* %a, i16 %b) {
1476; RV32I-LABEL: atomicrmw_xchg_i16_monotonic:
1477; RV32I: # %bb.0:
1478; RV32I-NEXT: addi sp, sp, -16
1479; RV32I-NEXT: sw ra, 12(sp)
1480; RV32I-NEXT: mv a2, zero
1481; RV32I-NEXT: call __atomic_exchange_2
1482; RV32I-NEXT: lw ra, 12(sp)
1483; RV32I-NEXT: addi sp, sp, 16
1484; RV32I-NEXT: ret
1485 %1 = atomicrmw xchg i16* %a, i16 %b monotonic
1486 ret i16 %1
1487}
1488
1489define i16 @atomicrmw_xchg_i16_acquire(i16* %a, i16 %b) {
1490; RV32I-LABEL: atomicrmw_xchg_i16_acquire:
1491; RV32I: # %bb.0:
1492; RV32I-NEXT: addi sp, sp, -16
1493; RV32I-NEXT: sw ra, 12(sp)
1494; RV32I-NEXT: addi a2, zero, 2
1495; RV32I-NEXT: call __atomic_exchange_2
1496; RV32I-NEXT: lw ra, 12(sp)
1497; RV32I-NEXT: addi sp, sp, 16
1498; RV32I-NEXT: ret
1499 %1 = atomicrmw xchg i16* %a, i16 %b acquire
1500 ret i16 %1
1501}
1502
1503define i16 @atomicrmw_xchg_i16_release(i16* %a, i16 %b) {
1504; RV32I-LABEL: atomicrmw_xchg_i16_release:
1505; RV32I: # %bb.0:
1506; RV32I-NEXT: addi sp, sp, -16
1507; RV32I-NEXT: sw ra, 12(sp)
1508; RV32I-NEXT: addi a2, zero, 3
1509; RV32I-NEXT: call __atomic_exchange_2
1510; RV32I-NEXT: lw ra, 12(sp)
1511; RV32I-NEXT: addi sp, sp, 16
1512; RV32I-NEXT: ret
1513 %1 = atomicrmw xchg i16* %a, i16 %b release
1514 ret i16 %1
1515}
1516
1517define i16 @atomicrmw_xchg_i16_acq_rel(i16* %a, i16 %b) {
1518; RV32I-LABEL: atomicrmw_xchg_i16_acq_rel:
1519; RV32I: # %bb.0:
1520; RV32I-NEXT: addi sp, sp, -16
1521; RV32I-NEXT: sw ra, 12(sp)
1522; RV32I-NEXT: addi a2, zero, 4
1523; RV32I-NEXT: call __atomic_exchange_2
1524; RV32I-NEXT: lw ra, 12(sp)
1525; RV32I-NEXT: addi sp, sp, 16
1526; RV32I-NEXT: ret
1527 %1 = atomicrmw xchg i16* %a, i16 %b acq_rel
1528 ret i16 %1
1529}
1530
1531define i16 @atomicrmw_xchg_i16_seq_cst(i16* %a, i16 %b) {
1532; RV32I-LABEL: atomicrmw_xchg_i16_seq_cst:
1533; RV32I: # %bb.0:
1534; RV32I-NEXT: addi sp, sp, -16
1535; RV32I-NEXT: sw ra, 12(sp)
1536; RV32I-NEXT: addi a2, zero, 5
1537; RV32I-NEXT: call __atomic_exchange_2
1538; RV32I-NEXT: lw ra, 12(sp)
1539; RV32I-NEXT: addi sp, sp, 16
1540; RV32I-NEXT: ret
1541 %1 = atomicrmw xchg i16* %a, i16 %b seq_cst
1542 ret i16 %1
1543}
1544
1545define i16 @atomicrmw_add_i16_monotonic(i16 *%a, i16 %b) nounwind {
1546; RV32I-LABEL: atomicrmw_add_i16_monotonic:
1547; RV32I: # %bb.0:
1548; RV32I-NEXT: addi sp, sp, -16
1549; RV32I-NEXT: sw ra, 12(sp)
1550; RV32I-NEXT: mv a2, zero
1551; RV32I-NEXT: call __atomic_fetch_add_2
1552; RV32I-NEXT: lw ra, 12(sp)
1553; RV32I-NEXT: addi sp, sp, 16
1554; RV32I-NEXT: ret
1555 %1 = atomicrmw add i16* %a, i16 %b monotonic
1556 ret i16 %1
1557}
1558
1559define i16 @atomicrmw_add_i16_acquire(i16 *%a, i16 %b) nounwind {
1560; RV32I-LABEL: atomicrmw_add_i16_acquire:
1561; RV32I: # %bb.0:
1562; RV32I-NEXT: addi sp, sp, -16
1563; RV32I-NEXT: sw ra, 12(sp)
1564; RV32I-NEXT: addi a2, zero, 2
1565; RV32I-NEXT: call __atomic_fetch_add_2
1566; RV32I-NEXT: lw ra, 12(sp)
1567; RV32I-NEXT: addi sp, sp, 16
1568; RV32I-NEXT: ret
1569 %1 = atomicrmw add i16* %a, i16 %b acquire
1570 ret i16 %1
1571}
1572
1573define i16 @atomicrmw_add_i16_release(i16 *%a, i16 %b) nounwind {
1574; RV32I-LABEL: atomicrmw_add_i16_release:
1575; RV32I: # %bb.0:
1576; RV32I-NEXT: addi sp, sp, -16
1577; RV32I-NEXT: sw ra, 12(sp)
1578; RV32I-NEXT: addi a2, zero, 3
1579; RV32I-NEXT: call __atomic_fetch_add_2
1580; RV32I-NEXT: lw ra, 12(sp)
1581; RV32I-NEXT: addi sp, sp, 16
1582; RV32I-NEXT: ret
1583 %1 = atomicrmw add i16* %a, i16 %b release
1584 ret i16 %1
1585}
1586
1587define i16 @atomicrmw_add_i16_acq_rel(i16 *%a, i16 %b) nounwind {
1588; RV32I-LABEL: atomicrmw_add_i16_acq_rel:
1589; RV32I: # %bb.0:
1590; RV32I-NEXT: addi sp, sp, -16
1591; RV32I-NEXT: sw ra, 12(sp)
1592; RV32I-NEXT: addi a2, zero, 4
1593; RV32I-NEXT: call __atomic_fetch_add_2
1594; RV32I-NEXT: lw ra, 12(sp)
1595; RV32I-NEXT: addi sp, sp, 16
1596; RV32I-NEXT: ret
1597 %1 = atomicrmw add i16* %a, i16 %b acq_rel
1598 ret i16 %1
1599}
1600
1601define i16 @atomicrmw_add_i16_seq_cst(i16 *%a, i16 %b) nounwind {
1602; RV32I-LABEL: atomicrmw_add_i16_seq_cst:
1603; RV32I: # %bb.0:
1604; RV32I-NEXT: addi sp, sp, -16
1605; RV32I-NEXT: sw ra, 12(sp)
1606; RV32I-NEXT: addi a2, zero, 5
1607; RV32I-NEXT: call __atomic_fetch_add_2
1608; RV32I-NEXT: lw ra, 12(sp)
1609; RV32I-NEXT: addi sp, sp, 16
1610; RV32I-NEXT: ret
1611 %1 = atomicrmw add i16* %a, i16 %b seq_cst
1612 ret i16 %1
1613}
1614
1615define i16 @atomicrmw_sub_i16_monotonic(i16* %a, i16 %b) {
1616; RV32I-LABEL: atomicrmw_sub_i16_monotonic:
1617; RV32I: # %bb.0:
1618; RV32I-NEXT: addi sp, sp, -16
1619; RV32I-NEXT: sw ra, 12(sp)
1620; RV32I-NEXT: mv a2, zero
1621; RV32I-NEXT: call __atomic_fetch_sub_2
1622; RV32I-NEXT: lw ra, 12(sp)
1623; RV32I-NEXT: addi sp, sp, 16
1624; RV32I-NEXT: ret
1625 %1 = atomicrmw sub i16* %a, i16 %b monotonic
1626 ret i16 %1
1627}
1628
1629define i16 @atomicrmw_sub_i16_acquire(i16* %a, i16 %b) {
1630; RV32I-LABEL: atomicrmw_sub_i16_acquire:
1631; RV32I: # %bb.0:
1632; RV32I-NEXT: addi sp, sp, -16
1633; RV32I-NEXT: sw ra, 12(sp)
1634; RV32I-NEXT: addi a2, zero, 2
1635; RV32I-NEXT: call __atomic_fetch_sub_2
1636; RV32I-NEXT: lw ra, 12(sp)
1637; RV32I-NEXT: addi sp, sp, 16
1638; RV32I-NEXT: ret
1639 %1 = atomicrmw sub i16* %a, i16 %b acquire
1640 ret i16 %1
1641}
1642
1643define i16 @atomicrmw_sub_i16_release(i16* %a, i16 %b) {
1644; RV32I-LABEL: atomicrmw_sub_i16_release:
1645; RV32I: # %bb.0:
1646; RV32I-NEXT: addi sp, sp, -16
1647; RV32I-NEXT: sw ra, 12(sp)
1648; RV32I-NEXT: addi a2, zero, 3
1649; RV32I-NEXT: call __atomic_fetch_sub_2
1650; RV32I-NEXT: lw ra, 12(sp)
1651; RV32I-NEXT: addi sp, sp, 16
1652; RV32I-NEXT: ret
1653 %1 = atomicrmw sub i16* %a, i16 %b release
1654 ret i16 %1
1655}
1656
1657define i16 @atomicrmw_sub_i16_acq_rel(i16* %a, i16 %b) {
1658; RV32I-LABEL: atomicrmw_sub_i16_acq_rel:
1659; RV32I: # %bb.0:
1660; RV32I-NEXT: addi sp, sp, -16
1661; RV32I-NEXT: sw ra, 12(sp)
1662; RV32I-NEXT: addi a2, zero, 4
1663; RV32I-NEXT: call __atomic_fetch_sub_2
1664; RV32I-NEXT: lw ra, 12(sp)
1665; RV32I-NEXT: addi sp, sp, 16
1666; RV32I-NEXT: ret
1667 %1 = atomicrmw sub i16* %a, i16 %b acq_rel
1668 ret i16 %1
1669}
1670
1671define i16 @atomicrmw_sub_i16_seq_cst(i16* %a, i16 %b) {
1672; RV32I-LABEL: atomicrmw_sub_i16_seq_cst:
1673; RV32I: # %bb.0:
1674; RV32I-NEXT: addi sp, sp, -16
1675; RV32I-NEXT: sw ra, 12(sp)
1676; RV32I-NEXT: addi a2, zero, 5
1677; RV32I-NEXT: call __atomic_fetch_sub_2
1678; RV32I-NEXT: lw ra, 12(sp)
1679; RV32I-NEXT: addi sp, sp, 16
1680; RV32I-NEXT: ret
1681 %1 = atomicrmw sub i16* %a, i16 %b seq_cst
1682 ret i16 %1
1683}
1684
1685define i16 @atomicrmw_and_i16_monotonic(i16 *%a, i16 %b) nounwind {
1686; RV32I-LABEL: atomicrmw_and_i16_monotonic:
1687; RV32I: # %bb.0:
1688; RV32I-NEXT: addi sp, sp, -16
1689; RV32I-NEXT: sw ra, 12(sp)
1690; RV32I-NEXT: mv a2, zero
1691; RV32I-NEXT: call __atomic_fetch_and_2
1692; RV32I-NEXT: lw ra, 12(sp)
1693; RV32I-NEXT: addi sp, sp, 16
1694; RV32I-NEXT: ret
1695 %1 = atomicrmw and i16* %a, i16 %b monotonic
1696 ret i16 %1
1697}
1698
1699define i16 @atomicrmw_and_i16_acquire(i16 *%a, i16 %b) nounwind {
1700; RV32I-LABEL: atomicrmw_and_i16_acquire:
1701; RV32I: # %bb.0:
1702; RV32I-NEXT: addi sp, sp, -16
1703; RV32I-NEXT: sw ra, 12(sp)
1704; RV32I-NEXT: addi a2, zero, 2
1705; RV32I-NEXT: call __atomic_fetch_and_2
1706; RV32I-NEXT: lw ra, 12(sp)
1707; RV32I-NEXT: addi sp, sp, 16
1708; RV32I-NEXT: ret
1709 %1 = atomicrmw and i16* %a, i16 %b acquire
1710 ret i16 %1
1711}
1712
1713define i16 @atomicrmw_and_i16_release(i16 *%a, i16 %b) nounwind {
1714; RV32I-LABEL: atomicrmw_and_i16_release:
1715; RV32I: # %bb.0:
1716; RV32I-NEXT: addi sp, sp, -16
1717; RV32I-NEXT: sw ra, 12(sp)
1718; RV32I-NEXT: addi a2, zero, 3
1719; RV32I-NEXT: call __atomic_fetch_and_2
1720; RV32I-NEXT: lw ra, 12(sp)
1721; RV32I-NEXT: addi sp, sp, 16
1722; RV32I-NEXT: ret
1723 %1 = atomicrmw and i16* %a, i16 %b release
1724 ret i16 %1
1725}
1726
1727define i16 @atomicrmw_and_i16_acq_rel(i16 *%a, i16 %b) nounwind {
1728; RV32I-LABEL: atomicrmw_and_i16_acq_rel:
1729; RV32I: # %bb.0:
1730; RV32I-NEXT: addi sp, sp, -16
1731; RV32I-NEXT: sw ra, 12(sp)
1732; RV32I-NEXT: addi a2, zero, 4
1733; RV32I-NEXT: call __atomic_fetch_and_2
1734; RV32I-NEXT: lw ra, 12(sp)
1735; RV32I-NEXT: addi sp, sp, 16
1736; RV32I-NEXT: ret
1737 %1 = atomicrmw and i16* %a, i16 %b acq_rel
1738 ret i16 %1
1739}
1740
1741define i16 @atomicrmw_and_i16_seq_cst(i16 *%a, i16 %b) nounwind {
1742; RV32I-LABEL: atomicrmw_and_i16_seq_cst:
1743; RV32I: # %bb.0:
1744; RV32I-NEXT: addi sp, sp, -16
1745; RV32I-NEXT: sw ra, 12(sp)
1746; RV32I-NEXT: addi a2, zero, 5
1747; RV32I-NEXT: call __atomic_fetch_and_2
1748; RV32I-NEXT: lw ra, 12(sp)
1749; RV32I-NEXT: addi sp, sp, 16
1750; RV32I-NEXT: ret
1751 %1 = atomicrmw and i16* %a, i16 %b seq_cst
1752 ret i16 %1
1753}
1754
1755define i16 @atomicrmw_nand_i16_monotonic(i16* %a, i16 %b) {
1756; RV32I-LABEL: atomicrmw_nand_i16_monotonic:
1757; RV32I: # %bb.0:
1758; RV32I-NEXT: addi sp, sp, -16
1759; RV32I-NEXT: sw ra, 12(sp)
1760; RV32I-NEXT: mv a2, zero
1761; RV32I-NEXT: call __atomic_fetch_nand_2
1762; RV32I-NEXT: lw ra, 12(sp)
1763; RV32I-NEXT: addi sp, sp, 16
1764; RV32I-NEXT: ret
1765 %1 = atomicrmw nand i16* %a, i16 %b monotonic
1766 ret i16 %1
1767}
1768
1769define i16 @atomicrmw_nand_i16_acquire(i16* %a, i16 %b) {
1770; RV32I-LABEL: atomicrmw_nand_i16_acquire:
1771; RV32I: # %bb.0:
1772; RV32I-NEXT: addi sp, sp, -16
1773; RV32I-NEXT: sw ra, 12(sp)
1774; RV32I-NEXT: addi a2, zero, 2
1775; RV32I-NEXT: call __atomic_fetch_nand_2
1776; RV32I-NEXT: lw ra, 12(sp)
1777; RV32I-NEXT: addi sp, sp, 16
1778; RV32I-NEXT: ret
1779 %1 = atomicrmw nand i16* %a, i16 %b acquire
1780 ret i16 %1
1781}
1782
1783define i16 @atomicrmw_nand_i16_release(i16* %a, i16 %b) {
1784; RV32I-LABEL: atomicrmw_nand_i16_release:
1785; RV32I: # %bb.0:
1786; RV32I-NEXT: addi sp, sp, -16
1787; RV32I-NEXT: sw ra, 12(sp)
1788; RV32I-NEXT: addi a2, zero, 3
1789; RV32I-NEXT: call __atomic_fetch_nand_2
1790; RV32I-NEXT: lw ra, 12(sp)
1791; RV32I-NEXT: addi sp, sp, 16
1792; RV32I-NEXT: ret
1793 %1 = atomicrmw nand i16* %a, i16 %b release
1794 ret i16 %1
1795}
1796
1797define i16 @atomicrmw_nand_i16_acq_rel(i16* %a, i16 %b) {
1798; RV32I-LABEL: atomicrmw_nand_i16_acq_rel:
1799; RV32I: # %bb.0:
1800; RV32I-NEXT: addi sp, sp, -16
1801; RV32I-NEXT: sw ra, 12(sp)
1802; RV32I-NEXT: addi a2, zero, 4
1803; RV32I-NEXT: call __atomic_fetch_nand_2
1804; RV32I-NEXT: lw ra, 12(sp)
1805; RV32I-NEXT: addi sp, sp, 16
1806; RV32I-NEXT: ret
1807 %1 = atomicrmw nand i16* %a, i16 %b acq_rel
1808 ret i16 %1
1809}
1810
1811define i16 @atomicrmw_nand_i16_seq_cst(i16* %a, i16 %b) {
1812; RV32I-LABEL: atomicrmw_nand_i16_seq_cst:
1813; RV32I: # %bb.0:
1814; RV32I-NEXT: addi sp, sp, -16
1815; RV32I-NEXT: sw ra, 12(sp)
1816; RV32I-NEXT: addi a2, zero, 5
1817; RV32I-NEXT: call __atomic_fetch_nand_2
1818; RV32I-NEXT: lw ra, 12(sp)
1819; RV32I-NEXT: addi sp, sp, 16
1820; RV32I-NEXT: ret
1821 %1 = atomicrmw nand i16* %a, i16 %b seq_cst
1822 ret i16 %1
1823}
1824
1825define i16 @atomicrmw_or_i16_monotonic(i16 *%a, i16 %b) nounwind {
1826; RV32I-LABEL: atomicrmw_or_i16_monotonic:
1827; RV32I: # %bb.0:
1828; RV32I-NEXT: addi sp, sp, -16
1829; RV32I-NEXT: sw ra, 12(sp)
1830; RV32I-NEXT: mv a2, zero
1831; RV32I-NEXT: call __atomic_fetch_or_2
1832; RV32I-NEXT: lw ra, 12(sp)
1833; RV32I-NEXT: addi sp, sp, 16
1834; RV32I-NEXT: ret
1835 %1 = atomicrmw or i16* %a, i16 %b monotonic
1836 ret i16 %1
1837}
1838
1839define i16 @atomicrmw_or_i16_acquire(i16 *%a, i16 %b) nounwind {
1840; RV32I-LABEL: atomicrmw_or_i16_acquire:
1841; RV32I: # %bb.0:
1842; RV32I-NEXT: addi sp, sp, -16
1843; RV32I-NEXT: sw ra, 12(sp)
1844; RV32I-NEXT: addi a2, zero, 2
1845; RV32I-NEXT: call __atomic_fetch_or_2
1846; RV32I-NEXT: lw ra, 12(sp)
1847; RV32I-NEXT: addi sp, sp, 16
1848; RV32I-NEXT: ret
1849 %1 = atomicrmw or i16* %a, i16 %b acquire
1850 ret i16 %1
1851}
1852
1853define i16 @atomicrmw_or_i16_release(i16 *%a, i16 %b) nounwind {
1854; RV32I-LABEL: atomicrmw_or_i16_release:
1855; RV32I: # %bb.0:
1856; RV32I-NEXT: addi sp, sp, -16
1857; RV32I-NEXT: sw ra, 12(sp)
1858; RV32I-NEXT: addi a2, zero, 3
1859; RV32I-NEXT: call __atomic_fetch_or_2
1860; RV32I-NEXT: lw ra, 12(sp)
1861; RV32I-NEXT: addi sp, sp, 16
1862; RV32I-NEXT: ret
1863 %1 = atomicrmw or i16* %a, i16 %b release
1864 ret i16 %1
1865}
1866
1867define i16 @atomicrmw_or_i16_acq_rel(i16 *%a, i16 %b) nounwind {
1868; RV32I-LABEL: atomicrmw_or_i16_acq_rel:
1869; RV32I: # %bb.0:
1870; RV32I-NEXT: addi sp, sp, -16
1871; RV32I-NEXT: sw ra, 12(sp)
1872; RV32I-NEXT: addi a2, zero, 4
1873; RV32I-NEXT: call __atomic_fetch_or_2
1874; RV32I-NEXT: lw ra, 12(sp)
1875; RV32I-NEXT: addi sp, sp, 16
1876; RV32I-NEXT: ret
1877 %1 = atomicrmw or i16* %a, i16 %b acq_rel
1878 ret i16 %1
1879}
1880
1881define i16 @atomicrmw_or_i16_seq_cst(i16 *%a, i16 %b) nounwind {
1882; RV32I-LABEL: atomicrmw_or_i16_seq_cst:
1883; RV32I: # %bb.0:
1884; RV32I-NEXT: addi sp, sp, -16
1885; RV32I-NEXT: sw ra, 12(sp)
1886; RV32I-NEXT: addi a2, zero, 5
1887; RV32I-NEXT: call __atomic_fetch_or_2
1888; RV32I-NEXT: lw ra, 12(sp)
1889; RV32I-NEXT: addi sp, sp, 16
1890; RV32I-NEXT: ret
1891 %1 = atomicrmw or i16* %a, i16 %b seq_cst
1892 ret i16 %1
1893}
1894
1895define i16 @atomicrmw_xor_i16_monotonic(i16 *%a, i16 %b) nounwind {
1896; RV32I-LABEL: atomicrmw_xor_i16_monotonic:
1897; RV32I: # %bb.0:
1898; RV32I-NEXT: addi sp, sp, -16
1899; RV32I-NEXT: sw ra, 12(sp)
1900; RV32I-NEXT: mv a2, zero
1901; RV32I-NEXT: call __atomic_fetch_xor_2
1902; RV32I-NEXT: lw ra, 12(sp)
1903; RV32I-NEXT: addi sp, sp, 16
1904; RV32I-NEXT: ret
1905 %1 = atomicrmw xor i16* %a, i16 %b monotonic
1906 ret i16 %1
1907}
1908
1909define i16 @atomicrmw_xor_i16_acquire(i16 *%a, i16 %b) nounwind {
1910; RV32I-LABEL: atomicrmw_xor_i16_acquire:
1911; RV32I: # %bb.0:
1912; RV32I-NEXT: addi sp, sp, -16
1913; RV32I-NEXT: sw ra, 12(sp)
1914; RV32I-NEXT: addi a2, zero, 2
1915; RV32I-NEXT: call __atomic_fetch_xor_2
1916; RV32I-NEXT: lw ra, 12(sp)
1917; RV32I-NEXT: addi sp, sp, 16
1918; RV32I-NEXT: ret
1919 %1 = atomicrmw xor i16* %a, i16 %b acquire
1920 ret i16 %1
1921}
1922
1923define i16 @atomicrmw_xor_i16_release(i16 *%a, i16 %b) nounwind {
1924; RV32I-LABEL: atomicrmw_xor_i16_release:
1925; RV32I: # %bb.0:
1926; RV32I-NEXT: addi sp, sp, -16
1927; RV32I-NEXT: sw ra, 12(sp)
1928; RV32I-NEXT: addi a2, zero, 3
1929; RV32I-NEXT: call __atomic_fetch_xor_2
1930; RV32I-NEXT: lw ra, 12(sp)
1931; RV32I-NEXT: addi sp, sp, 16
1932; RV32I-NEXT: ret
1933 %1 = atomicrmw xor i16* %a, i16 %b release
1934 ret i16 %1
1935}
1936
1937define i16 @atomicrmw_xor_i16_acq_rel(i16 *%a, i16 %b) nounwind {
1938; RV32I-LABEL: atomicrmw_xor_i16_acq_rel:
1939; RV32I: # %bb.0:
1940; RV32I-NEXT: addi sp, sp, -16
1941; RV32I-NEXT: sw ra, 12(sp)
1942; RV32I-NEXT: addi a2, zero, 4
1943; RV32I-NEXT: call __atomic_fetch_xor_2
1944; RV32I-NEXT: lw ra, 12(sp)
1945; RV32I-NEXT: addi sp, sp, 16
1946; RV32I-NEXT: ret
1947 %1 = atomicrmw xor i16* %a, i16 %b acq_rel
1948 ret i16 %1
1949}
1950
1951define i16 @atomicrmw_xor_i16_seq_cst(i16 *%a, i16 %b) nounwind {
1952; RV32I-LABEL: atomicrmw_xor_i16_seq_cst:
1953; RV32I: # %bb.0:
1954; RV32I-NEXT: addi sp, sp, -16
1955; RV32I-NEXT: sw ra, 12(sp)
1956; RV32I-NEXT: addi a2, zero, 5
1957; RV32I-NEXT: call __atomic_fetch_xor_2
1958; RV32I-NEXT: lw ra, 12(sp)
1959; RV32I-NEXT: addi sp, sp, 16
1960; RV32I-NEXT: ret
1961 %1 = atomicrmw xor i16* %a, i16 %b seq_cst
1962 ret i16 %1
1963}
1964
1965define i16 @atomicrmw_max_i16_monotonic(i16 *%a, i16 %b) nounwind {
1966; RV32I-LABEL: atomicrmw_max_i16_monotonic:
1967; RV32I: # %bb.0:
1968; RV32I-NEXT: addi sp, sp, -32
1969; RV32I-NEXT: sw ra, 28(sp)
1970; RV32I-NEXT: sw s1, 24(sp)
1971; RV32I-NEXT: sw s2, 20(sp)
1972; RV32I-NEXT: sw s3, 16(sp)
1973; RV32I-NEXT: sw s4, 12(sp)
1974; RV32I-NEXT: mv s2, a1
1975; RV32I-NEXT: mv s4, a0
1976; RV32I-NEXT: lhu a0, 0(a0)
1977; RV32I-NEXT: slli a1, a1, 16
1978; RV32I-NEXT: srai s1, a1, 16
1979; RV32I-NEXT: addi s3, sp, 10
1980; RV32I-NEXT: .LBB90_1: # %atomicrmw.start
1981; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1982; RV32I-NEXT: slli a1, a0, 16
1983; RV32I-NEXT: srai a1, a1, 16
1984; RV32I-NEXT: mv a2, a0
1985; RV32I-NEXT: blt s1, a1, .LBB90_3
1986; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1987; RV32I-NEXT: # in Loop: Header=BB90_1 Depth=1
1988; RV32I-NEXT: mv a2, s2
1989; RV32I-NEXT: .LBB90_3: # %atomicrmw.start
1990; RV32I-NEXT: # in Loop: Header=BB90_1 Depth=1
1991; RV32I-NEXT: sh a0, 10(sp)
1992; RV32I-NEXT: mv a0, s4
1993; RV32I-NEXT: mv a1, s3
1994; RV32I-NEXT: mv a3, zero
1995; RV32I-NEXT: mv a4, zero
1996; RV32I-NEXT: call __atomic_compare_exchange_2
1997; RV32I-NEXT: mv a1, a0
1998; RV32I-NEXT: lh a0, 10(sp)
1999; RV32I-NEXT: beqz a1, .LBB90_1
2000; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2001; RV32I-NEXT: lw s4, 12(sp)
2002; RV32I-NEXT: lw s3, 16(sp)
2003; RV32I-NEXT: lw s2, 20(sp)
2004; RV32I-NEXT: lw s1, 24(sp)
2005; RV32I-NEXT: lw ra, 28(sp)
2006; RV32I-NEXT: addi sp, sp, 32
2007; RV32I-NEXT: ret
2008 %1 = atomicrmw max i16* %a, i16 %b monotonic
2009 ret i16 %1
2010}
2011
2012define i16 @atomicrmw_max_i16_acquire(i16 *%a, i16 %b) nounwind {
2013; RV32I-LABEL: atomicrmw_max_i16_acquire:
2014; RV32I: # %bb.0:
2015; RV32I-NEXT: addi sp, sp, -32
2016; RV32I-NEXT: sw ra, 28(sp)
2017; RV32I-NEXT: sw s1, 24(sp)
2018; RV32I-NEXT: sw s2, 20(sp)
2019; RV32I-NEXT: sw s3, 16(sp)
2020; RV32I-NEXT: sw s4, 12(sp)
2021; RV32I-NEXT: sw s5, 8(sp)
2022; RV32I-NEXT: mv s2, a1
2023; RV32I-NEXT: mv s4, a0
2024; RV32I-NEXT: lhu a0, 0(a0)
2025; RV32I-NEXT: slli a1, a1, 16
2026; RV32I-NEXT: srai s5, a1, 16
2027; RV32I-NEXT: addi s3, sp, 6
2028; RV32I-NEXT: addi s1, zero, 2
2029; RV32I-NEXT: .LBB91_1: # %atomicrmw.start
2030; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2031; RV32I-NEXT: slli a1, a0, 16
2032; RV32I-NEXT: srai a1, a1, 16
2033; RV32I-NEXT: mv a2, a0
2034; RV32I-NEXT: blt s5, a1, .LBB91_3
2035; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2036; RV32I-NEXT: # in Loop: Header=BB91_1 Depth=1
2037; RV32I-NEXT: mv a2, s2
2038; RV32I-NEXT: .LBB91_3: # %atomicrmw.start
2039; RV32I-NEXT: # in Loop: Header=BB91_1 Depth=1
2040; RV32I-NEXT: sh a0, 6(sp)
2041; RV32I-NEXT: mv a0, s4
2042; RV32I-NEXT: mv a1, s3
2043; RV32I-NEXT: mv a3, s1
2044; RV32I-NEXT: mv a4, s1
2045; RV32I-NEXT: call __atomic_compare_exchange_2
2046; RV32I-NEXT: mv a1, a0
2047; RV32I-NEXT: lh a0, 6(sp)
2048; RV32I-NEXT: beqz a1, .LBB91_1
2049; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2050; RV32I-NEXT: lw s5, 8(sp)
2051; RV32I-NEXT: lw s4, 12(sp)
2052; RV32I-NEXT: lw s3, 16(sp)
2053; RV32I-NEXT: lw s2, 20(sp)
2054; RV32I-NEXT: lw s1, 24(sp)
2055; RV32I-NEXT: lw ra, 28(sp)
2056; RV32I-NEXT: addi sp, sp, 32
2057; RV32I-NEXT: ret
2058 %1 = atomicrmw max i16* %a, i16 %b acquire
2059 ret i16 %1
2060}
2061
2062define i16 @atomicrmw_max_i16_release(i16 *%a, i16 %b) nounwind {
2063; RV32I-LABEL: atomicrmw_max_i16_release:
2064; RV32I: # %bb.0:
2065; RV32I-NEXT: addi sp, sp, -32
2066; RV32I-NEXT: sw ra, 28(sp)
2067; RV32I-NEXT: sw s1, 24(sp)
2068; RV32I-NEXT: sw s2, 20(sp)
2069; RV32I-NEXT: sw s3, 16(sp)
2070; RV32I-NEXT: sw s4, 12(sp)
2071; RV32I-NEXT: sw s5, 8(sp)
2072; RV32I-NEXT: mv s2, a1
2073; RV32I-NEXT: mv s5, a0
2074; RV32I-NEXT: lhu a0, 0(a0)
2075; RV32I-NEXT: slli a1, a1, 16
2076; RV32I-NEXT: srai s1, a1, 16
2077; RV32I-NEXT: addi s3, sp, 6
2078; RV32I-NEXT: addi s4, zero, 3
2079; RV32I-NEXT: .LBB92_1: # %atomicrmw.start
2080; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2081; RV32I-NEXT: slli a1, a0, 16
2082; RV32I-NEXT: srai a1, a1, 16
2083; RV32I-NEXT: mv a2, a0
2084; RV32I-NEXT: blt s1, a1, .LBB92_3
2085; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2086; RV32I-NEXT: # in Loop: Header=BB92_1 Depth=1
2087; RV32I-NEXT: mv a2, s2
2088; RV32I-NEXT: .LBB92_3: # %atomicrmw.start
2089; RV32I-NEXT: # in Loop: Header=BB92_1 Depth=1
2090; RV32I-NEXT: sh a0, 6(sp)
2091; RV32I-NEXT: mv a0, s5
2092; RV32I-NEXT: mv a1, s3
2093; RV32I-NEXT: mv a3, s4
2094; RV32I-NEXT: mv a4, zero
2095; RV32I-NEXT: call __atomic_compare_exchange_2
2096; RV32I-NEXT: mv a1, a0
2097; RV32I-NEXT: lh a0, 6(sp)
2098; RV32I-NEXT: beqz a1, .LBB92_1
2099; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2100; RV32I-NEXT: lw s5, 8(sp)
2101; RV32I-NEXT: lw s4, 12(sp)
2102; RV32I-NEXT: lw s3, 16(sp)
2103; RV32I-NEXT: lw s2, 20(sp)
2104; RV32I-NEXT: lw s1, 24(sp)
2105; RV32I-NEXT: lw ra, 28(sp)
2106; RV32I-NEXT: addi sp, sp, 32
2107; RV32I-NEXT: ret
2108 %1 = atomicrmw max i16* %a, i16 %b release
2109 ret i16 %1
2110}
2111
2112define i16 @atomicrmw_max_i16_acq_rel(i16 *%a, i16 %b) nounwind {
2113; RV32I-LABEL: atomicrmw_max_i16_acq_rel:
2114; RV32I: # %bb.0:
2115; RV32I-NEXT: addi sp, sp, -32
2116; RV32I-NEXT: sw ra, 28(sp)
2117; RV32I-NEXT: sw s1, 24(sp)
2118; RV32I-NEXT: sw s2, 20(sp)
2119; RV32I-NEXT: sw s3, 16(sp)
2120; RV32I-NEXT: sw s4, 12(sp)
2121; RV32I-NEXT: sw s5, 8(sp)
2122; RV32I-NEXT: sw s6, 4(sp)
2123; RV32I-NEXT: mv s2, a1
2124; RV32I-NEXT: mv s6, a0
2125; RV32I-NEXT: lhu a0, 0(a0)
2126; RV32I-NEXT: slli a1, a1, 16
2127; RV32I-NEXT: srai s1, a1, 16
2128; RV32I-NEXT: addi s3, sp, 2
2129; RV32I-NEXT: addi s4, zero, 4
2130; RV32I-NEXT: addi s5, zero, 2
2131; RV32I-NEXT: .LBB93_1: # %atomicrmw.start
2132; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2133; RV32I-NEXT: slli a1, a0, 16
2134; RV32I-NEXT: srai a1, a1, 16
2135; RV32I-NEXT: mv a2, a0
2136; RV32I-NEXT: blt s1, a1, .LBB93_3
2137; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2138; RV32I-NEXT: # in Loop: Header=BB93_1 Depth=1
2139; RV32I-NEXT: mv a2, s2
2140; RV32I-NEXT: .LBB93_3: # %atomicrmw.start
2141; RV32I-NEXT: # in Loop: Header=BB93_1 Depth=1
2142; RV32I-NEXT: sh a0, 2(sp)
2143; RV32I-NEXT: mv a0, s6
2144; RV32I-NEXT: mv a1, s3
2145; RV32I-NEXT: mv a3, s4
2146; RV32I-NEXT: mv a4, s5
2147; RV32I-NEXT: call __atomic_compare_exchange_2
2148; RV32I-NEXT: mv a1, a0
2149; RV32I-NEXT: lh a0, 2(sp)
2150; RV32I-NEXT: beqz a1, .LBB93_1
2151; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2152; RV32I-NEXT: lw s6, 4(sp)
2153; RV32I-NEXT: lw s5, 8(sp)
2154; RV32I-NEXT: lw s4, 12(sp)
2155; RV32I-NEXT: lw s3, 16(sp)
2156; RV32I-NEXT: lw s2, 20(sp)
2157; RV32I-NEXT: lw s1, 24(sp)
2158; RV32I-NEXT: lw ra, 28(sp)
2159; RV32I-NEXT: addi sp, sp, 32
2160; RV32I-NEXT: ret
2161 %1 = atomicrmw max i16* %a, i16 %b acq_rel
2162 ret i16 %1
2163}
2164
2165define i16 @atomicrmw_max_i16_seq_cst(i16 *%a, i16 %b) nounwind {
2166; RV32I-LABEL: atomicrmw_max_i16_seq_cst:
2167; RV32I: # %bb.0:
2168; RV32I-NEXT: addi sp, sp, -32
2169; RV32I-NEXT: sw ra, 28(sp)
2170; RV32I-NEXT: sw s1, 24(sp)
2171; RV32I-NEXT: sw s2, 20(sp)
2172; RV32I-NEXT: sw s3, 16(sp)
2173; RV32I-NEXT: sw s4, 12(sp)
2174; RV32I-NEXT: sw s5, 8(sp)
2175; RV32I-NEXT: mv s2, a1
2176; RV32I-NEXT: mv s4, a0
2177; RV32I-NEXT: lhu a0, 0(a0)
2178; RV32I-NEXT: slli a1, a1, 16
2179; RV32I-NEXT: srai s5, a1, 16
2180; RV32I-NEXT: addi s3, sp, 6
2181; RV32I-NEXT: addi s1, zero, 5
2182; RV32I-NEXT: .LBB94_1: # %atomicrmw.start
2183; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2184; RV32I-NEXT: slli a1, a0, 16
2185; RV32I-NEXT: srai a1, a1, 16
2186; RV32I-NEXT: mv a2, a0
2187; RV32I-NEXT: blt s5, a1, .LBB94_3
2188; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2189; RV32I-NEXT: # in Loop: Header=BB94_1 Depth=1
2190; RV32I-NEXT: mv a2, s2
2191; RV32I-NEXT: .LBB94_3: # %atomicrmw.start
2192; RV32I-NEXT: # in Loop: Header=BB94_1 Depth=1
2193; RV32I-NEXT: sh a0, 6(sp)
2194; RV32I-NEXT: mv a0, s4
2195; RV32I-NEXT: mv a1, s3
2196; RV32I-NEXT: mv a3, s1
2197; RV32I-NEXT: mv a4, s1
2198; RV32I-NEXT: call __atomic_compare_exchange_2
2199; RV32I-NEXT: mv a1, a0
2200; RV32I-NEXT: lh a0, 6(sp)
2201; RV32I-NEXT: beqz a1, .LBB94_1
2202; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2203; RV32I-NEXT: lw s5, 8(sp)
2204; RV32I-NEXT: lw s4, 12(sp)
2205; RV32I-NEXT: lw s3, 16(sp)
2206; RV32I-NEXT: lw s2, 20(sp)
2207; RV32I-NEXT: lw s1, 24(sp)
2208; RV32I-NEXT: lw ra, 28(sp)
2209; RV32I-NEXT: addi sp, sp, 32
2210; RV32I-NEXT: ret
2211 %1 = atomicrmw max i16* %a, i16 %b seq_cst
2212 ret i16 %1
2213}
2214
2215define i16 @atomicrmw_min_i16_monotonic(i16 *%a, i16 %b) nounwind {
2216; RV32I-LABEL: atomicrmw_min_i16_monotonic:
2217; RV32I: # %bb.0:
2218; RV32I-NEXT: addi sp, sp, -32
2219; RV32I-NEXT: sw ra, 28(sp)
2220; RV32I-NEXT: sw s1, 24(sp)
2221; RV32I-NEXT: sw s2, 20(sp)
2222; RV32I-NEXT: sw s3, 16(sp)
2223; RV32I-NEXT: sw s4, 12(sp)
2224; RV32I-NEXT: mv s2, a1
2225; RV32I-NEXT: mv s4, a0
2226; RV32I-NEXT: lhu a0, 0(a0)
2227; RV32I-NEXT: slli a1, a1, 16
2228; RV32I-NEXT: srai s1, a1, 16
2229; RV32I-NEXT: addi s3, sp, 10
2230; RV32I-NEXT: .LBB95_1: # %atomicrmw.start
2231; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2232; RV32I-NEXT: slli a1, a0, 16
2233; RV32I-NEXT: srai a1, a1, 16
2234; RV32I-NEXT: mv a2, a0
2235; RV32I-NEXT: bge s1, a1, .LBB95_3
2236; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2237; RV32I-NEXT: # in Loop: Header=BB95_1 Depth=1
2238; RV32I-NEXT: mv a2, s2
2239; RV32I-NEXT: .LBB95_3: # %atomicrmw.start
2240; RV32I-NEXT: # in Loop: Header=BB95_1 Depth=1
2241; RV32I-NEXT: sh a0, 10(sp)
2242; RV32I-NEXT: mv a0, s4
2243; RV32I-NEXT: mv a1, s3
2244; RV32I-NEXT: mv a3, zero
2245; RV32I-NEXT: mv a4, zero
2246; RV32I-NEXT: call __atomic_compare_exchange_2
2247; RV32I-NEXT: mv a1, a0
2248; RV32I-NEXT: lh a0, 10(sp)
2249; RV32I-NEXT: beqz a1, .LBB95_1
2250; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2251; RV32I-NEXT: lw s4, 12(sp)
2252; RV32I-NEXT: lw s3, 16(sp)
2253; RV32I-NEXT: lw s2, 20(sp)
2254; RV32I-NEXT: lw s1, 24(sp)
2255; RV32I-NEXT: lw ra, 28(sp)
2256; RV32I-NEXT: addi sp, sp, 32
2257; RV32I-NEXT: ret
2258 %1 = atomicrmw min i16* %a, i16 %b monotonic
2259 ret i16 %1
2260}
2261
2262define i16 @atomicrmw_min_i16_acquire(i16 *%a, i16 %b) nounwind {
2263; RV32I-LABEL: atomicrmw_min_i16_acquire:
2264; RV32I: # %bb.0:
2265; RV32I-NEXT: addi sp, sp, -32
2266; RV32I-NEXT: sw ra, 28(sp)
2267; RV32I-NEXT: sw s1, 24(sp)
2268; RV32I-NEXT: sw s2, 20(sp)
2269; RV32I-NEXT: sw s3, 16(sp)
2270; RV32I-NEXT: sw s4, 12(sp)
2271; RV32I-NEXT: sw s5, 8(sp)
2272; RV32I-NEXT: mv s2, a1
2273; RV32I-NEXT: mv s4, a0
2274; RV32I-NEXT: lhu a0, 0(a0)
2275; RV32I-NEXT: slli a1, a1, 16
2276; RV32I-NEXT: srai s5, a1, 16
2277; RV32I-NEXT: addi s3, sp, 6
2278; RV32I-NEXT: addi s1, zero, 2
2279; RV32I-NEXT: .LBB96_1: # %atomicrmw.start
2280; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2281; RV32I-NEXT: slli a1, a0, 16
2282; RV32I-NEXT: srai a1, a1, 16
2283; RV32I-NEXT: mv a2, a0
2284; RV32I-NEXT: bge s5, a1, .LBB96_3
2285; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2286; RV32I-NEXT: # in Loop: Header=BB96_1 Depth=1
2287; RV32I-NEXT: mv a2, s2
2288; RV32I-NEXT: .LBB96_3: # %atomicrmw.start
2289; RV32I-NEXT: # in Loop: Header=BB96_1 Depth=1
2290; RV32I-NEXT: sh a0, 6(sp)
2291; RV32I-NEXT: mv a0, s4
2292; RV32I-NEXT: mv a1, s3
2293; RV32I-NEXT: mv a3, s1
2294; RV32I-NEXT: mv a4, s1
2295; RV32I-NEXT: call __atomic_compare_exchange_2
2296; RV32I-NEXT: mv a1, a0
2297; RV32I-NEXT: lh a0, 6(sp)
2298; RV32I-NEXT: beqz a1, .LBB96_1
2299; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2300; RV32I-NEXT: lw s5, 8(sp)
2301; RV32I-NEXT: lw s4, 12(sp)
2302; RV32I-NEXT: lw s3, 16(sp)
2303; RV32I-NEXT: lw s2, 20(sp)
2304; RV32I-NEXT: lw s1, 24(sp)
2305; RV32I-NEXT: lw ra, 28(sp)
2306; RV32I-NEXT: addi sp, sp, 32
2307; RV32I-NEXT: ret
2308 %1 = atomicrmw min i16* %a, i16 %b acquire
2309 ret i16 %1
2310}
2311
2312define i16 @atomicrmw_min_i16_release(i16 *%a, i16 %b) nounwind {
2313; RV32I-LABEL: atomicrmw_min_i16_release:
2314; RV32I: # %bb.0:
2315; RV32I-NEXT: addi sp, sp, -32
2316; RV32I-NEXT: sw ra, 28(sp)
2317; RV32I-NEXT: sw s1, 24(sp)
2318; RV32I-NEXT: sw s2, 20(sp)
2319; RV32I-NEXT: sw s3, 16(sp)
2320; RV32I-NEXT: sw s4, 12(sp)
2321; RV32I-NEXT: sw s5, 8(sp)
2322; RV32I-NEXT: mv s2, a1
2323; RV32I-NEXT: mv s5, a0
2324; RV32I-NEXT: lhu a0, 0(a0)
2325; RV32I-NEXT: slli a1, a1, 16
2326; RV32I-NEXT: srai s1, a1, 16
2327; RV32I-NEXT: addi s3, sp, 6
2328; RV32I-NEXT: addi s4, zero, 3
2329; RV32I-NEXT: .LBB97_1: # %atomicrmw.start
2330; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2331; RV32I-NEXT: slli a1, a0, 16
2332; RV32I-NEXT: srai a1, a1, 16
2333; RV32I-NEXT: mv a2, a0
2334; RV32I-NEXT: bge s1, a1, .LBB97_3
2335; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2336; RV32I-NEXT: # in Loop: Header=BB97_1 Depth=1
2337; RV32I-NEXT: mv a2, s2
2338; RV32I-NEXT: .LBB97_3: # %atomicrmw.start
2339; RV32I-NEXT: # in Loop: Header=BB97_1 Depth=1
2340; RV32I-NEXT: sh a0, 6(sp)
2341; RV32I-NEXT: mv a0, s5
2342; RV32I-NEXT: mv a1, s3
2343; RV32I-NEXT: mv a3, s4
2344; RV32I-NEXT: mv a4, zero
2345; RV32I-NEXT: call __atomic_compare_exchange_2
2346; RV32I-NEXT: mv a1, a0
2347; RV32I-NEXT: lh a0, 6(sp)
2348; RV32I-NEXT: beqz a1, .LBB97_1
2349; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2350; RV32I-NEXT: lw s5, 8(sp)
2351; RV32I-NEXT: lw s4, 12(sp)
2352; RV32I-NEXT: lw s3, 16(sp)
2353; RV32I-NEXT: lw s2, 20(sp)
2354; RV32I-NEXT: lw s1, 24(sp)
2355; RV32I-NEXT: lw ra, 28(sp)
2356; RV32I-NEXT: addi sp, sp, 32
2357; RV32I-NEXT: ret
2358 %1 = atomicrmw min i16* %a, i16 %b release
2359 ret i16 %1
2360}
2361
2362define i16 @atomicrmw_min_i16_acq_rel(i16 *%a, i16 %b) nounwind {
2363; RV32I-LABEL: atomicrmw_min_i16_acq_rel:
2364; RV32I: # %bb.0:
2365; RV32I-NEXT: addi sp, sp, -32
2366; RV32I-NEXT: sw ra, 28(sp)
2367; RV32I-NEXT: sw s1, 24(sp)
2368; RV32I-NEXT: sw s2, 20(sp)
2369; RV32I-NEXT: sw s3, 16(sp)
2370; RV32I-NEXT: sw s4, 12(sp)
2371; RV32I-NEXT: sw s5, 8(sp)
2372; RV32I-NEXT: sw s6, 4(sp)
2373; RV32I-NEXT: mv s2, a1
2374; RV32I-NEXT: mv s6, a0
2375; RV32I-NEXT: lhu a0, 0(a0)
2376; RV32I-NEXT: slli a1, a1, 16
2377; RV32I-NEXT: srai s1, a1, 16
2378; RV32I-NEXT: addi s3, sp, 2
2379; RV32I-NEXT: addi s4, zero, 4
2380; RV32I-NEXT: addi s5, zero, 2
2381; RV32I-NEXT: .LBB98_1: # %atomicrmw.start
2382; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2383; RV32I-NEXT: slli a1, a0, 16
2384; RV32I-NEXT: srai a1, a1, 16
2385; RV32I-NEXT: mv a2, a0
2386; RV32I-NEXT: bge s1, a1, .LBB98_3
2387; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2388; RV32I-NEXT: # in Loop: Header=BB98_1 Depth=1
2389; RV32I-NEXT: mv a2, s2
2390; RV32I-NEXT: .LBB98_3: # %atomicrmw.start
2391; RV32I-NEXT: # in Loop: Header=BB98_1 Depth=1
2392; RV32I-NEXT: sh a0, 2(sp)
2393; RV32I-NEXT: mv a0, s6
2394; RV32I-NEXT: mv a1, s3
2395; RV32I-NEXT: mv a3, s4
2396; RV32I-NEXT: mv a4, s5
2397; RV32I-NEXT: call __atomic_compare_exchange_2
2398; RV32I-NEXT: mv a1, a0
2399; RV32I-NEXT: lh a0, 2(sp)
2400; RV32I-NEXT: beqz a1, .LBB98_1
2401; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2402; RV32I-NEXT: lw s6, 4(sp)
2403; RV32I-NEXT: lw s5, 8(sp)
2404; RV32I-NEXT: lw s4, 12(sp)
2405; RV32I-NEXT: lw s3, 16(sp)
2406; RV32I-NEXT: lw s2, 20(sp)
2407; RV32I-NEXT: lw s1, 24(sp)
2408; RV32I-NEXT: lw ra, 28(sp)
2409; RV32I-NEXT: addi sp, sp, 32
2410; RV32I-NEXT: ret
2411 %1 = atomicrmw min i16* %a, i16 %b acq_rel
2412 ret i16 %1
2413}
2414
2415define i16 @atomicrmw_min_i16_seq_cst(i16 *%a, i16 %b) nounwind {
2416; RV32I-LABEL: atomicrmw_min_i16_seq_cst:
2417; RV32I: # %bb.0:
2418; RV32I-NEXT: addi sp, sp, -32
2419; RV32I-NEXT: sw ra, 28(sp)
2420; RV32I-NEXT: sw s1, 24(sp)
2421; RV32I-NEXT: sw s2, 20(sp)
2422; RV32I-NEXT: sw s3, 16(sp)
2423; RV32I-NEXT: sw s4, 12(sp)
2424; RV32I-NEXT: sw s5, 8(sp)
2425; RV32I-NEXT: mv s2, a1
2426; RV32I-NEXT: mv s4, a0
2427; RV32I-NEXT: lhu a0, 0(a0)
2428; RV32I-NEXT: slli a1, a1, 16
2429; RV32I-NEXT: srai s5, a1, 16
2430; RV32I-NEXT: addi s3, sp, 6
2431; RV32I-NEXT: addi s1, zero, 5
2432; RV32I-NEXT: .LBB99_1: # %atomicrmw.start
2433; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2434; RV32I-NEXT: slli a1, a0, 16
2435; RV32I-NEXT: srai a1, a1, 16
2436; RV32I-NEXT: mv a2, a0
2437; RV32I-NEXT: bge s5, a1, .LBB99_3
2438; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2439; RV32I-NEXT: # in Loop: Header=BB99_1 Depth=1
2440; RV32I-NEXT: mv a2, s2
2441; RV32I-NEXT: .LBB99_3: # %atomicrmw.start
2442; RV32I-NEXT: # in Loop: Header=BB99_1 Depth=1
2443; RV32I-NEXT: sh a0, 6(sp)
2444; RV32I-NEXT: mv a0, s4
2445; RV32I-NEXT: mv a1, s3
2446; RV32I-NEXT: mv a3, s1
2447; RV32I-NEXT: mv a4, s1
2448; RV32I-NEXT: call __atomic_compare_exchange_2
2449; RV32I-NEXT: mv a1, a0
2450; RV32I-NEXT: lh a0, 6(sp)
2451; RV32I-NEXT: beqz a1, .LBB99_1
2452; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2453; RV32I-NEXT: lw s5, 8(sp)
2454; RV32I-NEXT: lw s4, 12(sp)
2455; RV32I-NEXT: lw s3, 16(sp)
2456; RV32I-NEXT: lw s2, 20(sp)
2457; RV32I-NEXT: lw s1, 24(sp)
2458; RV32I-NEXT: lw ra, 28(sp)
2459; RV32I-NEXT: addi sp, sp, 32
2460; RV32I-NEXT: ret
2461 %1 = atomicrmw min i16* %a, i16 %b seq_cst
2462 ret i16 %1
2463}
2464
2465define i16 @atomicrmw_umax_i16_monotonic(i16 *%a, i16 %b) nounwind {
2466; RV32I-LABEL: atomicrmw_umax_i16_monotonic:
2467; RV32I: # %bb.0:
2468; RV32I-NEXT: addi sp, sp, -32
2469; RV32I-NEXT: sw ra, 28(sp)
2470; RV32I-NEXT: sw s1, 24(sp)
2471; RV32I-NEXT: sw s2, 20(sp)
2472; RV32I-NEXT: sw s3, 16(sp)
2473; RV32I-NEXT: sw s4, 12(sp)
2474; RV32I-NEXT: sw s5, 8(sp)
2475; RV32I-NEXT: mv s2, a1
2476; RV32I-NEXT: mv s4, a0
2477; RV32I-NEXT: lhu a0, 0(a0)
2478; RV32I-NEXT: lui a1, 16
2479; RV32I-NEXT: addi s1, a1, -1
2480; RV32I-NEXT: and s5, s2, s1
2481; RV32I-NEXT: addi s3, sp, 6
2482; RV32I-NEXT: .LBB100_1: # %atomicrmw.start
2483; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2484; RV32I-NEXT: and a1, a0, s1
2485; RV32I-NEXT: mv a2, a0
2486; RV32I-NEXT: bltu s5, a1, .LBB100_3
2487; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2488; RV32I-NEXT: # in Loop: Header=BB100_1 Depth=1
2489; RV32I-NEXT: mv a2, s2
2490; RV32I-NEXT: .LBB100_3: # %atomicrmw.start
2491; RV32I-NEXT: # in Loop: Header=BB100_1 Depth=1
2492; RV32I-NEXT: sh a0, 6(sp)
2493; RV32I-NEXT: mv a0, s4
2494; RV32I-NEXT: mv a1, s3
2495; RV32I-NEXT: mv a3, zero
2496; RV32I-NEXT: mv a4, zero
2497; RV32I-NEXT: call __atomic_compare_exchange_2
2498; RV32I-NEXT: mv a1, a0
2499; RV32I-NEXT: lh a0, 6(sp)
2500; RV32I-NEXT: beqz a1, .LBB100_1
2501; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2502; RV32I-NEXT: lw s5, 8(sp)
2503; RV32I-NEXT: lw s4, 12(sp)
2504; RV32I-NEXT: lw s3, 16(sp)
2505; RV32I-NEXT: lw s2, 20(sp)
2506; RV32I-NEXT: lw s1, 24(sp)
2507; RV32I-NEXT: lw ra, 28(sp)
2508; RV32I-NEXT: addi sp, sp, 32
2509; RV32I-NEXT: ret
2510 %1 = atomicrmw umax i16* %a, i16 %b monotonic
2511 ret i16 %1
2512}
2513
2514define i16 @atomicrmw_umax_i16_acquire(i16 *%a, i16 %b) nounwind {
2515; RV32I-LABEL: atomicrmw_umax_i16_acquire:
2516; RV32I: # %bb.0:
2517; RV32I-NEXT: addi sp, sp, -32
2518; RV32I-NEXT: sw ra, 28(sp)
2519; RV32I-NEXT: sw s1, 24(sp)
2520; RV32I-NEXT: sw s2, 20(sp)
2521; RV32I-NEXT: sw s3, 16(sp)
2522; RV32I-NEXT: sw s4, 12(sp)
2523; RV32I-NEXT: sw s5, 8(sp)
2524; RV32I-NEXT: sw s6, 4(sp)
2525; RV32I-NEXT: mv s2, a1
2526; RV32I-NEXT: mv s4, a0
2527; RV32I-NEXT: lhu a0, 0(a0)
2528; RV32I-NEXT: lui a1, 16
2529; RV32I-NEXT: addi s5, a1, -1
2530; RV32I-NEXT: and s6, s2, s5
2531; RV32I-NEXT: addi s3, sp, 2
2532; RV32I-NEXT: addi s1, zero, 2
2533; RV32I-NEXT: .LBB101_1: # %atomicrmw.start
2534; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2535; RV32I-NEXT: and a1, a0, s5
2536; RV32I-NEXT: mv a2, a0
2537; RV32I-NEXT: bltu s6, a1, .LBB101_3
2538; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2539; RV32I-NEXT: # in Loop: Header=BB101_1 Depth=1
2540; RV32I-NEXT: mv a2, s2
2541; RV32I-NEXT: .LBB101_3: # %atomicrmw.start
2542; RV32I-NEXT: # in Loop: Header=BB101_1 Depth=1
2543; RV32I-NEXT: sh a0, 2(sp)
2544; RV32I-NEXT: mv a0, s4
2545; RV32I-NEXT: mv a1, s3
2546; RV32I-NEXT: mv a3, s1
2547; RV32I-NEXT: mv a4, s1
2548; RV32I-NEXT: call __atomic_compare_exchange_2
2549; RV32I-NEXT: mv a1, a0
2550; RV32I-NEXT: lh a0, 2(sp)
2551; RV32I-NEXT: beqz a1, .LBB101_1
2552; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2553; RV32I-NEXT: lw s6, 4(sp)
2554; RV32I-NEXT: lw s5, 8(sp)
2555; RV32I-NEXT: lw s4, 12(sp)
2556; RV32I-NEXT: lw s3, 16(sp)
2557; RV32I-NEXT: lw s2, 20(sp)
2558; RV32I-NEXT: lw s1, 24(sp)
2559; RV32I-NEXT: lw ra, 28(sp)
2560; RV32I-NEXT: addi sp, sp, 32
2561; RV32I-NEXT: ret
2562 %1 = atomicrmw umax i16* %a, i16 %b acquire
2563 ret i16 %1
2564}
2565
2566define i16 @atomicrmw_umax_i16_release(i16 *%a, i16 %b) nounwind {
2567; RV32I-LABEL: atomicrmw_umax_i16_release:
2568; RV32I: # %bb.0:
2569; RV32I-NEXT: addi sp, sp, -32
2570; RV32I-NEXT: sw ra, 28(sp)
2571; RV32I-NEXT: sw s1, 24(sp)
2572; RV32I-NEXT: sw s2, 20(sp)
2573; RV32I-NEXT: sw s3, 16(sp)
2574; RV32I-NEXT: sw s4, 12(sp)
2575; RV32I-NEXT: sw s5, 8(sp)
2576; RV32I-NEXT: sw s6, 4(sp)
2577; RV32I-NEXT: mv s2, a1
2578; RV32I-NEXT: mv s5, a0
2579; RV32I-NEXT: lhu a0, 0(a0)
2580; RV32I-NEXT: lui a1, 16
2581; RV32I-NEXT: addi s1, a1, -1
2582; RV32I-NEXT: and s6, s2, s1
2583; RV32I-NEXT: addi s3, sp, 2
2584; RV32I-NEXT: addi s4, zero, 3
2585; RV32I-NEXT: .LBB102_1: # %atomicrmw.start
2586; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2587; RV32I-NEXT: and a1, a0, s1
2588; RV32I-NEXT: mv a2, a0
2589; RV32I-NEXT: bltu s6, a1, .LBB102_3
2590; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2591; RV32I-NEXT: # in Loop: Header=BB102_1 Depth=1
2592; RV32I-NEXT: mv a2, s2
2593; RV32I-NEXT: .LBB102_3: # %atomicrmw.start
2594; RV32I-NEXT: # in Loop: Header=BB102_1 Depth=1
2595; RV32I-NEXT: sh a0, 2(sp)
2596; RV32I-NEXT: mv a0, s5
2597; RV32I-NEXT: mv a1, s3
2598; RV32I-NEXT: mv a3, s4
2599; RV32I-NEXT: mv a4, zero
2600; RV32I-NEXT: call __atomic_compare_exchange_2
2601; RV32I-NEXT: mv a1, a0
2602; RV32I-NEXT: lh a0, 2(sp)
2603; RV32I-NEXT: beqz a1, .LBB102_1
2604; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2605; RV32I-NEXT: lw s6, 4(sp)
2606; RV32I-NEXT: lw s5, 8(sp)
2607; RV32I-NEXT: lw s4, 12(sp)
2608; RV32I-NEXT: lw s3, 16(sp)
2609; RV32I-NEXT: lw s2, 20(sp)
2610; RV32I-NEXT: lw s1, 24(sp)
2611; RV32I-NEXT: lw ra, 28(sp)
2612; RV32I-NEXT: addi sp, sp, 32
2613; RV32I-NEXT: ret
2614 %1 = atomicrmw umax i16* %a, i16 %b release
2615 ret i16 %1
2616}
2617
2618define i16 @atomicrmw_umax_i16_acq_rel(i16 *%a, i16 %b) nounwind {
2619; RV32I-LABEL: atomicrmw_umax_i16_acq_rel:
2620; RV32I: # %bb.0:
2621; RV32I-NEXT: addi sp, sp, -48
2622; RV32I-NEXT: sw ra, 44(sp)
2623; RV32I-NEXT: sw s1, 40(sp)
2624; RV32I-NEXT: sw s2, 36(sp)
2625; RV32I-NEXT: sw s3, 32(sp)
2626; RV32I-NEXT: sw s4, 28(sp)
2627; RV32I-NEXT: sw s5, 24(sp)
2628; RV32I-NEXT: sw s6, 20(sp)
2629; RV32I-NEXT: sw s7, 16(sp)
2630; RV32I-NEXT: mv s2, a1
2631; RV32I-NEXT: mv s6, a0
2632; RV32I-NEXT: lhu a0, 0(a0)
2633; RV32I-NEXT: lui a1, 16
2634; RV32I-NEXT: addi s1, a1, -1
2635; RV32I-NEXT: and s7, s2, s1
2636; RV32I-NEXT: addi s3, sp, 14
2637; RV32I-NEXT: addi s4, zero, 4
2638; RV32I-NEXT: addi s5, zero, 2
2639; RV32I-NEXT: .LBB103_1: # %atomicrmw.start
2640; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2641; RV32I-NEXT: and a1, a0, s1
2642; RV32I-NEXT: mv a2, a0
2643; RV32I-NEXT: bltu s7, a1, .LBB103_3
2644; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2645; RV32I-NEXT: # in Loop: Header=BB103_1 Depth=1
2646; RV32I-NEXT: mv a2, s2
2647; RV32I-NEXT: .LBB103_3: # %atomicrmw.start
2648; RV32I-NEXT: # in Loop: Header=BB103_1 Depth=1
2649; RV32I-NEXT: sh a0, 14(sp)
2650; RV32I-NEXT: mv a0, s6
2651; RV32I-NEXT: mv a1, s3
2652; RV32I-NEXT: mv a3, s4
2653; RV32I-NEXT: mv a4, s5
2654; RV32I-NEXT: call __atomic_compare_exchange_2
2655; RV32I-NEXT: mv a1, a0
2656; RV32I-NEXT: lh a0, 14(sp)
2657; RV32I-NEXT: beqz a1, .LBB103_1
2658; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2659; RV32I-NEXT: lw s7, 16(sp)
2660; RV32I-NEXT: lw s6, 20(sp)
2661; RV32I-NEXT: lw s5, 24(sp)
2662; RV32I-NEXT: lw s4, 28(sp)
2663; RV32I-NEXT: lw s3, 32(sp)
2664; RV32I-NEXT: lw s2, 36(sp)
2665; RV32I-NEXT: lw s1, 40(sp)
2666; RV32I-NEXT: lw ra, 44(sp)
2667; RV32I-NEXT: addi sp, sp, 48
2668; RV32I-NEXT: ret
2669 %1 = atomicrmw umax i16* %a, i16 %b acq_rel
2670 ret i16 %1
2671}
2672
2673define i16 @atomicrmw_umax_i16_seq_cst(i16 *%a, i16 %b) nounwind {
2674; RV32I-LABEL: atomicrmw_umax_i16_seq_cst:
2675; RV32I: # %bb.0:
2676; RV32I-NEXT: addi sp, sp, -32
2677; RV32I-NEXT: sw ra, 28(sp)
2678; RV32I-NEXT: sw s1, 24(sp)
2679; RV32I-NEXT: sw s2, 20(sp)
2680; RV32I-NEXT: sw s3, 16(sp)
2681; RV32I-NEXT: sw s4, 12(sp)
2682; RV32I-NEXT: sw s5, 8(sp)
2683; RV32I-NEXT: sw s6, 4(sp)
2684; RV32I-NEXT: mv s2, a1
2685; RV32I-NEXT: mv s4, a0
2686; RV32I-NEXT: lhu a0, 0(a0)
2687; RV32I-NEXT: lui a1, 16
2688; RV32I-NEXT: addi s5, a1, -1
2689; RV32I-NEXT: and s6, s2, s5
2690; RV32I-NEXT: addi s3, sp, 2
2691; RV32I-NEXT: addi s1, zero, 5
2692; RV32I-NEXT: .LBB104_1: # %atomicrmw.start
2693; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2694; RV32I-NEXT: and a1, a0, s5
2695; RV32I-NEXT: mv a2, a0
2696; RV32I-NEXT: bltu s6, a1, .LBB104_3
2697; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2698; RV32I-NEXT: # in Loop: Header=BB104_1 Depth=1
2699; RV32I-NEXT: mv a2, s2
2700; RV32I-NEXT: .LBB104_3: # %atomicrmw.start
2701; RV32I-NEXT: # in Loop: Header=BB104_1 Depth=1
2702; RV32I-NEXT: sh a0, 2(sp)
2703; RV32I-NEXT: mv a0, s4
2704; RV32I-NEXT: mv a1, s3
2705; RV32I-NEXT: mv a3, s1
2706; RV32I-NEXT: mv a4, s1
2707; RV32I-NEXT: call __atomic_compare_exchange_2
2708; RV32I-NEXT: mv a1, a0
2709; RV32I-NEXT: lh a0, 2(sp)
2710; RV32I-NEXT: beqz a1, .LBB104_1
2711; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2712; RV32I-NEXT: lw s6, 4(sp)
2713; RV32I-NEXT: lw s5, 8(sp)
2714; RV32I-NEXT: lw s4, 12(sp)
2715; RV32I-NEXT: lw s3, 16(sp)
2716; RV32I-NEXT: lw s2, 20(sp)
2717; RV32I-NEXT: lw s1, 24(sp)
2718; RV32I-NEXT: lw ra, 28(sp)
2719; RV32I-NEXT: addi sp, sp, 32
2720; RV32I-NEXT: ret
2721 %1 = atomicrmw umax i16* %a, i16 %b seq_cst
2722 ret i16 %1
2723}
2724
2725define i16 @atomicrmw_umin_i16_monotonic(i16 *%a, i16 %b) nounwind {
2726; RV32I-LABEL: atomicrmw_umin_i16_monotonic:
2727; RV32I: # %bb.0:
2728; RV32I-NEXT: addi sp, sp, -32
2729; RV32I-NEXT: sw ra, 28(sp)
2730; RV32I-NEXT: sw s1, 24(sp)
2731; RV32I-NEXT: sw s2, 20(sp)
2732; RV32I-NEXT: sw s3, 16(sp)
2733; RV32I-NEXT: sw s4, 12(sp)
2734; RV32I-NEXT: sw s5, 8(sp)
2735; RV32I-NEXT: mv s2, a1
2736; RV32I-NEXT: mv s4, a0
2737; RV32I-NEXT: lhu a0, 0(a0)
2738; RV32I-NEXT: lui a1, 16
2739; RV32I-NEXT: addi s1, a1, -1
2740; RV32I-NEXT: and s5, s2, s1
2741; RV32I-NEXT: addi s3, sp, 6
2742; RV32I-NEXT: .LBB105_1: # %atomicrmw.start
2743; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2744; RV32I-NEXT: and a1, a0, s1
2745; RV32I-NEXT: mv a2, a0
2746; RV32I-NEXT: bgeu s5, a1, .LBB105_3
2747; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2748; RV32I-NEXT: # in Loop: Header=BB105_1 Depth=1
2749; RV32I-NEXT: mv a2, s2
2750; RV32I-NEXT: .LBB105_3: # %atomicrmw.start
2751; RV32I-NEXT: # in Loop: Header=BB105_1 Depth=1
2752; RV32I-NEXT: sh a0, 6(sp)
2753; RV32I-NEXT: mv a0, s4
2754; RV32I-NEXT: mv a1, s3
2755; RV32I-NEXT: mv a3, zero
2756; RV32I-NEXT: mv a4, zero
2757; RV32I-NEXT: call __atomic_compare_exchange_2
2758; RV32I-NEXT: mv a1, a0
2759; RV32I-NEXT: lh a0, 6(sp)
2760; RV32I-NEXT: beqz a1, .LBB105_1
2761; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2762; RV32I-NEXT: lw s5, 8(sp)
2763; RV32I-NEXT: lw s4, 12(sp)
2764; RV32I-NEXT: lw s3, 16(sp)
2765; RV32I-NEXT: lw s2, 20(sp)
2766; RV32I-NEXT: lw s1, 24(sp)
2767; RV32I-NEXT: lw ra, 28(sp)
2768; RV32I-NEXT: addi sp, sp, 32
2769; RV32I-NEXT: ret
2770 %1 = atomicrmw umin i16* %a, i16 %b monotonic
2771 ret i16 %1
2772}
2773
2774define i16 @atomicrmw_umin_i16_acquire(i16 *%a, i16 %b) nounwind {
2775; RV32I-LABEL: atomicrmw_umin_i16_acquire:
2776; RV32I: # %bb.0:
2777; RV32I-NEXT: addi sp, sp, -32
2778; RV32I-NEXT: sw ra, 28(sp)
2779; RV32I-NEXT: sw s1, 24(sp)
2780; RV32I-NEXT: sw s2, 20(sp)
2781; RV32I-NEXT: sw s3, 16(sp)
2782; RV32I-NEXT: sw s4, 12(sp)
2783; RV32I-NEXT: sw s5, 8(sp)
2784; RV32I-NEXT: sw s6, 4(sp)
2785; RV32I-NEXT: mv s2, a1
2786; RV32I-NEXT: mv s4, a0
2787; RV32I-NEXT: lhu a0, 0(a0)
2788; RV32I-NEXT: lui a1, 16
2789; RV32I-NEXT: addi s5, a1, -1
2790; RV32I-NEXT: and s6, s2, s5
2791; RV32I-NEXT: addi s3, sp, 2
2792; RV32I-NEXT: addi s1, zero, 2
2793; RV32I-NEXT: .LBB106_1: # %atomicrmw.start
2794; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2795; RV32I-NEXT: and a1, a0, s5
2796; RV32I-NEXT: mv a2, a0
2797; RV32I-NEXT: bgeu s6, a1, .LBB106_3
2798; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2799; RV32I-NEXT: # in Loop: Header=BB106_1 Depth=1
2800; RV32I-NEXT: mv a2, s2
2801; RV32I-NEXT: .LBB106_3: # %atomicrmw.start
2802; RV32I-NEXT: # in Loop: Header=BB106_1 Depth=1
2803; RV32I-NEXT: sh a0, 2(sp)
2804; RV32I-NEXT: mv a0, s4
2805; RV32I-NEXT: mv a1, s3
2806; RV32I-NEXT: mv a3, s1
2807; RV32I-NEXT: mv a4, s1
2808; RV32I-NEXT: call __atomic_compare_exchange_2
2809; RV32I-NEXT: mv a1, a0
2810; RV32I-NEXT: lh a0, 2(sp)
2811; RV32I-NEXT: beqz a1, .LBB106_1
2812; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2813; RV32I-NEXT: lw s6, 4(sp)
2814; RV32I-NEXT: lw s5, 8(sp)
2815; RV32I-NEXT: lw s4, 12(sp)
2816; RV32I-NEXT: lw s3, 16(sp)
2817; RV32I-NEXT: lw s2, 20(sp)
2818; RV32I-NEXT: lw s1, 24(sp)
2819; RV32I-NEXT: lw ra, 28(sp)
2820; RV32I-NEXT: addi sp, sp, 32
2821; RV32I-NEXT: ret
2822 %1 = atomicrmw umin i16* %a, i16 %b acquire
2823 ret i16 %1
2824}
2825
2826define i16 @atomicrmw_umin_i16_release(i16 *%a, i16 %b) nounwind {
2827; RV32I-LABEL: atomicrmw_umin_i16_release:
2828; RV32I: # %bb.0:
2829; RV32I-NEXT: addi sp, sp, -32
2830; RV32I-NEXT: sw ra, 28(sp)
2831; RV32I-NEXT: sw s1, 24(sp)
2832; RV32I-NEXT: sw s2, 20(sp)
2833; RV32I-NEXT: sw s3, 16(sp)
2834; RV32I-NEXT: sw s4, 12(sp)
2835; RV32I-NEXT: sw s5, 8(sp)
2836; RV32I-NEXT: sw s6, 4(sp)
2837; RV32I-NEXT: mv s2, a1
2838; RV32I-NEXT: mv s5, a0
2839; RV32I-NEXT: lhu a0, 0(a0)
2840; RV32I-NEXT: lui a1, 16
2841; RV32I-NEXT: addi s1, a1, -1
2842; RV32I-NEXT: and s6, s2, s1
2843; RV32I-NEXT: addi s3, sp, 2
2844; RV32I-NEXT: addi s4, zero, 3
2845; RV32I-NEXT: .LBB107_1: # %atomicrmw.start
2846; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2847; RV32I-NEXT: and a1, a0, s1
2848; RV32I-NEXT: mv a2, a0
2849; RV32I-NEXT: bgeu s6, a1, .LBB107_3
2850; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2851; RV32I-NEXT: # in Loop: Header=BB107_1 Depth=1
2852; RV32I-NEXT: mv a2, s2
2853; RV32I-NEXT: .LBB107_3: # %atomicrmw.start
2854; RV32I-NEXT: # in Loop: Header=BB107_1 Depth=1
2855; RV32I-NEXT: sh a0, 2(sp)
2856; RV32I-NEXT: mv a0, s5
2857; RV32I-NEXT: mv a1, s3
2858; RV32I-NEXT: mv a3, s4
2859; RV32I-NEXT: mv a4, zero
2860; RV32I-NEXT: call __atomic_compare_exchange_2
2861; RV32I-NEXT: mv a1, a0
2862; RV32I-NEXT: lh a0, 2(sp)
2863; RV32I-NEXT: beqz a1, .LBB107_1
2864; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2865; RV32I-NEXT: lw s6, 4(sp)
2866; RV32I-NEXT: lw s5, 8(sp)
2867; RV32I-NEXT: lw s4, 12(sp)
2868; RV32I-NEXT: lw s3, 16(sp)
2869; RV32I-NEXT: lw s2, 20(sp)
2870; RV32I-NEXT: lw s1, 24(sp)
2871; RV32I-NEXT: lw ra, 28(sp)
2872; RV32I-NEXT: addi sp, sp, 32
2873; RV32I-NEXT: ret
2874 %1 = atomicrmw umin i16* %a, i16 %b release
2875 ret i16 %1
2876}
2877
2878define i16 @atomicrmw_umin_i16_acq_rel(i16 *%a, i16 %b) nounwind {
2879; RV32I-LABEL: atomicrmw_umin_i16_acq_rel:
2880; RV32I: # %bb.0:
2881; RV32I-NEXT: addi sp, sp, -48
2882; RV32I-NEXT: sw ra, 44(sp)
2883; RV32I-NEXT: sw s1, 40(sp)
2884; RV32I-NEXT: sw s2, 36(sp)
2885; RV32I-NEXT: sw s3, 32(sp)
2886; RV32I-NEXT: sw s4, 28(sp)
2887; RV32I-NEXT: sw s5, 24(sp)
2888; RV32I-NEXT: sw s6, 20(sp)
2889; RV32I-NEXT: sw s7, 16(sp)
2890; RV32I-NEXT: mv s2, a1
2891; RV32I-NEXT: mv s6, a0
2892; RV32I-NEXT: lhu a0, 0(a0)
2893; RV32I-NEXT: lui a1, 16
2894; RV32I-NEXT: addi s1, a1, -1
2895; RV32I-NEXT: and s7, s2, s1
2896; RV32I-NEXT: addi s3, sp, 14
2897; RV32I-NEXT: addi s4, zero, 4
2898; RV32I-NEXT: addi s5, zero, 2
2899; RV32I-NEXT: .LBB108_1: # %atomicrmw.start
2900; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2901; RV32I-NEXT: and a1, a0, s1
2902; RV32I-NEXT: mv a2, a0
2903; RV32I-NEXT: bgeu s7, a1, .LBB108_3
2904; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2905; RV32I-NEXT: # in Loop: Header=BB108_1 Depth=1
2906; RV32I-NEXT: mv a2, s2
2907; RV32I-NEXT: .LBB108_3: # %atomicrmw.start
2908; RV32I-NEXT: # in Loop: Header=BB108_1 Depth=1
2909; RV32I-NEXT: sh a0, 14(sp)
2910; RV32I-NEXT: mv a0, s6
2911; RV32I-NEXT: mv a1, s3
2912; RV32I-NEXT: mv a3, s4
2913; RV32I-NEXT: mv a4, s5
2914; RV32I-NEXT: call __atomic_compare_exchange_2
2915; RV32I-NEXT: mv a1, a0
2916; RV32I-NEXT: lh a0, 14(sp)
2917; RV32I-NEXT: beqz a1, .LBB108_1
2918; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2919; RV32I-NEXT: lw s7, 16(sp)
2920; RV32I-NEXT: lw s6, 20(sp)
2921; RV32I-NEXT: lw s5, 24(sp)
2922; RV32I-NEXT: lw s4, 28(sp)
2923; RV32I-NEXT: lw s3, 32(sp)
2924; RV32I-NEXT: lw s2, 36(sp)
2925; RV32I-NEXT: lw s1, 40(sp)
2926; RV32I-NEXT: lw ra, 44(sp)
2927; RV32I-NEXT: addi sp, sp, 48
2928; RV32I-NEXT: ret
2929 %1 = atomicrmw umin i16* %a, i16 %b acq_rel
2930 ret i16 %1
2931}
2932
2933define i16 @atomicrmw_umin_i16_seq_cst(i16 *%a, i16 %b) nounwind {
2934; RV32I-LABEL: atomicrmw_umin_i16_seq_cst:
2935; RV32I: # %bb.0:
2936; RV32I-NEXT: addi sp, sp, -32
2937; RV32I-NEXT: sw ra, 28(sp)
2938; RV32I-NEXT: sw s1, 24(sp)
2939; RV32I-NEXT: sw s2, 20(sp)
2940; RV32I-NEXT: sw s3, 16(sp)
2941; RV32I-NEXT: sw s4, 12(sp)
2942; RV32I-NEXT: sw s5, 8(sp)
2943; RV32I-NEXT: sw s6, 4(sp)
2944; RV32I-NEXT: mv s2, a1
2945; RV32I-NEXT: mv s4, a0
2946; RV32I-NEXT: lhu a0, 0(a0)
2947; RV32I-NEXT: lui a1, 16
2948; RV32I-NEXT: addi s5, a1, -1
2949; RV32I-NEXT: and s6, s2, s5
2950; RV32I-NEXT: addi s3, sp, 2
2951; RV32I-NEXT: addi s1, zero, 5
2952; RV32I-NEXT: .LBB109_1: # %atomicrmw.start
2953; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2954; RV32I-NEXT: and a1, a0, s5
2955; RV32I-NEXT: mv a2, a0
2956; RV32I-NEXT: bgeu s6, a1, .LBB109_3
2957; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2958; RV32I-NEXT: # in Loop: Header=BB109_1 Depth=1
2959; RV32I-NEXT: mv a2, s2
2960; RV32I-NEXT: .LBB109_3: # %atomicrmw.start
2961; RV32I-NEXT: # in Loop: Header=BB109_1 Depth=1
2962; RV32I-NEXT: sh a0, 2(sp)
2963; RV32I-NEXT: mv a0, s4
2964; RV32I-NEXT: mv a1, s3
2965; RV32I-NEXT: mv a3, s1
2966; RV32I-NEXT: mv a4, s1
2967; RV32I-NEXT: call __atomic_compare_exchange_2
2968; RV32I-NEXT: mv a1, a0
2969; RV32I-NEXT: lh a0, 2(sp)
2970; RV32I-NEXT: beqz a1, .LBB109_1
2971; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2972; RV32I-NEXT: lw s6, 4(sp)
2973; RV32I-NEXT: lw s5, 8(sp)
2974; RV32I-NEXT: lw s4, 12(sp)
2975; RV32I-NEXT: lw s3, 16(sp)
2976; RV32I-NEXT: lw s2, 20(sp)
2977; RV32I-NEXT: lw s1, 24(sp)
2978; RV32I-NEXT: lw ra, 28(sp)
2979; RV32I-NEXT: addi sp, sp, 32
2980; RV32I-NEXT: ret
2981 %1 = atomicrmw umin i16* %a, i16 %b seq_cst
2982 ret i16 %1
2983}
2984
2985define i32 @atomicrmw_xchg_i32_monotonic(i32* %a, i32 %b) {
2986; RV32I-LABEL: atomicrmw_xchg_i32_monotonic:
2987; RV32I: # %bb.0:
2988; RV32I-NEXT: addi sp, sp, -16
2989; RV32I-NEXT: sw ra, 12(sp)
2990; RV32I-NEXT: mv a2, zero
2991; RV32I-NEXT: call __atomic_exchange_4
2992; RV32I-NEXT: lw ra, 12(sp)
2993; RV32I-NEXT: addi sp, sp, 16
2994; RV32I-NEXT: ret
2995 %1 = atomicrmw xchg i32* %a, i32 %b monotonic
2996 ret i32 %1
2997}
2998
2999define i32 @atomicrmw_xchg_i32_acquire(i32* %a, i32 %b) {
3000; RV32I-LABEL: atomicrmw_xchg_i32_acquire:
3001; RV32I: # %bb.0:
3002; RV32I-NEXT: addi sp, sp, -16
3003; RV32I-NEXT: sw ra, 12(sp)
3004; RV32I-NEXT: addi a2, zero, 2
3005; RV32I-NEXT: call __atomic_exchange_4
3006; RV32I-NEXT: lw ra, 12(sp)
3007; RV32I-NEXT: addi sp, sp, 16
3008; RV32I-NEXT: ret
3009 %1 = atomicrmw xchg i32* %a, i32 %b acquire
3010 ret i32 %1
3011}
3012
3013define i32 @atomicrmw_xchg_i32_release(i32* %a, i32 %b) {
3014; RV32I-LABEL: atomicrmw_xchg_i32_release:
3015; RV32I: # %bb.0:
3016; RV32I-NEXT: addi sp, sp, -16
3017; RV32I-NEXT: sw ra, 12(sp)
3018; RV32I-NEXT: addi a2, zero, 3
3019; RV32I-NEXT: call __atomic_exchange_4
3020; RV32I-NEXT: lw ra, 12(sp)
3021; RV32I-NEXT: addi sp, sp, 16
3022; RV32I-NEXT: ret
3023 %1 = atomicrmw xchg i32* %a, i32 %b release
3024 ret i32 %1
3025}
3026
3027define i32 @atomicrmw_xchg_i32_acq_rel(i32* %a, i32 %b) {
3028; RV32I-LABEL: atomicrmw_xchg_i32_acq_rel:
3029; RV32I: # %bb.0:
3030; RV32I-NEXT: addi sp, sp, -16
3031; RV32I-NEXT: sw ra, 12(sp)
3032; RV32I-NEXT: addi a2, zero, 4
3033; RV32I-NEXT: call __atomic_exchange_4
3034; RV32I-NEXT: lw ra, 12(sp)
3035; RV32I-NEXT: addi sp, sp, 16
3036; RV32I-NEXT: ret
3037 %1 = atomicrmw xchg i32* %a, i32 %b acq_rel
3038 ret i32 %1
3039}
3040
3041define i32 @atomicrmw_xchg_i32_seq_cst(i32* %a, i32 %b) {
3042; RV32I-LABEL: atomicrmw_xchg_i32_seq_cst:
3043; RV32I: # %bb.0:
3044; RV32I-NEXT: addi sp, sp, -16
3045; RV32I-NEXT: sw ra, 12(sp)
3046; RV32I-NEXT: addi a2, zero, 5
3047; RV32I-NEXT: call __atomic_exchange_4
3048; RV32I-NEXT: lw ra, 12(sp)
3049; RV32I-NEXT: addi sp, sp, 16
3050; RV32I-NEXT: ret
3051 %1 = atomicrmw xchg i32* %a, i32 %b seq_cst
3052 ret i32 %1
3053}
3054
3055define i32 @atomicrmw_add_i32_monotonic(i32 *%a, i32 %b) nounwind {
3056; RV32I-LABEL: atomicrmw_add_i32_monotonic:
3057; RV32I: # %bb.0:
3058; RV32I-NEXT: addi sp, sp, -16
3059; RV32I-NEXT: sw ra, 12(sp)
3060; RV32I-NEXT: mv a2, zero
3061; RV32I-NEXT: call __atomic_fetch_add_4
3062; RV32I-NEXT: lw ra, 12(sp)
3063; RV32I-NEXT: addi sp, sp, 16
3064; RV32I-NEXT: ret
3065 %1 = atomicrmw add i32* %a, i32 %b monotonic
3066 ret i32 %1
3067}
3068
3069define i32 @atomicrmw_add_i32_acquire(i32 *%a, i32 %b) nounwind {
3070; RV32I-LABEL: atomicrmw_add_i32_acquire:
3071; RV32I: # %bb.0:
3072; RV32I-NEXT: addi sp, sp, -16
3073; RV32I-NEXT: sw ra, 12(sp)
3074; RV32I-NEXT: addi a2, zero, 2
3075; RV32I-NEXT: call __atomic_fetch_add_4
3076; RV32I-NEXT: lw ra, 12(sp)
3077; RV32I-NEXT: addi sp, sp, 16
3078; RV32I-NEXT: ret
3079 %1 = atomicrmw add i32* %a, i32 %b acquire
3080 ret i32 %1
3081}
3082
3083define i32 @atomicrmw_add_i32_release(i32 *%a, i32 %b) nounwind {
3084; RV32I-LABEL: atomicrmw_add_i32_release:
3085; RV32I: # %bb.0:
3086; RV32I-NEXT: addi sp, sp, -16
3087; RV32I-NEXT: sw ra, 12(sp)
3088; RV32I-NEXT: addi a2, zero, 3
3089; RV32I-NEXT: call __atomic_fetch_add_4
3090; RV32I-NEXT: lw ra, 12(sp)
3091; RV32I-NEXT: addi sp, sp, 16
3092; RV32I-NEXT: ret
3093 %1 = atomicrmw add i32* %a, i32 %b release
3094 ret i32 %1
3095}
3096
3097define i32 @atomicrmw_add_i32_acq_rel(i32 *%a, i32 %b) nounwind {
3098; RV32I-LABEL: atomicrmw_add_i32_acq_rel:
3099; RV32I: # %bb.0:
3100; RV32I-NEXT: addi sp, sp, -16
3101; RV32I-NEXT: sw ra, 12(sp)
3102; RV32I-NEXT: addi a2, zero, 4
3103; RV32I-NEXT: call __atomic_fetch_add_4
3104; RV32I-NEXT: lw ra, 12(sp)
3105; RV32I-NEXT: addi sp, sp, 16
3106; RV32I-NEXT: ret
3107 %1 = atomicrmw add i32* %a, i32 %b acq_rel
3108 ret i32 %1
3109}
3110
3111define i32 @atomicrmw_add_i32_seq_cst(i32 *%a, i32 %b) nounwind {
3112; RV32I-LABEL: atomicrmw_add_i32_seq_cst:
3113; RV32I: # %bb.0:
3114; RV32I-NEXT: addi sp, sp, -16
3115; RV32I-NEXT: sw ra, 12(sp)
3116; RV32I-NEXT: addi a2, zero, 5
3117; RV32I-NEXT: call __atomic_fetch_add_4
3118; RV32I-NEXT: lw ra, 12(sp)
3119; RV32I-NEXT: addi sp, sp, 16
3120; RV32I-NEXT: ret
3121 %1 = atomicrmw add i32* %a, i32 %b seq_cst
3122 ret i32 %1
3123}
3124
3125define i32 @atomicrmw_sub_i32_monotonic(i32* %a, i32 %b) {
3126; RV32I-LABEL: atomicrmw_sub_i32_monotonic:
3127; RV32I: # %bb.0:
3128; RV32I-NEXT: addi sp, sp, -16
3129; RV32I-NEXT: sw ra, 12(sp)
3130; RV32I-NEXT: mv a2, zero
3131; RV32I-NEXT: call __atomic_fetch_sub_4
3132; RV32I-NEXT: lw ra, 12(sp)
3133; RV32I-NEXT: addi sp, sp, 16
3134; RV32I-NEXT: ret
3135 %1 = atomicrmw sub i32* %a, i32 %b monotonic
3136 ret i32 %1
3137}
3138
3139define i32 @atomicrmw_sub_i32_acquire(i32* %a, i32 %b) {
3140; RV32I-LABEL: atomicrmw_sub_i32_acquire:
3141; RV32I: # %bb.0:
3142; RV32I-NEXT: addi sp, sp, -16
3143; RV32I-NEXT: sw ra, 12(sp)
3144; RV32I-NEXT: addi a2, zero, 2
3145; RV32I-NEXT: call __atomic_fetch_sub_4
3146; RV32I-NEXT: lw ra, 12(sp)
3147; RV32I-NEXT: addi sp, sp, 16
3148; RV32I-NEXT: ret
3149 %1 = atomicrmw sub i32* %a, i32 %b acquire
3150 ret i32 %1
3151}
3152
3153define i32 @atomicrmw_sub_i32_release(i32* %a, i32 %b) {
3154; RV32I-LABEL: atomicrmw_sub_i32_release:
3155; RV32I: # %bb.0:
3156; RV32I-NEXT: addi sp, sp, -16
3157; RV32I-NEXT: sw ra, 12(sp)
3158; RV32I-NEXT: addi a2, zero, 3
3159; RV32I-NEXT: call __atomic_fetch_sub_4
3160; RV32I-NEXT: lw ra, 12(sp)
3161; RV32I-NEXT: addi sp, sp, 16
3162; RV32I-NEXT: ret
3163 %1 = atomicrmw sub i32* %a, i32 %b release
3164 ret i32 %1
3165}
3166
3167define i32 @atomicrmw_sub_i32_acq_rel(i32* %a, i32 %b) {
3168; RV32I-LABEL: atomicrmw_sub_i32_acq_rel:
3169; RV32I: # %bb.0:
3170; RV32I-NEXT: addi sp, sp, -16
3171; RV32I-NEXT: sw ra, 12(sp)
3172; RV32I-NEXT: addi a2, zero, 4
3173; RV32I-NEXT: call __atomic_fetch_sub_4
3174; RV32I-NEXT: lw ra, 12(sp)
3175; RV32I-NEXT: addi sp, sp, 16
3176; RV32I-NEXT: ret
3177 %1 = atomicrmw sub i32* %a, i32 %b acq_rel
3178 ret i32 %1
3179}
3180
3181define i32 @atomicrmw_sub_i32_seq_cst(i32* %a, i32 %b) {
3182; RV32I-LABEL: atomicrmw_sub_i32_seq_cst:
3183; RV32I: # %bb.0:
3184; RV32I-NEXT: addi sp, sp, -16
3185; RV32I-NEXT: sw ra, 12(sp)
3186; RV32I-NEXT: addi a2, zero, 5
3187; RV32I-NEXT: call __atomic_fetch_sub_4
3188; RV32I-NEXT: lw ra, 12(sp)
3189; RV32I-NEXT: addi sp, sp, 16
3190; RV32I-NEXT: ret
3191 %1 = atomicrmw sub i32* %a, i32 %b seq_cst
3192 ret i32 %1
3193}
3194
3195define i32 @atomicrmw_and_i32_monotonic(i32 *%a, i32 %b) nounwind {
3196; RV32I-LABEL: atomicrmw_and_i32_monotonic:
3197; RV32I: # %bb.0:
3198; RV32I-NEXT: addi sp, sp, -16
3199; RV32I-NEXT: sw ra, 12(sp)
3200; RV32I-NEXT: mv a2, zero
3201; RV32I-NEXT: call __atomic_fetch_and_4
3202; RV32I-NEXT: lw ra, 12(sp)
3203; RV32I-NEXT: addi sp, sp, 16
3204; RV32I-NEXT: ret
3205 %1 = atomicrmw and i32* %a, i32 %b monotonic
3206 ret i32 %1
3207}
3208
3209define i32 @atomicrmw_and_i32_acquire(i32 *%a, i32 %b) nounwind {
3210; RV32I-LABEL: atomicrmw_and_i32_acquire:
3211; RV32I: # %bb.0:
3212; RV32I-NEXT: addi sp, sp, -16
3213; RV32I-NEXT: sw ra, 12(sp)
3214; RV32I-NEXT: addi a2, zero, 2
3215; RV32I-NEXT: call __atomic_fetch_and_4
3216; RV32I-NEXT: lw ra, 12(sp)
3217; RV32I-NEXT: addi sp, sp, 16
3218; RV32I-NEXT: ret
3219 %1 = atomicrmw and i32* %a, i32 %b acquire
3220 ret i32 %1
3221}
3222
3223define i32 @atomicrmw_and_i32_release(i32 *%a, i32 %b) nounwind {
3224; RV32I-LABEL: atomicrmw_and_i32_release:
3225; RV32I: # %bb.0:
3226; RV32I-NEXT: addi sp, sp, -16
3227; RV32I-NEXT: sw ra, 12(sp)
3228; RV32I-NEXT: addi a2, zero, 3
3229; RV32I-NEXT: call __atomic_fetch_and_4
3230; RV32I-NEXT: lw ra, 12(sp)
3231; RV32I-NEXT: addi sp, sp, 16
3232; RV32I-NEXT: ret
3233 %1 = atomicrmw and i32* %a, i32 %b release
3234 ret i32 %1
3235}
3236
3237define i32 @atomicrmw_and_i32_acq_rel(i32 *%a, i32 %b) nounwind {
3238; RV32I-LABEL: atomicrmw_and_i32_acq_rel:
3239; RV32I: # %bb.0:
3240; RV32I-NEXT: addi sp, sp, -16
3241; RV32I-NEXT: sw ra, 12(sp)
3242; RV32I-NEXT: addi a2, zero, 4
3243; RV32I-NEXT: call __atomic_fetch_and_4
3244; RV32I-NEXT: lw ra, 12(sp)
3245; RV32I-NEXT: addi sp, sp, 16
3246; RV32I-NEXT: ret
3247 %1 = atomicrmw and i32* %a, i32 %b acq_rel
3248 ret i32 %1
3249}
3250
3251define i32 @atomicrmw_and_i32_seq_cst(i32 *%a, i32 %b) nounwind {
3252; RV32I-LABEL: atomicrmw_and_i32_seq_cst:
3253; RV32I: # %bb.0:
3254; RV32I-NEXT: addi sp, sp, -16
3255; RV32I-NEXT: sw ra, 12(sp)
3256; RV32I-NEXT: addi a2, zero, 5
3257; RV32I-NEXT: call __atomic_fetch_and_4
3258; RV32I-NEXT: lw ra, 12(sp)
3259; RV32I-NEXT: addi sp, sp, 16
3260; RV32I-NEXT: ret
3261 %1 = atomicrmw and i32* %a, i32 %b seq_cst
3262 ret i32 %1
3263}
3264
3265define i32 @atomicrmw_nand_i32_monotonic(i32* %a, i32 %b) {
3266; RV32I-LABEL: atomicrmw_nand_i32_monotonic:
3267; RV32I: # %bb.0:
3268; RV32I-NEXT: addi sp, sp, -16
3269; RV32I-NEXT: sw ra, 12(sp)
3270; RV32I-NEXT: mv a2, zero
3271; RV32I-NEXT: call __atomic_fetch_nand_4
3272; RV32I-NEXT: lw ra, 12(sp)
3273; RV32I-NEXT: addi sp, sp, 16
3274; RV32I-NEXT: ret
3275 %1 = atomicrmw nand i32* %a, i32 %b monotonic
3276 ret i32 %1
3277}
3278
3279define i32 @atomicrmw_nand_i32_acquire(i32* %a, i32 %b) {
3280; RV32I-LABEL: atomicrmw_nand_i32_acquire:
3281; RV32I: # %bb.0:
3282; RV32I-NEXT: addi sp, sp, -16
3283; RV32I-NEXT: sw ra, 12(sp)
3284; RV32I-NEXT: addi a2, zero, 2
3285; RV32I-NEXT: call __atomic_fetch_nand_4
3286; RV32I-NEXT: lw ra, 12(sp)
3287; RV32I-NEXT: addi sp, sp, 16
3288; RV32I-NEXT: ret
3289 %1 = atomicrmw nand i32* %a, i32 %b acquire
3290 ret i32 %1
3291}
3292
3293define i32 @atomicrmw_nand_i32_release(i32* %a, i32 %b) {
3294; RV32I-LABEL: atomicrmw_nand_i32_release:
3295; RV32I: # %bb.0:
3296; RV32I-NEXT: addi sp, sp, -16
3297; RV32I-NEXT: sw ra, 12(sp)
3298; RV32I-NEXT: addi a2, zero, 3
3299; RV32I-NEXT: call __atomic_fetch_nand_4
3300; RV32I-NEXT: lw ra, 12(sp)
3301; RV32I-NEXT: addi sp, sp, 16
3302; RV32I-NEXT: ret
3303 %1 = atomicrmw nand i32* %a, i32 %b release
3304 ret i32 %1
3305}
3306
3307define i32 @atomicrmw_nand_i32_acq_rel(i32* %a, i32 %b) {
3308; RV32I-LABEL: atomicrmw_nand_i32_acq_rel:
3309; RV32I: # %bb.0:
3310; RV32I-NEXT: addi sp, sp, -16
3311; RV32I-NEXT: sw ra, 12(sp)
3312; RV32I-NEXT: addi a2, zero, 4
3313; RV32I-NEXT: call __atomic_fetch_nand_4
3314; RV32I-NEXT: lw ra, 12(sp)
3315; RV32I-NEXT: addi sp, sp, 16
3316; RV32I-NEXT: ret
3317 %1 = atomicrmw nand i32* %a, i32 %b acq_rel
3318 ret i32 %1
3319}
3320
3321define i32 @atomicrmw_nand_i32_seq_cst(i32* %a, i32 %b) {
3322; RV32I-LABEL: atomicrmw_nand_i32_seq_cst:
3323; RV32I: # %bb.0:
3324; RV32I-NEXT: addi sp, sp, -16
3325; RV32I-NEXT: sw ra, 12(sp)
3326; RV32I-NEXT: addi a2, zero, 5
3327; RV32I-NEXT: call __atomic_fetch_nand_4
3328; RV32I-NEXT: lw ra, 12(sp)
3329; RV32I-NEXT: addi sp, sp, 16
3330; RV32I-NEXT: ret
3331 %1 = atomicrmw nand i32* %a, i32 %b seq_cst
3332 ret i32 %1
3333}
3334
3335define i32 @atomicrmw_or_i32_monotonic(i32 *%a, i32 %b) nounwind {
3336; RV32I-LABEL: atomicrmw_or_i32_monotonic:
3337; RV32I: # %bb.0:
3338; RV32I-NEXT: addi sp, sp, -16
3339; RV32I-NEXT: sw ra, 12(sp)
3340; RV32I-NEXT: mv a2, zero
3341; RV32I-NEXT: call __atomic_fetch_or_4
3342; RV32I-NEXT: lw ra, 12(sp)
3343; RV32I-NEXT: addi sp, sp, 16
3344; RV32I-NEXT: ret
3345 %1 = atomicrmw or i32* %a, i32 %b monotonic
3346 ret i32 %1
3347}
3348
3349define i32 @atomicrmw_or_i32_acquire(i32 *%a, i32 %b) nounwind {
3350; RV32I-LABEL: atomicrmw_or_i32_acquire:
3351; RV32I: # %bb.0:
3352; RV32I-NEXT: addi sp, sp, -16
3353; RV32I-NEXT: sw ra, 12(sp)
3354; RV32I-NEXT: addi a2, zero, 2
3355; RV32I-NEXT: call __atomic_fetch_or_4
3356; RV32I-NEXT: lw ra, 12(sp)
3357; RV32I-NEXT: addi sp, sp, 16
3358; RV32I-NEXT: ret
3359 %1 = atomicrmw or i32* %a, i32 %b acquire
3360 ret i32 %1
3361}
3362
3363define i32 @atomicrmw_or_i32_release(i32 *%a, i32 %b) nounwind {
3364; RV32I-LABEL: atomicrmw_or_i32_release:
3365; RV32I: # %bb.0:
3366; RV32I-NEXT: addi sp, sp, -16
3367; RV32I-NEXT: sw ra, 12(sp)
3368; RV32I-NEXT: addi a2, zero, 3
3369; RV32I-NEXT: call __atomic_fetch_or_4
3370; RV32I-NEXT: lw ra, 12(sp)
3371; RV32I-NEXT: addi sp, sp, 16
3372; RV32I-NEXT: ret
3373 %1 = atomicrmw or i32* %a, i32 %b release
3374 ret i32 %1
3375}
3376
3377define i32 @atomicrmw_or_i32_acq_rel(i32 *%a, i32 %b) nounwind {
3378; RV32I-LABEL: atomicrmw_or_i32_acq_rel:
3379; RV32I: # %bb.0:
3380; RV32I-NEXT: addi sp, sp, -16
3381; RV32I-NEXT: sw ra, 12(sp)
3382; RV32I-NEXT: addi a2, zero, 4
3383; RV32I-NEXT: call __atomic_fetch_or_4
3384; RV32I-NEXT: lw ra, 12(sp)
3385; RV32I-NEXT: addi sp, sp, 16
3386; RV32I-NEXT: ret
3387 %1 = atomicrmw or i32* %a, i32 %b acq_rel
3388 ret i32 %1
3389}
3390
3391define i32 @atomicrmw_or_i32_seq_cst(i32 *%a, i32 %b) nounwind {
3392; RV32I-LABEL: atomicrmw_or_i32_seq_cst:
3393; RV32I: # %bb.0:
3394; RV32I-NEXT: addi sp, sp, -16
3395; RV32I-NEXT: sw ra, 12(sp)
3396; RV32I-NEXT: addi a2, zero, 5
3397; RV32I-NEXT: call __atomic_fetch_or_4
3398; RV32I-NEXT: lw ra, 12(sp)
3399; RV32I-NEXT: addi sp, sp, 16
3400; RV32I-NEXT: ret
3401 %1 = atomicrmw or i32* %a, i32 %b seq_cst
3402 ret i32 %1
3403}
3404
3405define i32 @atomicrmw_xor_i32_monotonic(i32 *%a, i32 %b) nounwind {
3406; RV32I-LABEL: atomicrmw_xor_i32_monotonic:
3407; RV32I: # %bb.0:
3408; RV32I-NEXT: addi sp, sp, -16
3409; RV32I-NEXT: sw ra, 12(sp)
3410; RV32I-NEXT: mv a2, zero
3411; RV32I-NEXT: call __atomic_fetch_xor_4
3412; RV32I-NEXT: lw ra, 12(sp)
3413; RV32I-NEXT: addi sp, sp, 16
3414; RV32I-NEXT: ret
3415 %1 = atomicrmw xor i32* %a, i32 %b monotonic
3416 ret i32 %1
3417}
3418
3419define i32 @atomicrmw_xor_i32_acquire(i32 *%a, i32 %b) nounwind {
3420; RV32I-LABEL: atomicrmw_xor_i32_acquire:
3421; RV32I: # %bb.0:
3422; RV32I-NEXT: addi sp, sp, -16
3423; RV32I-NEXT: sw ra, 12(sp)
3424; RV32I-NEXT: addi a2, zero, 2
3425; RV32I-NEXT: call __atomic_fetch_xor_4
3426; RV32I-NEXT: lw ra, 12(sp)
3427; RV32I-NEXT: addi sp, sp, 16
3428; RV32I-NEXT: ret
3429 %1 = atomicrmw xor i32* %a, i32 %b acquire
3430 ret i32 %1
3431}
3432
3433define i32 @atomicrmw_xor_i32_release(i32 *%a, i32 %b) nounwind {
3434; RV32I-LABEL: atomicrmw_xor_i32_release:
3435; RV32I: # %bb.0:
3436; RV32I-NEXT: addi sp, sp, -16
3437; RV32I-NEXT: sw ra, 12(sp)
3438; RV32I-NEXT: addi a2, zero, 3
3439; RV32I-NEXT: call __atomic_fetch_xor_4
3440; RV32I-NEXT: lw ra, 12(sp)
3441; RV32I-NEXT: addi sp, sp, 16
3442; RV32I-NEXT: ret
3443 %1 = atomicrmw xor i32* %a, i32 %b release
3444 ret i32 %1
3445}
3446
3447define i32 @atomicrmw_xor_i32_acq_rel(i32 *%a, i32 %b) nounwind {
3448; RV32I-LABEL: atomicrmw_xor_i32_acq_rel:
3449; RV32I: # %bb.0:
3450; RV32I-NEXT: addi sp, sp, -16
3451; RV32I-NEXT: sw ra, 12(sp)
3452; RV32I-NEXT: addi a2, zero, 4
3453; RV32I-NEXT: call __atomic_fetch_xor_4
3454; RV32I-NEXT: lw ra, 12(sp)
3455; RV32I-NEXT: addi sp, sp, 16
3456; RV32I-NEXT: ret
3457 %1 = atomicrmw xor i32* %a, i32 %b acq_rel
3458 ret i32 %1
3459}
3460
3461define i32 @atomicrmw_xor_i32_seq_cst(i32 *%a, i32 %b) nounwind {
3462; RV32I-LABEL: atomicrmw_xor_i32_seq_cst:
3463; RV32I: # %bb.0:
3464; RV32I-NEXT: addi sp, sp, -16
3465; RV32I-NEXT: sw ra, 12(sp)
3466; RV32I-NEXT: addi a2, zero, 5
3467; RV32I-NEXT: call __atomic_fetch_xor_4
3468; RV32I-NEXT: lw ra, 12(sp)
3469; RV32I-NEXT: addi sp, sp, 16
3470; RV32I-NEXT: ret
3471 %1 = atomicrmw xor i32* %a, i32 %b seq_cst
3472 ret i32 %1
3473}
3474
3475define i32 @atomicrmw_max_i32_monotonic(i32 *%a, i32 %b) nounwind {
3476; RV32I-LABEL: atomicrmw_max_i32_monotonic:
3477; RV32I: # %bb.0:
3478; RV32I-NEXT: addi sp, sp, -32
3479; RV32I-NEXT: sw ra, 28(sp)
3480; RV32I-NEXT: sw s1, 24(sp)
3481; RV32I-NEXT: sw s2, 20(sp)
3482; RV32I-NEXT: sw s3, 16(sp)
3483; RV32I-NEXT: mv s1, a1
3484; RV32I-NEXT: mv s2, a0
3485; RV32I-NEXT: lw a2, 0(a0)
3486; RV32I-NEXT: addi s3, sp, 12
3487; RV32I-NEXT: .LBB145_1: # %atomicrmw.start
3488; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3489; RV32I-NEXT: sw a2, 12(sp)
3490; RV32I-NEXT: blt s1, a2, .LBB145_3
3491; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3492; RV32I-NEXT: # in Loop: Header=BB145_1 Depth=1
3493; RV32I-NEXT: mv a2, s1
3494; RV32I-NEXT: .LBB145_3: # %atomicrmw.start
3495; RV32I-NEXT: # in Loop: Header=BB145_1 Depth=1
3496; RV32I-NEXT: mv a0, s2
3497; RV32I-NEXT: mv a1, s3
3498; RV32I-NEXT: mv a3, zero
3499; RV32I-NEXT: mv a4, zero
3500; RV32I-NEXT: call __atomic_compare_exchange_4
3501; RV32I-NEXT: lw a2, 12(sp)
3502; RV32I-NEXT: beqz a0, .LBB145_1
3503; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3504; RV32I-NEXT: mv a0, a2
3505; RV32I-NEXT: lw s3, 16(sp)
3506; RV32I-NEXT: lw s2, 20(sp)
3507; RV32I-NEXT: lw s1, 24(sp)
3508; RV32I-NEXT: lw ra, 28(sp)
3509; RV32I-NEXT: addi sp, sp, 32
3510; RV32I-NEXT: ret
3511 %1 = atomicrmw max i32* %a, i32 %b monotonic
3512 ret i32 %1
3513}
3514
3515define i32 @atomicrmw_max_i32_acquire(i32 *%a, i32 %b) nounwind {
3516; RV32I-LABEL: atomicrmw_max_i32_acquire:
3517; RV32I: # %bb.0:
3518; RV32I-NEXT: addi sp, sp, -32
3519; RV32I-NEXT: sw ra, 28(sp)
3520; RV32I-NEXT: sw s1, 24(sp)
3521; RV32I-NEXT: sw s2, 20(sp)
3522; RV32I-NEXT: sw s3, 16(sp)
3523; RV32I-NEXT: sw s4, 12(sp)
3524; RV32I-NEXT: mv s1, a1
3525; RV32I-NEXT: mv s2, a0
3526; RV32I-NEXT: lw a2, 0(a0)
3527; RV32I-NEXT: addi s3, sp, 8
3528; RV32I-NEXT: addi s4, zero, 2
3529; RV32I-NEXT: .LBB146_1: # %atomicrmw.start
3530; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3531; RV32I-NEXT: sw a2, 8(sp)
3532; RV32I-NEXT: blt s1, a2, .LBB146_3
3533; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3534; RV32I-NEXT: # in Loop: Header=BB146_1 Depth=1
3535; RV32I-NEXT: mv a2, s1
3536; RV32I-NEXT: .LBB146_3: # %atomicrmw.start
3537; RV32I-NEXT: # in Loop: Header=BB146_1 Depth=1
3538; RV32I-NEXT: mv a0, s2
3539; RV32I-NEXT: mv a1, s3
3540; RV32I-NEXT: mv a3, s4
3541; RV32I-NEXT: mv a4, s4
3542; RV32I-NEXT: call __atomic_compare_exchange_4
3543; RV32I-NEXT: lw a2, 8(sp)
3544; RV32I-NEXT: beqz a0, .LBB146_1
3545; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3546; RV32I-NEXT: mv a0, a2
3547; RV32I-NEXT: lw s4, 12(sp)
3548; RV32I-NEXT: lw s3, 16(sp)
3549; RV32I-NEXT: lw s2, 20(sp)
3550; RV32I-NEXT: lw s1, 24(sp)
3551; RV32I-NEXT: lw ra, 28(sp)
3552; RV32I-NEXT: addi sp, sp, 32
3553; RV32I-NEXT: ret
3554 %1 = atomicrmw max i32* %a, i32 %b acquire
3555 ret i32 %1
3556}
3557
3558define i32 @atomicrmw_max_i32_release(i32 *%a, i32 %b) nounwind {
3559; RV32I-LABEL: atomicrmw_max_i32_release:
3560; RV32I: # %bb.0:
3561; RV32I-NEXT: addi sp, sp, -32
3562; RV32I-NEXT: sw ra, 28(sp)
3563; RV32I-NEXT: sw s1, 24(sp)
3564; RV32I-NEXT: sw s2, 20(sp)
3565; RV32I-NEXT: sw s3, 16(sp)
3566; RV32I-NEXT: sw s4, 12(sp)
3567; RV32I-NEXT: mv s1, a1
3568; RV32I-NEXT: mv s2, a0
3569; RV32I-NEXT: lw a2, 0(a0)
3570; RV32I-NEXT: addi s3, sp, 8
3571; RV32I-NEXT: addi s4, zero, 3
3572; RV32I-NEXT: .LBB147_1: # %atomicrmw.start
3573; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3574; RV32I-NEXT: sw a2, 8(sp)
3575; RV32I-NEXT: blt s1, a2, .LBB147_3
3576; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3577; RV32I-NEXT: # in Loop: Header=BB147_1 Depth=1
3578; RV32I-NEXT: mv a2, s1
3579; RV32I-NEXT: .LBB147_3: # %atomicrmw.start
3580; RV32I-NEXT: # in Loop: Header=BB147_1 Depth=1
3581; RV32I-NEXT: mv a0, s2
3582; RV32I-NEXT: mv a1, s3
3583; RV32I-NEXT: mv a3, s4
3584; RV32I-NEXT: mv a4, zero
3585; RV32I-NEXT: call __atomic_compare_exchange_4
3586; RV32I-NEXT: lw a2, 8(sp)
3587; RV32I-NEXT: beqz a0, .LBB147_1
3588; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3589; RV32I-NEXT: mv a0, a2
3590; RV32I-NEXT: lw s4, 12(sp)
3591; RV32I-NEXT: lw s3, 16(sp)
3592; RV32I-NEXT: lw s2, 20(sp)
3593; RV32I-NEXT: lw s1, 24(sp)
3594; RV32I-NEXT: lw ra, 28(sp)
3595; RV32I-NEXT: addi sp, sp, 32
3596; RV32I-NEXT: ret
3597 %1 = atomicrmw max i32* %a, i32 %b release
3598 ret i32 %1
3599}
3600
3601define i32 @atomicrmw_max_i32_acq_rel(i32 *%a, i32 %b) nounwind {
3602; RV32I-LABEL: atomicrmw_max_i32_acq_rel:
3603; RV32I: # %bb.0:
3604; RV32I-NEXT: addi sp, sp, -32
3605; RV32I-NEXT: sw ra, 28(sp)
3606; RV32I-NEXT: sw s1, 24(sp)
3607; RV32I-NEXT: sw s2, 20(sp)
3608; RV32I-NEXT: sw s3, 16(sp)
3609; RV32I-NEXT: sw s4, 12(sp)
3610; RV32I-NEXT: sw s5, 8(sp)
3611; RV32I-NEXT: mv s1, a1
3612; RV32I-NEXT: mv s2, a0
3613; RV32I-NEXT: lw a2, 0(a0)
3614; RV32I-NEXT: addi s3, sp, 4
3615; RV32I-NEXT: addi s4, zero, 4
3616; RV32I-NEXT: addi s5, zero, 2
3617; RV32I-NEXT: .LBB148_1: # %atomicrmw.start
3618; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3619; RV32I-NEXT: sw a2, 4(sp)
3620; RV32I-NEXT: blt s1, a2, .LBB148_3
3621; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3622; RV32I-NEXT: # in Loop: Header=BB148_1 Depth=1
3623; RV32I-NEXT: mv a2, s1
3624; RV32I-NEXT: .LBB148_3: # %atomicrmw.start
3625; RV32I-NEXT: # in Loop: Header=BB148_1 Depth=1
3626; RV32I-NEXT: mv a0, s2
3627; RV32I-NEXT: mv a1, s3
3628; RV32I-NEXT: mv a3, s4
3629; RV32I-NEXT: mv a4, s5
3630; RV32I-NEXT: call __atomic_compare_exchange_4
3631; RV32I-NEXT: lw a2, 4(sp)
3632; RV32I-NEXT: beqz a0, .LBB148_1
3633; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3634; RV32I-NEXT: mv a0, a2
3635; RV32I-NEXT: lw s5, 8(sp)
3636; RV32I-NEXT: lw s4, 12(sp)
3637; RV32I-NEXT: lw s3, 16(sp)
3638; RV32I-NEXT: lw s2, 20(sp)
3639; RV32I-NEXT: lw s1, 24(sp)
3640; RV32I-NEXT: lw ra, 28(sp)
3641; RV32I-NEXT: addi sp, sp, 32
3642; RV32I-NEXT: ret
3643 %1 = atomicrmw max i32* %a, i32 %b acq_rel
3644 ret i32 %1
3645}
3646
3647define i32 @atomicrmw_max_i32_seq_cst(i32 *%a, i32 %b) nounwind {
3648; RV32I-LABEL: atomicrmw_max_i32_seq_cst:
3649; RV32I: # %bb.0:
3650; RV32I-NEXT: addi sp, sp, -32
3651; RV32I-NEXT: sw ra, 28(sp)
3652; RV32I-NEXT: sw s1, 24(sp)
3653; RV32I-NEXT: sw s2, 20(sp)
3654; RV32I-NEXT: sw s3, 16(sp)
3655; RV32I-NEXT: sw s4, 12(sp)
3656; RV32I-NEXT: mv s1, a1
3657; RV32I-NEXT: mv s2, a0
3658; RV32I-NEXT: lw a2, 0(a0)
3659; RV32I-NEXT: addi s3, sp, 8
3660; RV32I-NEXT: addi s4, zero, 5
3661; RV32I-NEXT: .LBB149_1: # %atomicrmw.start
3662; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3663; RV32I-NEXT: sw a2, 8(sp)
3664; RV32I-NEXT: blt s1, a2, .LBB149_3
3665; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3666; RV32I-NEXT: # in Loop: Header=BB149_1 Depth=1
3667; RV32I-NEXT: mv a2, s1
3668; RV32I-NEXT: .LBB149_3: # %atomicrmw.start
3669; RV32I-NEXT: # in Loop: Header=BB149_1 Depth=1
3670; RV32I-NEXT: mv a0, s2
3671; RV32I-NEXT: mv a1, s3
3672; RV32I-NEXT: mv a3, s4
3673; RV32I-NEXT: mv a4, s4
3674; RV32I-NEXT: call __atomic_compare_exchange_4
3675; RV32I-NEXT: lw a2, 8(sp)
3676; RV32I-NEXT: beqz a0, .LBB149_1
3677; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3678; RV32I-NEXT: mv a0, a2
3679; RV32I-NEXT: lw s4, 12(sp)
3680; RV32I-NEXT: lw s3, 16(sp)
3681; RV32I-NEXT: lw s2, 20(sp)
3682; RV32I-NEXT: lw s1, 24(sp)
3683; RV32I-NEXT: lw ra, 28(sp)
3684; RV32I-NEXT: addi sp, sp, 32
3685; RV32I-NEXT: ret
3686 %1 = atomicrmw max i32* %a, i32 %b seq_cst
3687 ret i32 %1
3688}
3689
3690define i32 @atomicrmw_min_i32_monotonic(i32 *%a, i32 %b) nounwind {
3691; RV32I-LABEL: atomicrmw_min_i32_monotonic:
3692; RV32I: # %bb.0:
3693; RV32I-NEXT: addi sp, sp, -32
3694; RV32I-NEXT: sw ra, 28(sp)
3695; RV32I-NEXT: sw s1, 24(sp)
3696; RV32I-NEXT: sw s2, 20(sp)
3697; RV32I-NEXT: sw s3, 16(sp)
3698; RV32I-NEXT: mv s1, a1
3699; RV32I-NEXT: mv s2, a0
3700; RV32I-NEXT: lw a2, 0(a0)
3701; RV32I-NEXT: addi s3, sp, 12
3702; RV32I-NEXT: .LBB150_1: # %atomicrmw.start
3703; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3704; RV32I-NEXT: sw a2, 12(sp)
3705; RV32I-NEXT: bge s1, a2, .LBB150_3
3706; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3707; RV32I-NEXT: # in Loop: Header=BB150_1 Depth=1
3708; RV32I-NEXT: mv a2, s1
3709; RV32I-NEXT: .LBB150_3: # %atomicrmw.start
3710; RV32I-NEXT: # in Loop: Header=BB150_1 Depth=1
3711; RV32I-NEXT: mv a0, s2
3712; RV32I-NEXT: mv a1, s3
3713; RV32I-NEXT: mv a3, zero
3714; RV32I-NEXT: mv a4, zero
3715; RV32I-NEXT: call __atomic_compare_exchange_4
3716; RV32I-NEXT: lw a2, 12(sp)
3717; RV32I-NEXT: beqz a0, .LBB150_1
3718; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3719; RV32I-NEXT: mv a0, a2
3720; RV32I-NEXT: lw s3, 16(sp)
3721; RV32I-NEXT: lw s2, 20(sp)
3722; RV32I-NEXT: lw s1, 24(sp)
3723; RV32I-NEXT: lw ra, 28(sp)
3724; RV32I-NEXT: addi sp, sp, 32
3725; RV32I-NEXT: ret
3726 %1 = atomicrmw min i32* %a, i32 %b monotonic
3727 ret i32 %1
3728}
3729
3730define i32 @atomicrmw_min_i32_acquire(i32 *%a, i32 %b) nounwind {
3731; RV32I-LABEL: atomicrmw_min_i32_acquire:
3732; RV32I: # %bb.0:
3733; RV32I-NEXT: addi sp, sp, -32
3734; RV32I-NEXT: sw ra, 28(sp)
3735; RV32I-NEXT: sw s1, 24(sp)
3736; RV32I-NEXT: sw s2, 20(sp)
3737; RV32I-NEXT: sw s3, 16(sp)
3738; RV32I-NEXT: sw s4, 12(sp)
3739; RV32I-NEXT: mv s1, a1
3740; RV32I-NEXT: mv s2, a0
3741; RV32I-NEXT: lw a2, 0(a0)
3742; RV32I-NEXT: addi s3, sp, 8
3743; RV32I-NEXT: addi s4, zero, 2
3744; RV32I-NEXT: .LBB151_1: # %atomicrmw.start
3745; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3746; RV32I-NEXT: sw a2, 8(sp)
3747; RV32I-NEXT: bge s1, a2, .LBB151_3
3748; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3749; RV32I-NEXT: # in Loop: Header=BB151_1 Depth=1
3750; RV32I-NEXT: mv a2, s1
3751; RV32I-NEXT: .LBB151_3: # %atomicrmw.start
3752; RV32I-NEXT: # in Loop: Header=BB151_1 Depth=1
3753; RV32I-NEXT: mv a0, s2
3754; RV32I-NEXT: mv a1, s3
3755; RV32I-NEXT: mv a3, s4
3756; RV32I-NEXT: mv a4, s4
3757; RV32I-NEXT: call __atomic_compare_exchange_4
3758; RV32I-NEXT: lw a2, 8(sp)
3759; RV32I-NEXT: beqz a0, .LBB151_1
3760; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3761; RV32I-NEXT: mv a0, a2
3762; RV32I-NEXT: lw s4, 12(sp)
3763; RV32I-NEXT: lw s3, 16(sp)
3764; RV32I-NEXT: lw s2, 20(sp)
3765; RV32I-NEXT: lw s1, 24(sp)
3766; RV32I-NEXT: lw ra, 28(sp)
3767; RV32I-NEXT: addi sp, sp, 32
3768; RV32I-NEXT: ret
3769 %1 = atomicrmw min i32* %a, i32 %b acquire
3770 ret i32 %1
3771}
3772
3773define i32 @atomicrmw_min_i32_release(i32 *%a, i32 %b) nounwind {
3774; RV32I-LABEL: atomicrmw_min_i32_release:
3775; RV32I: # %bb.0:
3776; RV32I-NEXT: addi sp, sp, -32
3777; RV32I-NEXT: sw ra, 28(sp)
3778; RV32I-NEXT: sw s1, 24(sp)
3779; RV32I-NEXT: sw s2, 20(sp)
3780; RV32I-NEXT: sw s3, 16(sp)
3781; RV32I-NEXT: sw s4, 12(sp)
3782; RV32I-NEXT: mv s1, a1
3783; RV32I-NEXT: mv s2, a0
3784; RV32I-NEXT: lw a2, 0(a0)
3785; RV32I-NEXT: addi s3, sp, 8
3786; RV32I-NEXT: addi s4, zero, 3
3787; RV32I-NEXT: .LBB152_1: # %atomicrmw.start
3788; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3789; RV32I-NEXT: sw a2, 8(sp)
3790; RV32I-NEXT: bge s1, a2, .LBB152_3
3791; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3792; RV32I-NEXT: # in Loop: Header=BB152_1 Depth=1
3793; RV32I-NEXT: mv a2, s1
3794; RV32I-NEXT: .LBB152_3: # %atomicrmw.start
3795; RV32I-NEXT: # in Loop: Header=BB152_1 Depth=1
3796; RV32I-NEXT: mv a0, s2
3797; RV32I-NEXT: mv a1, s3
3798; RV32I-NEXT: mv a3, s4
3799; RV32I-NEXT: mv a4, zero
3800; RV32I-NEXT: call __atomic_compare_exchange_4
3801; RV32I-NEXT: lw a2, 8(sp)
3802; RV32I-NEXT: beqz a0, .LBB152_1
3803; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3804; RV32I-NEXT: mv a0, a2
3805; RV32I-NEXT: lw s4, 12(sp)
3806; RV32I-NEXT: lw s3, 16(sp)
3807; RV32I-NEXT: lw s2, 20(sp)
3808; RV32I-NEXT: lw s1, 24(sp)
3809; RV32I-NEXT: lw ra, 28(sp)
3810; RV32I-NEXT: addi sp, sp, 32
3811; RV32I-NEXT: ret
3812 %1 = atomicrmw min i32* %a, i32 %b release
3813 ret i32 %1
3814}
3815
3816define i32 @atomicrmw_min_i32_acq_rel(i32 *%a, i32 %b) nounwind {
3817; RV32I-LABEL: atomicrmw_min_i32_acq_rel:
3818; RV32I: # %bb.0:
3819; RV32I-NEXT: addi sp, sp, -32
3820; RV32I-NEXT: sw ra, 28(sp)
3821; RV32I-NEXT: sw s1, 24(sp)
3822; RV32I-NEXT: sw s2, 20(sp)
3823; RV32I-NEXT: sw s3, 16(sp)
3824; RV32I-NEXT: sw s4, 12(sp)
3825; RV32I-NEXT: sw s5, 8(sp)
3826; RV32I-NEXT: mv s1, a1
3827; RV32I-NEXT: mv s2, a0
3828; RV32I-NEXT: lw a2, 0(a0)
3829; RV32I-NEXT: addi s3, sp, 4
3830; RV32I-NEXT: addi s4, zero, 4
3831; RV32I-NEXT: addi s5, zero, 2
3832; RV32I-NEXT: .LBB153_1: # %atomicrmw.start
3833; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3834; RV32I-NEXT: sw a2, 4(sp)
3835; RV32I-NEXT: bge s1, a2, .LBB153_3
3836; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3837; RV32I-NEXT: # in Loop: Header=BB153_1 Depth=1
3838; RV32I-NEXT: mv a2, s1
3839; RV32I-NEXT: .LBB153_3: # %atomicrmw.start
3840; RV32I-NEXT: # in Loop: Header=BB153_1 Depth=1
3841; RV32I-NEXT: mv a0, s2
3842; RV32I-NEXT: mv a1, s3
3843; RV32I-NEXT: mv a3, s4
3844; RV32I-NEXT: mv a4, s5
3845; RV32I-NEXT: call __atomic_compare_exchange_4
3846; RV32I-NEXT: lw a2, 4(sp)
3847; RV32I-NEXT: beqz a0, .LBB153_1
3848; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3849; RV32I-NEXT: mv a0, a2
3850; RV32I-NEXT: lw s5, 8(sp)
3851; RV32I-NEXT: lw s4, 12(sp)
3852; RV32I-NEXT: lw s3, 16(sp)
3853; RV32I-NEXT: lw s2, 20(sp)
3854; RV32I-NEXT: lw s1, 24(sp)
3855; RV32I-NEXT: lw ra, 28(sp)
3856; RV32I-NEXT: addi sp, sp, 32
3857; RV32I-NEXT: ret
3858 %1 = atomicrmw min i32* %a, i32 %b acq_rel
3859 ret i32 %1
3860}
3861
3862define i32 @atomicrmw_min_i32_seq_cst(i32 *%a, i32 %b) nounwind {
3863; RV32I-LABEL: atomicrmw_min_i32_seq_cst:
3864; RV32I: # %bb.0:
3865; RV32I-NEXT: addi sp, sp, -32
3866; RV32I-NEXT: sw ra, 28(sp)
3867; RV32I-NEXT: sw s1, 24(sp)
3868; RV32I-NEXT: sw s2, 20(sp)
3869; RV32I-NEXT: sw s3, 16(sp)
3870; RV32I-NEXT: sw s4, 12(sp)
3871; RV32I-NEXT: mv s1, a1
3872; RV32I-NEXT: mv s2, a0
3873; RV32I-NEXT: lw a2, 0(a0)
3874; RV32I-NEXT: addi s3, sp, 8
3875; RV32I-NEXT: addi s4, zero, 5
3876; RV32I-NEXT: .LBB154_1: # %atomicrmw.start
3877; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3878; RV32I-NEXT: sw a2, 8(sp)
3879; RV32I-NEXT: bge s1, a2, .LBB154_3
3880; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3881; RV32I-NEXT: # in Loop: Header=BB154_1 Depth=1
3882; RV32I-NEXT: mv a2, s1
3883; RV32I-NEXT: .LBB154_3: # %atomicrmw.start
3884; RV32I-NEXT: # in Loop: Header=BB154_1 Depth=1
3885; RV32I-NEXT: mv a0, s2
3886; RV32I-NEXT: mv a1, s3
3887; RV32I-NEXT: mv a3, s4
3888; RV32I-NEXT: mv a4, s4
3889; RV32I-NEXT: call __atomic_compare_exchange_4
3890; RV32I-NEXT: lw a2, 8(sp)
3891; RV32I-NEXT: beqz a0, .LBB154_1
3892; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3893; RV32I-NEXT: mv a0, a2
3894; RV32I-NEXT: lw s4, 12(sp)
3895; RV32I-NEXT: lw s3, 16(sp)
3896; RV32I-NEXT: lw s2, 20(sp)
3897; RV32I-NEXT: lw s1, 24(sp)
3898; RV32I-NEXT: lw ra, 28(sp)
3899; RV32I-NEXT: addi sp, sp, 32
3900; RV32I-NEXT: ret
3901 %1 = atomicrmw min i32* %a, i32 %b seq_cst
3902 ret i32 %1
3903}
3904
3905define i32 @atomicrmw_umax_i32_monotonic(i32 *%a, i32 %b) nounwind {
3906; RV32I-LABEL: atomicrmw_umax_i32_monotonic:
3907; RV32I: # %bb.0:
3908; RV32I-NEXT: addi sp, sp, -32
3909; RV32I-NEXT: sw ra, 28(sp)
3910; RV32I-NEXT: sw s1, 24(sp)
3911; RV32I-NEXT: sw s2, 20(sp)
3912; RV32I-NEXT: sw s3, 16(sp)
3913; RV32I-NEXT: mv s1, a1
3914; RV32I-NEXT: mv s2, a0
3915; RV32I-NEXT: lw a2, 0(a0)
3916; RV32I-NEXT: addi s3, sp, 12
3917; RV32I-NEXT: .LBB155_1: # %atomicrmw.start
3918; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3919; RV32I-NEXT: sw a2, 12(sp)
3920; RV32I-NEXT: bltu s1, a2, .LBB155_3
3921; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3922; RV32I-NEXT: # in Loop: Header=BB155_1 Depth=1
3923; RV32I-NEXT: mv a2, s1
3924; RV32I-NEXT: .LBB155_3: # %atomicrmw.start
3925; RV32I-NEXT: # in Loop: Header=BB155_1 Depth=1
3926; RV32I-NEXT: mv a0, s2
3927; RV32I-NEXT: mv a1, s3
3928; RV32I-NEXT: mv a3, zero
3929; RV32I-NEXT: mv a4, zero
3930; RV32I-NEXT: call __atomic_compare_exchange_4
3931; RV32I-NEXT: lw a2, 12(sp)
3932; RV32I-NEXT: beqz a0, .LBB155_1
3933; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3934; RV32I-NEXT: mv a0, a2
3935; RV32I-NEXT: lw s3, 16(sp)
3936; RV32I-NEXT: lw s2, 20(sp)
3937; RV32I-NEXT: lw s1, 24(sp)
3938; RV32I-NEXT: lw ra, 28(sp)
3939; RV32I-NEXT: addi sp, sp, 32
3940; RV32I-NEXT: ret
3941 %1 = atomicrmw umax i32* %a, i32 %b monotonic
3942 ret i32 %1
3943}
3944
3945define i32 @atomicrmw_umax_i32_acquire(i32 *%a, i32 %b) nounwind {
3946; RV32I-LABEL: atomicrmw_umax_i32_acquire:
3947; RV32I: # %bb.0:
3948; RV32I-NEXT: addi sp, sp, -32
3949; RV32I-NEXT: sw ra, 28(sp)
3950; RV32I-NEXT: sw s1, 24(sp)
3951; RV32I-NEXT: sw s2, 20(sp)
3952; RV32I-NEXT: sw s3, 16(sp)
3953; RV32I-NEXT: sw s4, 12(sp)
3954; RV32I-NEXT: mv s1, a1
3955; RV32I-NEXT: mv s2, a0
3956; RV32I-NEXT: lw a2, 0(a0)
3957; RV32I-NEXT: addi s3, sp, 8
3958; RV32I-NEXT: addi s4, zero, 2
3959; RV32I-NEXT: .LBB156_1: # %atomicrmw.start
3960; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3961; RV32I-NEXT: sw a2, 8(sp)
3962; RV32I-NEXT: bltu s1, a2, .LBB156_3
3963; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3964; RV32I-NEXT: # in Loop: Header=BB156_1 Depth=1
3965; RV32I-NEXT: mv a2, s1
3966; RV32I-NEXT: .LBB156_3: # %atomicrmw.start
3967; RV32I-NEXT: # in Loop: Header=BB156_1 Depth=1
3968; RV32I-NEXT: mv a0, s2
3969; RV32I-NEXT: mv a1, s3
3970; RV32I-NEXT: mv a3, s4
3971; RV32I-NEXT: mv a4, s4
3972; RV32I-NEXT: call __atomic_compare_exchange_4
3973; RV32I-NEXT: lw a2, 8(sp)
3974; RV32I-NEXT: beqz a0, .LBB156_1
3975; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3976; RV32I-NEXT: mv a0, a2
3977; RV32I-NEXT: lw s4, 12(sp)
3978; RV32I-NEXT: lw s3, 16(sp)
3979; RV32I-NEXT: lw s2, 20(sp)
3980; RV32I-NEXT: lw s1, 24(sp)
3981; RV32I-NEXT: lw ra, 28(sp)
3982; RV32I-NEXT: addi sp, sp, 32
3983; RV32I-NEXT: ret
3984 %1 = atomicrmw umax i32* %a, i32 %b acquire
3985 ret i32 %1
3986}
3987
3988define i32 @atomicrmw_umax_i32_release(i32 *%a, i32 %b) nounwind {
3989; RV32I-LABEL: atomicrmw_umax_i32_release:
3990; RV32I: # %bb.0:
3991; RV32I-NEXT: addi sp, sp, -32
3992; RV32I-NEXT: sw ra, 28(sp)
3993; RV32I-NEXT: sw s1, 24(sp)
3994; RV32I-NEXT: sw s2, 20(sp)
3995; RV32I-NEXT: sw s3, 16(sp)
3996; RV32I-NEXT: sw s4, 12(sp)
3997; RV32I-NEXT: mv s1, a1
3998; RV32I-NEXT: mv s2, a0
3999; RV32I-NEXT: lw a2, 0(a0)
4000; RV32I-NEXT: addi s3, sp, 8
4001; RV32I-NEXT: addi s4, zero, 3
4002; RV32I-NEXT: .LBB157_1: # %atomicrmw.start
4003; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4004; RV32I-NEXT: sw a2, 8(sp)
4005; RV32I-NEXT: bltu s1, a2, .LBB157_3
4006; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4007; RV32I-NEXT: # in Loop: Header=BB157_1 Depth=1
4008; RV32I-NEXT: mv a2, s1
4009; RV32I-NEXT: .LBB157_3: # %atomicrmw.start
4010; RV32I-NEXT: # in Loop: Header=BB157_1 Depth=1
4011; RV32I-NEXT: mv a0, s2
4012; RV32I-NEXT: mv a1, s3
4013; RV32I-NEXT: mv a3, s4
4014; RV32I-NEXT: mv a4, zero
4015; RV32I-NEXT: call __atomic_compare_exchange_4
4016; RV32I-NEXT: lw a2, 8(sp)
4017; RV32I-NEXT: beqz a0, .LBB157_1
4018; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4019; RV32I-NEXT: mv a0, a2
4020; RV32I-NEXT: lw s4, 12(sp)
4021; RV32I-NEXT: lw s3, 16(sp)
4022; RV32I-NEXT: lw s2, 20(sp)
4023; RV32I-NEXT: lw s1, 24(sp)
4024; RV32I-NEXT: lw ra, 28(sp)
4025; RV32I-NEXT: addi sp, sp, 32
4026; RV32I-NEXT: ret
4027 %1 = atomicrmw umax i32* %a, i32 %b release
4028 ret i32 %1
4029}
4030
4031define i32 @atomicrmw_umax_i32_acq_rel(i32 *%a, i32 %b) nounwind {
4032; RV32I-LABEL: atomicrmw_umax_i32_acq_rel:
4033; RV32I: # %bb.0:
4034; RV32I-NEXT: addi sp, sp, -32
4035; RV32I-NEXT: sw ra, 28(sp)
4036; RV32I-NEXT: sw s1, 24(sp)
4037; RV32I-NEXT: sw s2, 20(sp)
4038; RV32I-NEXT: sw s3, 16(sp)
4039; RV32I-NEXT: sw s4, 12(sp)
4040; RV32I-NEXT: sw s5, 8(sp)
4041; RV32I-NEXT: mv s1, a1
4042; RV32I-NEXT: mv s2, a0
4043; RV32I-NEXT: lw a2, 0(a0)
4044; RV32I-NEXT: addi s3, sp, 4
4045; RV32I-NEXT: addi s4, zero, 4
4046; RV32I-NEXT: addi s5, zero, 2
4047; RV32I-NEXT: .LBB158_1: # %atomicrmw.start
4048; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4049; RV32I-NEXT: sw a2, 4(sp)
4050; RV32I-NEXT: bltu s1, a2, .LBB158_3
4051; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4052; RV32I-NEXT: # in Loop: Header=BB158_1 Depth=1
4053; RV32I-NEXT: mv a2, s1
4054; RV32I-NEXT: .LBB158_3: # %atomicrmw.start
4055; RV32I-NEXT: # in Loop: Header=BB158_1 Depth=1
4056; RV32I-NEXT: mv a0, s2
4057; RV32I-NEXT: mv a1, s3
4058; RV32I-NEXT: mv a3, s4
4059; RV32I-NEXT: mv a4, s5
4060; RV32I-NEXT: call __atomic_compare_exchange_4
4061; RV32I-NEXT: lw a2, 4(sp)
4062; RV32I-NEXT: beqz a0, .LBB158_1
4063; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4064; RV32I-NEXT: mv a0, a2
4065; RV32I-NEXT: lw s5, 8(sp)
4066; RV32I-NEXT: lw s4, 12(sp)
4067; RV32I-NEXT: lw s3, 16(sp)
4068; RV32I-NEXT: lw s2, 20(sp)
4069; RV32I-NEXT: lw s1, 24(sp)
4070; RV32I-NEXT: lw ra, 28(sp)
4071; RV32I-NEXT: addi sp, sp, 32
4072; RV32I-NEXT: ret
4073 %1 = atomicrmw umax i32* %a, i32 %b acq_rel
4074 ret i32 %1
4075}
4076
4077define i32 @atomicrmw_umax_i32_seq_cst(i32 *%a, i32 %b) nounwind {
4078; RV32I-LABEL: atomicrmw_umax_i32_seq_cst:
4079; RV32I: # %bb.0:
4080; RV32I-NEXT: addi sp, sp, -32
4081; RV32I-NEXT: sw ra, 28(sp)
4082; RV32I-NEXT: sw s1, 24(sp)
4083; RV32I-NEXT: sw s2, 20(sp)
4084; RV32I-NEXT: sw s3, 16(sp)
4085; RV32I-NEXT: sw s4, 12(sp)
4086; RV32I-NEXT: mv s1, a1
4087; RV32I-NEXT: mv s2, a0
4088; RV32I-NEXT: lw a2, 0(a0)
4089; RV32I-NEXT: addi s3, sp, 8
4090; RV32I-NEXT: addi s4, zero, 5
4091; RV32I-NEXT: .LBB159_1: # %atomicrmw.start
4092; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4093; RV32I-NEXT: sw a2, 8(sp)
4094; RV32I-NEXT: bltu s1, a2, .LBB159_3
4095; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4096; RV32I-NEXT: # in Loop: Header=BB159_1 Depth=1
4097; RV32I-NEXT: mv a2, s1
4098; RV32I-NEXT: .LBB159_3: # %atomicrmw.start
4099; RV32I-NEXT: # in Loop: Header=BB159_1 Depth=1
4100; RV32I-NEXT: mv a0, s2
4101; RV32I-NEXT: mv a1, s3
4102; RV32I-NEXT: mv a3, s4
4103; RV32I-NEXT: mv a4, s4
4104; RV32I-NEXT: call __atomic_compare_exchange_4
4105; RV32I-NEXT: lw a2, 8(sp)
4106; RV32I-NEXT: beqz a0, .LBB159_1
4107; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4108; RV32I-NEXT: mv a0, a2
4109; RV32I-NEXT: lw s4, 12(sp)
4110; RV32I-NEXT: lw s3, 16(sp)
4111; RV32I-NEXT: lw s2, 20(sp)
4112; RV32I-NEXT: lw s1, 24(sp)
4113; RV32I-NEXT: lw ra, 28(sp)
4114; RV32I-NEXT: addi sp, sp, 32
4115; RV32I-NEXT: ret
4116 %1 = atomicrmw umax i32* %a, i32 %b seq_cst
4117 ret i32 %1
4118}
4119
4120define i32 @atomicrmw_umin_i32_monotonic(i32 *%a, i32 %b) nounwind {
4121; RV32I-LABEL: atomicrmw_umin_i32_monotonic:
4122; RV32I: # %bb.0:
4123; RV32I-NEXT: addi sp, sp, -32
4124; RV32I-NEXT: sw ra, 28(sp)
4125; RV32I-NEXT: sw s1, 24(sp)
4126; RV32I-NEXT: sw s2, 20(sp)
4127; RV32I-NEXT: sw s3, 16(sp)
4128; RV32I-NEXT: mv s1, a1
4129; RV32I-NEXT: mv s2, a0
4130; RV32I-NEXT: lw a2, 0(a0)
4131; RV32I-NEXT: addi s3, sp, 12
4132; RV32I-NEXT: .LBB160_1: # %atomicrmw.start
4133; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4134; RV32I-NEXT: sw a2, 12(sp)
4135; RV32I-NEXT: bgeu s1, a2, .LBB160_3
4136; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4137; RV32I-NEXT: # in Loop: Header=BB160_1 Depth=1
4138; RV32I-NEXT: mv a2, s1
4139; RV32I-NEXT: .LBB160_3: # %atomicrmw.start
4140; RV32I-NEXT: # in Loop: Header=BB160_1 Depth=1
4141; RV32I-NEXT: mv a0, s2
4142; RV32I-NEXT: mv a1, s3
4143; RV32I-NEXT: mv a3, zero
4144; RV32I-NEXT: mv a4, zero
4145; RV32I-NEXT: call __atomic_compare_exchange_4
4146; RV32I-NEXT: lw a2, 12(sp)
4147; RV32I-NEXT: beqz a0, .LBB160_1
4148; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4149; RV32I-NEXT: mv a0, a2
4150; RV32I-NEXT: lw s3, 16(sp)
4151; RV32I-NEXT: lw s2, 20(sp)
4152; RV32I-NEXT: lw s1, 24(sp)
4153; RV32I-NEXT: lw ra, 28(sp)
4154; RV32I-NEXT: addi sp, sp, 32
4155; RV32I-NEXT: ret
4156 %1 = atomicrmw umin i32* %a, i32 %b monotonic
4157 ret i32 %1
4158}
4159
4160define i32 @atomicrmw_umin_i32_acquire(i32 *%a, i32 %b) nounwind {
4161; RV32I-LABEL: atomicrmw_umin_i32_acquire:
4162; RV32I: # %bb.0:
4163; RV32I-NEXT: addi sp, sp, -32
4164; RV32I-NEXT: sw ra, 28(sp)
4165; RV32I-NEXT: sw s1, 24(sp)
4166; RV32I-NEXT: sw s2, 20(sp)
4167; RV32I-NEXT: sw s3, 16(sp)
4168; RV32I-NEXT: sw s4, 12(sp)
4169; RV32I-NEXT: mv s1, a1
4170; RV32I-NEXT: mv s2, a0
4171; RV32I-NEXT: lw a2, 0(a0)
4172; RV32I-NEXT: addi s3, sp, 8
4173; RV32I-NEXT: addi s4, zero, 2
4174; RV32I-NEXT: .LBB161_1: # %atomicrmw.start
4175; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4176; RV32I-NEXT: sw a2, 8(sp)
4177; RV32I-NEXT: bgeu s1, a2, .LBB161_3
4178; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4179; RV32I-NEXT: # in Loop: Header=BB161_1 Depth=1
4180; RV32I-NEXT: mv a2, s1
4181; RV32I-NEXT: .LBB161_3: # %atomicrmw.start
4182; RV32I-NEXT: # in Loop: Header=BB161_1 Depth=1
4183; RV32I-NEXT: mv a0, s2
4184; RV32I-NEXT: mv a1, s3
4185; RV32I-NEXT: mv a3, s4
4186; RV32I-NEXT: mv a4, s4
4187; RV32I-NEXT: call __atomic_compare_exchange_4
4188; RV32I-NEXT: lw a2, 8(sp)
4189; RV32I-NEXT: beqz a0, .LBB161_1
4190; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4191; RV32I-NEXT: mv a0, a2
4192; RV32I-NEXT: lw s4, 12(sp)
4193; RV32I-NEXT: lw s3, 16(sp)
4194; RV32I-NEXT: lw s2, 20(sp)
4195; RV32I-NEXT: lw s1, 24(sp)
4196; RV32I-NEXT: lw ra, 28(sp)
4197; RV32I-NEXT: addi sp, sp, 32
4198; RV32I-NEXT: ret
4199 %1 = atomicrmw umin i32* %a, i32 %b acquire
4200 ret i32 %1
4201}
4202
4203define i32 @atomicrmw_umin_i32_release(i32 *%a, i32 %b) nounwind {
4204; RV32I-LABEL: atomicrmw_umin_i32_release:
4205; RV32I: # %bb.0:
4206; RV32I-NEXT: addi sp, sp, -32
4207; RV32I-NEXT: sw ra, 28(sp)
4208; RV32I-NEXT: sw s1, 24(sp)
4209; RV32I-NEXT: sw s2, 20(sp)
4210; RV32I-NEXT: sw s3, 16(sp)
4211; RV32I-NEXT: sw s4, 12(sp)
4212; RV32I-NEXT: mv s1, a1
4213; RV32I-NEXT: mv s2, a0
4214; RV32I-NEXT: lw a2, 0(a0)
4215; RV32I-NEXT: addi s3, sp, 8
4216; RV32I-NEXT: addi s4, zero, 3
4217; RV32I-NEXT: .LBB162_1: # %atomicrmw.start
4218; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4219; RV32I-NEXT: sw a2, 8(sp)
4220; RV32I-NEXT: bgeu s1, a2, .LBB162_3
4221; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4222; RV32I-NEXT: # in Loop: Header=BB162_1 Depth=1
4223; RV32I-NEXT: mv a2, s1
4224; RV32I-NEXT: .LBB162_3: # %atomicrmw.start
4225; RV32I-NEXT: # in Loop: Header=BB162_1 Depth=1
4226; RV32I-NEXT: mv a0, s2
4227; RV32I-NEXT: mv a1, s3
4228; RV32I-NEXT: mv a3, s4
4229; RV32I-NEXT: mv a4, zero
4230; RV32I-NEXT: call __atomic_compare_exchange_4
4231; RV32I-NEXT: lw a2, 8(sp)
4232; RV32I-NEXT: beqz a0, .LBB162_1
4233; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4234; RV32I-NEXT: mv a0, a2
4235; RV32I-NEXT: lw s4, 12(sp)
4236; RV32I-NEXT: lw s3, 16(sp)
4237; RV32I-NEXT: lw s2, 20(sp)
4238; RV32I-NEXT: lw s1, 24(sp)
4239; RV32I-NEXT: lw ra, 28(sp)
4240; RV32I-NEXT: addi sp, sp, 32
4241; RV32I-NEXT: ret
4242 %1 = atomicrmw umin i32* %a, i32 %b release
4243 ret i32 %1
4244}
4245
4246define i32 @atomicrmw_umin_i32_acq_rel(i32 *%a, i32 %b) nounwind {
4247; RV32I-LABEL: atomicrmw_umin_i32_acq_rel:
4248; RV32I: # %bb.0:
4249; RV32I-NEXT: addi sp, sp, -32
4250; RV32I-NEXT: sw ra, 28(sp)
4251; RV32I-NEXT: sw s1, 24(sp)
4252; RV32I-NEXT: sw s2, 20(sp)
4253; RV32I-NEXT: sw s3, 16(sp)
4254; RV32I-NEXT: sw s4, 12(sp)
4255; RV32I-NEXT: sw s5, 8(sp)
4256; RV32I-NEXT: mv s1, a1
4257; RV32I-NEXT: mv s2, a0
4258; RV32I-NEXT: lw a2, 0(a0)
4259; RV32I-NEXT: addi s3, sp, 4
4260; RV32I-NEXT: addi s4, zero, 4
4261; RV32I-NEXT: addi s5, zero, 2
4262; RV32I-NEXT: .LBB163_1: # %atomicrmw.start
4263; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4264; RV32I-NEXT: sw a2, 4(sp)
4265; RV32I-NEXT: bgeu s1, a2, .LBB163_3
4266; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4267; RV32I-NEXT: # in Loop: Header=BB163_1 Depth=1
4268; RV32I-NEXT: mv a2, s1
4269; RV32I-NEXT: .LBB163_3: # %atomicrmw.start
4270; RV32I-NEXT: # in Loop: Header=BB163_1 Depth=1
4271; RV32I-NEXT: mv a0, s2
4272; RV32I-NEXT: mv a1, s3
4273; RV32I-NEXT: mv a3, s4
4274; RV32I-NEXT: mv a4, s5
4275; RV32I-NEXT: call __atomic_compare_exchange_4
4276; RV32I-NEXT: lw a2, 4(sp)
4277; RV32I-NEXT: beqz a0, .LBB163_1
4278; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4279; RV32I-NEXT: mv a0, a2
4280; RV32I-NEXT: lw s5, 8(sp)
4281; RV32I-NEXT: lw s4, 12(sp)
4282; RV32I-NEXT: lw s3, 16(sp)
4283; RV32I-NEXT: lw s2, 20(sp)
4284; RV32I-NEXT: lw s1, 24(sp)
4285; RV32I-NEXT: lw ra, 28(sp)
4286; RV32I-NEXT: addi sp, sp, 32
4287; RV32I-NEXT: ret
4288 %1 = atomicrmw umin i32* %a, i32 %b acq_rel
4289 ret i32 %1
4290}
4291
4292define i32 @atomicrmw_umin_i32_seq_cst(i32 *%a, i32 %b) nounwind {
4293; RV32I-LABEL: atomicrmw_umin_i32_seq_cst:
4294; RV32I: # %bb.0:
4295; RV32I-NEXT: addi sp, sp, -32
4296; RV32I-NEXT: sw ra, 28(sp)
4297; RV32I-NEXT: sw s1, 24(sp)
4298; RV32I-NEXT: sw s2, 20(sp)
4299; RV32I-NEXT: sw s3, 16(sp)
4300; RV32I-NEXT: sw s4, 12(sp)
4301; RV32I-NEXT: mv s1, a1
4302; RV32I-NEXT: mv s2, a0
4303; RV32I-NEXT: lw a2, 0(a0)
4304; RV32I-NEXT: addi s3, sp, 8
4305; RV32I-NEXT: addi s4, zero, 5
4306; RV32I-NEXT: .LBB164_1: # %atomicrmw.start
4307; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4308; RV32I-NEXT: sw a2, 8(sp)
4309; RV32I-NEXT: bgeu s1, a2, .LBB164_3
4310; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4311; RV32I-NEXT: # in Loop: Header=BB164_1 Depth=1
4312; RV32I-NEXT: mv a2, s1
4313; RV32I-NEXT: .LBB164_3: # %atomicrmw.start
4314; RV32I-NEXT: # in Loop: Header=BB164_1 Depth=1
4315; RV32I-NEXT: mv a0, s2
4316; RV32I-NEXT: mv a1, s3
4317; RV32I-NEXT: mv a3, s4
4318; RV32I-NEXT: mv a4, s4
4319; RV32I-NEXT: call __atomic_compare_exchange_4
4320; RV32I-NEXT: lw a2, 8(sp)
4321; RV32I-NEXT: beqz a0, .LBB164_1
4322; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4323; RV32I-NEXT: mv a0, a2
4324; RV32I-NEXT: lw s4, 12(sp)
4325; RV32I-NEXT: lw s3, 16(sp)
4326; RV32I-NEXT: lw s2, 20(sp)
4327; RV32I-NEXT: lw s1, 24(sp)
4328; RV32I-NEXT: lw ra, 28(sp)
4329; RV32I-NEXT: addi sp, sp, 32
4330; RV32I-NEXT: ret
4331 %1 = atomicrmw umin i32* %a, i32 %b seq_cst
4332 ret i32 %1
4333}
4334
4335define i64 @atomicrmw_xchg_i64_monotonic(i64* %a, i64 %b) {
4336; RV32I-LABEL: atomicrmw_xchg_i64_monotonic:
4337; RV32I: # %bb.0:
4338; RV32I-NEXT: addi sp, sp, -16
4339; RV32I-NEXT: sw ra, 12(sp)
4340; RV32I-NEXT: mv a3, zero
4341; RV32I-NEXT: call __atomic_exchange_8
4342; RV32I-NEXT: lw ra, 12(sp)
4343; RV32I-NEXT: addi sp, sp, 16
4344; RV32I-NEXT: ret
4345 %1 = atomicrmw xchg i64* %a, i64 %b monotonic
4346 ret i64 %1
4347}
4348
4349define i64 @atomicrmw_xchg_i64_acquire(i64* %a, i64 %b) {
4350; RV32I-LABEL: atomicrmw_xchg_i64_acquire:
4351; RV32I: # %bb.0:
4352; RV32I-NEXT: addi sp, sp, -16
4353; RV32I-NEXT: sw ra, 12(sp)
4354; RV32I-NEXT: addi a3, zero, 2
4355; RV32I-NEXT: call __atomic_exchange_8
4356; RV32I-NEXT: lw ra, 12(sp)
4357; RV32I-NEXT: addi sp, sp, 16
4358; RV32I-NEXT: ret
4359 %1 = atomicrmw xchg i64* %a, i64 %b acquire
4360 ret i64 %1
4361}
4362
4363define i64 @atomicrmw_xchg_i64_release(i64* %a, i64 %b) {
4364; RV32I-LABEL: atomicrmw_xchg_i64_release:
4365; RV32I: # %bb.0:
4366; RV32I-NEXT: addi sp, sp, -16
4367; RV32I-NEXT: sw ra, 12(sp)
4368; RV32I-NEXT: addi a3, zero, 3
4369; RV32I-NEXT: call __atomic_exchange_8
4370; RV32I-NEXT: lw ra, 12(sp)
4371; RV32I-NEXT: addi sp, sp, 16
4372; RV32I-NEXT: ret
4373 %1 = atomicrmw xchg i64* %a, i64 %b release
4374 ret i64 %1
4375}
4376
4377define i64 @atomicrmw_xchg_i64_acq_rel(i64* %a, i64 %b) {
4378; RV32I-LABEL: atomicrmw_xchg_i64_acq_rel:
4379; RV32I: # %bb.0:
4380; RV32I-NEXT: addi sp, sp, -16
4381; RV32I-NEXT: sw ra, 12(sp)
4382; RV32I-NEXT: addi a3, zero, 4
4383; RV32I-NEXT: call __atomic_exchange_8
4384; RV32I-NEXT: lw ra, 12(sp)
4385; RV32I-NEXT: addi sp, sp, 16
4386; RV32I-NEXT: ret
4387 %1 = atomicrmw xchg i64* %a, i64 %b acq_rel
4388 ret i64 %1
4389}
4390
4391define i64 @atomicrmw_xchg_i64_seq_cst(i64* %a, i64 %b) {
4392; RV32I-LABEL: atomicrmw_xchg_i64_seq_cst:
4393; RV32I: # %bb.0:
4394; RV32I-NEXT: addi sp, sp, -16
4395; RV32I-NEXT: sw ra, 12(sp)
4396; RV32I-NEXT: addi a3, zero, 5
4397; RV32I-NEXT: call __atomic_exchange_8
4398; RV32I-NEXT: lw ra, 12(sp)
4399; RV32I-NEXT: addi sp, sp, 16
4400; RV32I-NEXT: ret
4401 %1 = atomicrmw xchg i64* %a, i64 %b seq_cst
4402 ret i64 %1
4403}
4404
4405define i64 @atomicrmw_add_i64_monotonic(i64 *%a, i64 %b) nounwind {
4406; RV32I-LABEL: atomicrmw_add_i64_monotonic:
4407; RV32I: # %bb.0:
4408; RV32I-NEXT: addi sp, sp, -16
4409; RV32I-NEXT: sw ra, 12(sp)
4410; RV32I-NEXT: mv a3, zero
4411; RV32I-NEXT: call __atomic_fetch_add_8
4412; RV32I-NEXT: lw ra, 12(sp)
4413; RV32I-NEXT: addi sp, sp, 16
4414; RV32I-NEXT: ret
4415 %1 = atomicrmw add i64* %a, i64 %b monotonic
4416 ret i64 %1
4417}
4418
4419define i64 @atomicrmw_add_i64_acquire(i64 *%a, i64 %b) nounwind {
4420; RV32I-LABEL: atomicrmw_add_i64_acquire:
4421; RV32I: # %bb.0:
4422; RV32I-NEXT: addi sp, sp, -16
4423; RV32I-NEXT: sw ra, 12(sp)
4424; RV32I-NEXT: addi a3, zero, 2
4425; RV32I-NEXT: call __atomic_fetch_add_8
4426; RV32I-NEXT: lw ra, 12(sp)
4427; RV32I-NEXT: addi sp, sp, 16
4428; RV32I-NEXT: ret
4429 %1 = atomicrmw add i64* %a, i64 %b acquire
4430 ret i64 %1
4431}
4432
4433define i64 @atomicrmw_add_i64_release(i64 *%a, i64 %b) nounwind {
4434; RV32I-LABEL: atomicrmw_add_i64_release:
4435; RV32I: # %bb.0:
4436; RV32I-NEXT: addi sp, sp, -16
4437; RV32I-NEXT: sw ra, 12(sp)
4438; RV32I-NEXT: addi a3, zero, 3
4439; RV32I-NEXT: call __atomic_fetch_add_8
4440; RV32I-NEXT: lw ra, 12(sp)
4441; RV32I-NEXT: addi sp, sp, 16
4442; RV32I-NEXT: ret
4443 %1 = atomicrmw add i64* %a, i64 %b release
4444 ret i64 %1
4445}
4446
4447define i64 @atomicrmw_add_i64_acq_rel(i64 *%a, i64 %b) nounwind {
4448; RV32I-LABEL: atomicrmw_add_i64_acq_rel:
4449; RV32I: # %bb.0:
4450; RV32I-NEXT: addi sp, sp, -16
4451; RV32I-NEXT: sw ra, 12(sp)
4452; RV32I-NEXT: addi a3, zero, 4
4453; RV32I-NEXT: call __atomic_fetch_add_8
4454; RV32I-NEXT: lw ra, 12(sp)
4455; RV32I-NEXT: addi sp, sp, 16
4456; RV32I-NEXT: ret
4457 %1 = atomicrmw add i64* %a, i64 %b acq_rel
4458 ret i64 %1
4459}
4460
4461define i64 @atomicrmw_add_i64_seq_cst(i64 *%a, i64 %b) nounwind {
4462; RV32I-LABEL: atomicrmw_add_i64_seq_cst:
4463; RV32I: # %bb.0:
4464; RV32I-NEXT: addi sp, sp, -16
4465; RV32I-NEXT: sw ra, 12(sp)
4466; RV32I-NEXT: addi a3, zero, 5
4467; RV32I-NEXT: call __atomic_fetch_add_8
4468; RV32I-NEXT: lw ra, 12(sp)
4469; RV32I-NEXT: addi sp, sp, 16
4470; RV32I-NEXT: ret
4471 %1 = atomicrmw add i64* %a, i64 %b seq_cst
4472 ret i64 %1
4473}
4474
4475define i64 @atomicrmw_sub_i64_monotonic(i64* %a, i64 %b) {
4476; RV32I-LABEL: atomicrmw_sub_i64_monotonic:
4477; RV32I: # %bb.0:
4478; RV32I-NEXT: addi sp, sp, -16
4479; RV32I-NEXT: sw ra, 12(sp)
4480; RV32I-NEXT: mv a3, zero
4481; RV32I-NEXT: call __atomic_fetch_sub_8
4482; RV32I-NEXT: lw ra, 12(sp)
4483; RV32I-NEXT: addi sp, sp, 16
4484; RV32I-NEXT: ret
4485 %1 = atomicrmw sub i64* %a, i64 %b monotonic
4486 ret i64 %1
4487}
4488
4489define i64 @atomicrmw_sub_i64_acquire(i64* %a, i64 %b) {
4490; RV32I-LABEL: atomicrmw_sub_i64_acquire:
4491; RV32I: # %bb.0:
4492; RV32I-NEXT: addi sp, sp, -16
4493; RV32I-NEXT: sw ra, 12(sp)
4494; RV32I-NEXT: addi a3, zero, 2
4495; RV32I-NEXT: call __atomic_fetch_sub_8
4496; RV32I-NEXT: lw ra, 12(sp)
4497; RV32I-NEXT: addi sp, sp, 16
4498; RV32I-NEXT: ret
4499 %1 = atomicrmw sub i64* %a, i64 %b acquire
4500 ret i64 %1
4501}
4502
4503define i64 @atomicrmw_sub_i64_release(i64* %a, i64 %b) {
4504; RV32I-LABEL: atomicrmw_sub_i64_release:
4505; RV32I: # %bb.0:
4506; RV32I-NEXT: addi sp, sp, -16
4507; RV32I-NEXT: sw ra, 12(sp)
4508; RV32I-NEXT: addi a3, zero, 3
4509; RV32I-NEXT: call __atomic_fetch_sub_8
4510; RV32I-NEXT: lw ra, 12(sp)
4511; RV32I-NEXT: addi sp, sp, 16
4512; RV32I-NEXT: ret
4513 %1 = atomicrmw sub i64* %a, i64 %b release
4514 ret i64 %1
4515}
4516
4517define i64 @atomicrmw_sub_i64_acq_rel(i64* %a, i64 %b) {
4518; RV32I-LABEL: atomicrmw_sub_i64_acq_rel:
4519; RV32I: # %bb.0:
4520; RV32I-NEXT: addi sp, sp, -16
4521; RV32I-NEXT: sw ra, 12(sp)
4522; RV32I-NEXT: addi a3, zero, 4
4523; RV32I-NEXT: call __atomic_fetch_sub_8
4524; RV32I-NEXT: lw ra, 12(sp)
4525; RV32I-NEXT: addi sp, sp, 16
4526; RV32I-NEXT: ret
4527 %1 = atomicrmw sub i64* %a, i64 %b acq_rel
4528 ret i64 %1
4529}
4530
4531define i64 @atomicrmw_sub_i64_seq_cst(i64* %a, i64 %b) {
4532; RV32I-LABEL: atomicrmw_sub_i64_seq_cst:
4533; RV32I: # %bb.0:
4534; RV32I-NEXT: addi sp, sp, -16
4535; RV32I-NEXT: sw ra, 12(sp)
4536; RV32I-NEXT: addi a3, zero, 5
4537; RV32I-NEXT: call __atomic_fetch_sub_8
4538; RV32I-NEXT: lw ra, 12(sp)
4539; RV32I-NEXT: addi sp, sp, 16
4540; RV32I-NEXT: ret
4541 %1 = atomicrmw sub i64* %a, i64 %b seq_cst
4542 ret i64 %1
4543}
4544
4545define i64 @atomicrmw_and_i64_monotonic(i64 *%a, i64 %b) nounwind {
4546; RV32I-LABEL: atomicrmw_and_i64_monotonic:
4547; RV32I: # %bb.0:
4548; RV32I-NEXT: addi sp, sp, -16
4549; RV32I-NEXT: sw ra, 12(sp)
4550; RV32I-NEXT: mv a3, zero
4551; RV32I-NEXT: call __atomic_fetch_and_8
4552; RV32I-NEXT: lw ra, 12(sp)
4553; RV32I-NEXT: addi sp, sp, 16
4554; RV32I-NEXT: ret
4555 %1 = atomicrmw and i64* %a, i64 %b monotonic
4556 ret i64 %1
4557}
4558
4559define i64 @atomicrmw_and_i64_acquire(i64 *%a, i64 %b) nounwind {
4560; RV32I-LABEL: atomicrmw_and_i64_acquire:
4561; RV32I: # %bb.0:
4562; RV32I-NEXT: addi sp, sp, -16
4563; RV32I-NEXT: sw ra, 12(sp)
4564; RV32I-NEXT: addi a3, zero, 2
4565; RV32I-NEXT: call __atomic_fetch_and_8
4566; RV32I-NEXT: lw ra, 12(sp)
4567; RV32I-NEXT: addi sp, sp, 16
4568; RV32I-NEXT: ret
4569 %1 = atomicrmw and i64* %a, i64 %b acquire
4570 ret i64 %1
4571}
4572
4573define i64 @atomicrmw_and_i64_release(i64 *%a, i64 %b) nounwind {
4574; RV32I-LABEL: atomicrmw_and_i64_release:
4575; RV32I: # %bb.0:
4576; RV32I-NEXT: addi sp, sp, -16
4577; RV32I-NEXT: sw ra, 12(sp)
4578; RV32I-NEXT: addi a3, zero, 3
4579; RV32I-NEXT: call __atomic_fetch_and_8
4580; RV32I-NEXT: lw ra, 12(sp)
4581; RV32I-NEXT: addi sp, sp, 16
4582; RV32I-NEXT: ret
4583 %1 = atomicrmw and i64* %a, i64 %b release
4584 ret i64 %1
4585}
4586
4587define i64 @atomicrmw_and_i64_acq_rel(i64 *%a, i64 %b) nounwind {
4588; RV32I-LABEL: atomicrmw_and_i64_acq_rel:
4589; RV32I: # %bb.0:
4590; RV32I-NEXT: addi sp, sp, -16
4591; RV32I-NEXT: sw ra, 12(sp)
4592; RV32I-NEXT: addi a3, zero, 4
4593; RV32I-NEXT: call __atomic_fetch_and_8
4594; RV32I-NEXT: lw ra, 12(sp)
4595; RV32I-NEXT: addi sp, sp, 16
4596; RV32I-NEXT: ret
4597 %1 = atomicrmw and i64* %a, i64 %b acq_rel
4598 ret i64 %1
4599}
4600
4601define i64 @atomicrmw_and_i64_seq_cst(i64 *%a, i64 %b) nounwind {
4602; RV32I-LABEL: atomicrmw_and_i64_seq_cst:
4603; RV32I: # %bb.0:
4604; RV32I-NEXT: addi sp, sp, -16
4605; RV32I-NEXT: sw ra, 12(sp)
4606; RV32I-NEXT: addi a3, zero, 5
4607; RV32I-NEXT: call __atomic_fetch_and_8
4608; RV32I-NEXT: lw ra, 12(sp)
4609; RV32I-NEXT: addi sp, sp, 16
4610; RV32I-NEXT: ret
4611 %1 = atomicrmw and i64* %a, i64 %b seq_cst
4612 ret i64 %1
4613}
4614
4615define i64 @atomicrmw_nand_i64_monotonic(i64* %a, i64 %b) {
4616; RV32I-LABEL: atomicrmw_nand_i64_monotonic:
4617; RV32I: # %bb.0:
4618; RV32I-NEXT: addi sp, sp, -16
4619; RV32I-NEXT: sw ra, 12(sp)
4620; RV32I-NEXT: mv a3, zero
4621; RV32I-NEXT: call __atomic_fetch_nand_8
4622; RV32I-NEXT: lw ra, 12(sp)
4623; RV32I-NEXT: addi sp, sp, 16
4624; RV32I-NEXT: ret
4625 %1 = atomicrmw nand i64* %a, i64 %b monotonic
4626 ret i64 %1
4627}
4628
4629define i64 @atomicrmw_nand_i64_acquire(i64* %a, i64 %b) {
4630; RV32I-LABEL: atomicrmw_nand_i64_acquire:
4631; RV32I: # %bb.0:
4632; RV32I-NEXT: addi sp, sp, -16
4633; RV32I-NEXT: sw ra, 12(sp)
4634; RV32I-NEXT: addi a3, zero, 2
4635; RV32I-NEXT: call __atomic_fetch_nand_8
4636; RV32I-NEXT: lw ra, 12(sp)
4637; RV32I-NEXT: addi sp, sp, 16
4638; RV32I-NEXT: ret
4639 %1 = atomicrmw nand i64* %a, i64 %b acquire
4640 ret i64 %1
4641}
4642
4643define i64 @atomicrmw_nand_i64_release(i64* %a, i64 %b) {
4644; RV32I-LABEL: atomicrmw_nand_i64_release:
4645; RV32I: # %bb.0:
4646; RV32I-NEXT: addi sp, sp, -16
4647; RV32I-NEXT: sw ra, 12(sp)
4648; RV32I-NEXT: addi a3, zero, 3
4649; RV32I-NEXT: call __atomic_fetch_nand_8
4650; RV32I-NEXT: lw ra, 12(sp)
4651; RV32I-NEXT: addi sp, sp, 16
4652; RV32I-NEXT: ret
4653 %1 = atomicrmw nand i64* %a, i64 %b release
4654 ret i64 %1
4655}
4656
4657define i64 @atomicrmw_nand_i64_acq_rel(i64* %a, i64 %b) {
4658; RV32I-LABEL: atomicrmw_nand_i64_acq_rel:
4659; RV32I: # %bb.0:
4660; RV32I-NEXT: addi sp, sp, -16
4661; RV32I-NEXT: sw ra, 12(sp)
4662; RV32I-NEXT: addi a3, zero, 4
4663; RV32I-NEXT: call __atomic_fetch_nand_8
4664; RV32I-NEXT: lw ra, 12(sp)
4665; RV32I-NEXT: addi sp, sp, 16
4666; RV32I-NEXT: ret
4667 %1 = atomicrmw nand i64* %a, i64 %b acq_rel
4668 ret i64 %1
4669}
4670
4671define i64 @atomicrmw_nand_i64_seq_cst(i64* %a, i64 %b) {
4672; RV32I-LABEL: atomicrmw_nand_i64_seq_cst:
4673; RV32I: # %bb.0:
4674; RV32I-NEXT: addi sp, sp, -16
4675; RV32I-NEXT: sw ra, 12(sp)
4676; RV32I-NEXT: addi a3, zero, 5
4677; RV32I-NEXT: call __atomic_fetch_nand_8
4678; RV32I-NEXT: lw ra, 12(sp)
4679; RV32I-NEXT: addi sp, sp, 16
4680; RV32I-NEXT: ret
4681 %1 = atomicrmw nand i64* %a, i64 %b seq_cst
4682 ret i64 %1
4683}
4684
4685define i64 @atomicrmw_or_i64_monotonic(i64 *%a, i64 %b) nounwind {
4686; RV32I-LABEL: atomicrmw_or_i64_monotonic:
4687; RV32I: # %bb.0:
4688; RV32I-NEXT: addi sp, sp, -16
4689; RV32I-NEXT: sw ra, 12(sp)
4690; RV32I-NEXT: mv a3, zero
4691; RV32I-NEXT: call __atomic_fetch_or_8
4692; RV32I-NEXT: lw ra, 12(sp)
4693; RV32I-NEXT: addi sp, sp, 16
4694; RV32I-NEXT: ret
4695 %1 = atomicrmw or i64* %a, i64 %b monotonic
4696 ret i64 %1
4697}
4698
4699define i64 @atomicrmw_or_i64_acquire(i64 *%a, i64 %b) nounwind {
4700; RV32I-LABEL: atomicrmw_or_i64_acquire:
4701; RV32I: # %bb.0:
4702; RV32I-NEXT: addi sp, sp, -16
4703; RV32I-NEXT: sw ra, 12(sp)
4704; RV32I-NEXT: addi a3, zero, 2
4705; RV32I-NEXT: call __atomic_fetch_or_8
4706; RV32I-NEXT: lw ra, 12(sp)
4707; RV32I-NEXT: addi sp, sp, 16
4708; RV32I-NEXT: ret
4709 %1 = atomicrmw or i64* %a, i64 %b acquire
4710 ret i64 %1
4711}
4712
4713define i64 @atomicrmw_or_i64_release(i64 *%a, i64 %b) nounwind {
4714; RV32I-LABEL: atomicrmw_or_i64_release:
4715; RV32I: # %bb.0:
4716; RV32I-NEXT: addi sp, sp, -16
4717; RV32I-NEXT: sw ra, 12(sp)
4718; RV32I-NEXT: addi a3, zero, 3
4719; RV32I-NEXT: call __atomic_fetch_or_8
4720; RV32I-NEXT: lw ra, 12(sp)
4721; RV32I-NEXT: addi sp, sp, 16
4722; RV32I-NEXT: ret
4723 %1 = atomicrmw or i64* %a, i64 %b release
4724 ret i64 %1
4725}
4726
4727define i64 @atomicrmw_or_i64_acq_rel(i64 *%a, i64 %b) nounwind {
4728; RV32I-LABEL: atomicrmw_or_i64_acq_rel:
4729; RV32I: # %bb.0:
4730; RV32I-NEXT: addi sp, sp, -16
4731; RV32I-NEXT: sw ra, 12(sp)
4732; RV32I-NEXT: addi a3, zero, 4
4733; RV32I-NEXT: call __atomic_fetch_or_8
4734; RV32I-NEXT: lw ra, 12(sp)
4735; RV32I-NEXT: addi sp, sp, 16
4736; RV32I-NEXT: ret
4737 %1 = atomicrmw or i64* %a, i64 %b acq_rel
4738 ret i64 %1
4739}
4740
4741define i64 @atomicrmw_or_i64_seq_cst(i64 *%a, i64 %b) nounwind {
4742; RV32I-LABEL: atomicrmw_or_i64_seq_cst:
4743; RV32I: # %bb.0:
4744; RV32I-NEXT: addi sp, sp, -16
4745; RV32I-NEXT: sw ra, 12(sp)
4746; RV32I-NEXT: addi a3, zero, 5
4747; RV32I-NEXT: call __atomic_fetch_or_8
4748; RV32I-NEXT: lw ra, 12(sp)
4749; RV32I-NEXT: addi sp, sp, 16
4750; RV32I-NEXT: ret
4751 %1 = atomicrmw or i64* %a, i64 %b seq_cst
4752 ret i64 %1
4753}
4754
4755define i64 @atomicrmw_xor_i64_monotonic(i64 *%a, i64 %b) nounwind {
4756; RV32I-LABEL: atomicrmw_xor_i64_monotonic:
4757; RV32I: # %bb.0:
4758; RV32I-NEXT: addi sp, sp, -16
4759; RV32I-NEXT: sw ra, 12(sp)
4760; RV32I-NEXT: mv a3, zero
4761; RV32I-NEXT: call __atomic_fetch_xor_8
4762; RV32I-NEXT: lw ra, 12(sp)
4763; RV32I-NEXT: addi sp, sp, 16
4764; RV32I-NEXT: ret
4765 %1 = atomicrmw xor i64* %a, i64 %b monotonic
4766 ret i64 %1
4767}
4768
4769define i64 @atomicrmw_xor_i64_acquire(i64 *%a, i64 %b) nounwind {
4770; RV32I-LABEL: atomicrmw_xor_i64_acquire:
4771; RV32I: # %bb.0:
4772; RV32I-NEXT: addi sp, sp, -16
4773; RV32I-NEXT: sw ra, 12(sp)
4774; RV32I-NEXT: addi a3, zero, 2
4775; RV32I-NEXT: call __atomic_fetch_xor_8
4776; RV32I-NEXT: lw ra, 12(sp)
4777; RV32I-NEXT: addi sp, sp, 16
4778; RV32I-NEXT: ret
4779 %1 = atomicrmw xor i64* %a, i64 %b acquire
4780 ret i64 %1
4781}
4782
4783define i64 @atomicrmw_xor_i64_release(i64 *%a, i64 %b) nounwind {
4784; RV32I-LABEL: atomicrmw_xor_i64_release:
4785; RV32I: # %bb.0:
4786; RV32I-NEXT: addi sp, sp, -16
4787; RV32I-NEXT: sw ra, 12(sp)
4788; RV32I-NEXT: addi a3, zero, 3
4789; RV32I-NEXT: call __atomic_fetch_xor_8
4790; RV32I-NEXT: lw ra, 12(sp)
4791; RV32I-NEXT: addi sp, sp, 16
4792; RV32I-NEXT: ret
4793 %1 = atomicrmw xor i64* %a, i64 %b release
4794 ret i64 %1
4795}
4796
4797define i64 @atomicrmw_xor_i64_acq_rel(i64 *%a, i64 %b) nounwind {
4798; RV32I-LABEL: atomicrmw_xor_i64_acq_rel:
4799; RV32I: # %bb.0:
4800; RV32I-NEXT: addi sp, sp, -16
4801; RV32I-NEXT: sw ra, 12(sp)
4802; RV32I-NEXT: addi a3, zero, 4
4803; RV32I-NEXT: call __atomic_fetch_xor_8
4804; RV32I-NEXT: lw ra, 12(sp)
4805; RV32I-NEXT: addi sp, sp, 16
4806; RV32I-NEXT: ret
4807 %1 = atomicrmw xor i64* %a, i64 %b acq_rel
4808 ret i64 %1
4809}
4810
4811define i64 @atomicrmw_xor_i64_seq_cst(i64 *%a, i64 %b) nounwind {
4812; RV32I-LABEL: atomicrmw_xor_i64_seq_cst:
4813; RV32I: # %bb.0:
4814; RV32I-NEXT: addi sp, sp, -16
4815; RV32I-NEXT: sw ra, 12(sp)
4816; RV32I-NEXT: addi a3, zero, 5
4817; RV32I-NEXT: call __atomic_fetch_xor_8
4818; RV32I-NEXT: lw ra, 12(sp)
4819; RV32I-NEXT: addi sp, sp, 16
4820; RV32I-NEXT: ret
4821 %1 = atomicrmw xor i64* %a, i64 %b seq_cst
4822 ret i64 %1
4823}
4824
4825define i64 @atomicrmw_max_i64_monotonic(i64 *%a, i64 %b) nounwind {
4826; RV32I-LABEL: atomicrmw_max_i64_monotonic:
4827; RV32I: # %bb.0:
4828; RV32I-NEXT: addi sp, sp, -32
4829; RV32I-NEXT: sw ra, 28(sp)
4830; RV32I-NEXT: sw s1, 24(sp)
4831; RV32I-NEXT: sw s2, 20(sp)
4832; RV32I-NEXT: sw s3, 16(sp)
4833; RV32I-NEXT: sw s4, 12(sp)
4834; RV32I-NEXT: mv s1, a2
4835; RV32I-NEXT: mv s2, a1
4836; RV32I-NEXT: mv s3, a0
4837; RV32I-NEXT: lw a1, 4(a0)
4838; RV32I-NEXT: lw a2, 0(a0)
4839; RV32I-NEXT: mv s4, sp
4840; RV32I-NEXT: .LBB200_1: # %atomicrmw.start
4841; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4842; RV32I-NEXT: beq a1, s1, .LBB200_3
4843; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4844; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
4845; RV32I-NEXT: slt a0, s1, a1
4846; RV32I-NEXT: sw a2, 0(sp)
4847; RV32I-NEXT: beqz a0, .LBB200_4
4848; RV32I-NEXT: j .LBB200_5
4849; RV32I-NEXT: .LBB200_3: # in Loop: Header=BB200_1 Depth=1
4850; RV32I-NEXT: sltu a0, s2, a2
4851; RV32I-NEXT: sw a2, 0(sp)
4852; RV32I-NEXT: bnez a0, .LBB200_5
4853; RV32I-NEXT: .LBB200_4: # %atomicrmw.start
4854; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
4855; RV32I-NEXT: mv a2, s2
4856; RV32I-NEXT: .LBB200_5: # %atomicrmw.start
4857; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
4858; RV32I-NEXT: mv a3, a1
4859; RV32I-NEXT: bnez a0, .LBB200_7
4860; RV32I-NEXT: # %bb.6: # %atomicrmw.start
4861; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
4862; RV32I-NEXT: mv a3, s1
4863; RV32I-NEXT: .LBB200_7: # %atomicrmw.start
4864; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
4865; RV32I-NEXT: sw a1, 4(sp)
4866; RV32I-NEXT: mv a0, s3
4867; RV32I-NEXT: mv a1, s4
4868; RV32I-NEXT: mv a4, zero
4869; RV32I-NEXT: mv a5, zero
4870; RV32I-NEXT: call __atomic_compare_exchange_8
4871; RV32I-NEXT: lw a1, 4(sp)
4872; RV32I-NEXT: lw a2, 0(sp)
4873; RV32I-NEXT: beqz a0, .LBB200_1
4874; RV32I-NEXT: # %bb.8: # %atomicrmw.end
4875; RV32I-NEXT: mv a0, a2
4876; RV32I-NEXT: lw s4, 12(sp)
4877; RV32I-NEXT: lw s3, 16(sp)
4878; RV32I-NEXT: lw s2, 20(sp)
4879; RV32I-NEXT: lw s1, 24(sp)
4880; RV32I-NEXT: lw ra, 28(sp)
4881; RV32I-NEXT: addi sp, sp, 32
4882; RV32I-NEXT: ret
4883 %1 = atomicrmw max i64* %a, i64 %b monotonic
4884 ret i64 %1
4885}
4886
4887define i64 @atomicrmw_max_i64_acquire(i64 *%a, i64 %b) nounwind {
4888; RV32I-LABEL: atomicrmw_max_i64_acquire:
4889; RV32I: # %bb.0:
4890; RV32I-NEXT: addi sp, sp, -32
4891; RV32I-NEXT: sw ra, 28(sp)
4892; RV32I-NEXT: sw s1, 24(sp)
4893; RV32I-NEXT: sw s2, 20(sp)
4894; RV32I-NEXT: sw s3, 16(sp)
4895; RV32I-NEXT: sw s4, 12(sp)
4896; RV32I-NEXT: sw s5, 8(sp)
4897; RV32I-NEXT: mv s1, a2
4898; RV32I-NEXT: mv s2, a1
4899; RV32I-NEXT: mv s3, a0
4900; RV32I-NEXT: lw a1, 4(a0)
4901; RV32I-NEXT: lw a2, 0(a0)
4902; RV32I-NEXT: mv s4, sp
4903; RV32I-NEXT: addi s5, zero, 2
4904; RV32I-NEXT: .LBB201_1: # %atomicrmw.start
4905; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4906; RV32I-NEXT: beq a1, s1, .LBB201_3
4907; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4908; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
4909; RV32I-NEXT: slt a0, s1, a1
4910; RV32I-NEXT: sw a2, 0(sp)
4911; RV32I-NEXT: beqz a0, .LBB201_4
4912; RV32I-NEXT: j .LBB201_5
4913; RV32I-NEXT: .LBB201_3: # in Loop: Header=BB201_1 Depth=1
4914; RV32I-NEXT: sltu a0, s2, a2
4915; RV32I-NEXT: sw a2, 0(sp)
4916; RV32I-NEXT: bnez a0, .LBB201_5
4917; RV32I-NEXT: .LBB201_4: # %atomicrmw.start
4918; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
4919; RV32I-NEXT: mv a2, s2
4920; RV32I-NEXT: .LBB201_5: # %atomicrmw.start
4921; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
4922; RV32I-NEXT: mv a3, a1
4923; RV32I-NEXT: bnez a0, .LBB201_7
4924; RV32I-NEXT: # %bb.6: # %atomicrmw.start
4925; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
4926; RV32I-NEXT: mv a3, s1
4927; RV32I-NEXT: .LBB201_7: # %atomicrmw.start
4928; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
4929; RV32I-NEXT: sw a1, 4(sp)
4930; RV32I-NEXT: mv a0, s3
4931; RV32I-NEXT: mv a1, s4
4932; RV32I-NEXT: mv a4, s5
4933; RV32I-NEXT: mv a5, s5
4934; RV32I-NEXT: call __atomic_compare_exchange_8
4935; RV32I-NEXT: lw a1, 4(sp)
4936; RV32I-NEXT: lw a2, 0(sp)
4937; RV32I-NEXT: beqz a0, .LBB201_1
4938; RV32I-NEXT: # %bb.8: # %atomicrmw.end
4939; RV32I-NEXT: mv a0, a2
4940; RV32I-NEXT: lw s5, 8(sp)
4941; RV32I-NEXT: lw s4, 12(sp)
4942; RV32I-NEXT: lw s3, 16(sp)
4943; RV32I-NEXT: lw s2, 20(sp)
4944; RV32I-NEXT: lw s1, 24(sp)
4945; RV32I-NEXT: lw ra, 28(sp)
4946; RV32I-NEXT: addi sp, sp, 32
4947; RV32I-NEXT: ret
4948 %1 = atomicrmw max i64* %a, i64 %b acquire
4949 ret i64 %1
4950}
4951
4952define i64 @atomicrmw_max_i64_release(i64 *%a, i64 %b) nounwind {
4953; RV32I-LABEL: atomicrmw_max_i64_release:
4954; RV32I: # %bb.0:
4955; RV32I-NEXT: addi sp, sp, -32
4956; RV32I-NEXT: sw ra, 28(sp)
4957; RV32I-NEXT: sw s1, 24(sp)
4958; RV32I-NEXT: sw s2, 20(sp)
4959; RV32I-NEXT: sw s3, 16(sp)
4960; RV32I-NEXT: sw s4, 12(sp)
4961; RV32I-NEXT: sw s5, 8(sp)
4962; RV32I-NEXT: mv s1, a2
4963; RV32I-NEXT: mv s2, a1
4964; RV32I-NEXT: mv s3, a0
4965; RV32I-NEXT: lw a1, 4(a0)
4966; RV32I-NEXT: lw a2, 0(a0)
4967; RV32I-NEXT: mv s4, sp
4968; RV32I-NEXT: addi s5, zero, 3
4969; RV32I-NEXT: .LBB202_1: # %atomicrmw.start
4970; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4971; RV32I-NEXT: beq a1, s1, .LBB202_3
4972; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4973; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
4974; RV32I-NEXT: slt a0, s1, a1
4975; RV32I-NEXT: sw a2, 0(sp)
4976; RV32I-NEXT: beqz a0, .LBB202_4
4977; RV32I-NEXT: j .LBB202_5
4978; RV32I-NEXT: .LBB202_3: # in Loop: Header=BB202_1 Depth=1
4979; RV32I-NEXT: sltu a0, s2, a2
4980; RV32I-NEXT: sw a2, 0(sp)
4981; RV32I-NEXT: bnez a0, .LBB202_5
4982; RV32I-NEXT: .LBB202_4: # %atomicrmw.start
4983; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
4984; RV32I-NEXT: mv a2, s2
4985; RV32I-NEXT: .LBB202_5: # %atomicrmw.start
4986; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
4987; RV32I-NEXT: mv a3, a1
4988; RV32I-NEXT: bnez a0, .LBB202_7
4989; RV32I-NEXT: # %bb.6: # %atomicrmw.start
4990; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
4991; RV32I-NEXT: mv a3, s1
4992; RV32I-NEXT: .LBB202_7: # %atomicrmw.start
4993; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
4994; RV32I-NEXT: sw a1, 4(sp)
4995; RV32I-NEXT: mv a0, s3
4996; RV32I-NEXT: mv a1, s4
4997; RV32I-NEXT: mv a4, s5
4998; RV32I-NEXT: mv a5, zero
4999; RV32I-NEXT: call __atomic_compare_exchange_8
5000; RV32I-NEXT: lw a1, 4(sp)
5001; RV32I-NEXT: lw a2, 0(sp)
5002; RV32I-NEXT: beqz a0, .LBB202_1
5003; RV32I-NEXT: # %bb.8: # %atomicrmw.end
5004; RV32I-NEXT: mv a0, a2
5005; RV32I-NEXT: lw s5, 8(sp)
5006; RV32I-NEXT: lw s4, 12(sp)
5007; RV32I-NEXT: lw s3, 16(sp)
5008; RV32I-NEXT: lw s2, 20(sp)
5009; RV32I-NEXT: lw s1, 24(sp)
5010; RV32I-NEXT: lw ra, 28(sp)
5011; RV32I-NEXT: addi sp, sp, 32
5012; RV32I-NEXT: ret
5013 %1 = atomicrmw max i64* %a, i64 %b release
5014 ret i64 %1
5015}
5016
5017define i64 @atomicrmw_max_i64_acq_rel(i64 *%a, i64 %b) nounwind {
5018; RV32I-LABEL: atomicrmw_max_i64_acq_rel:
5019; RV32I: # %bb.0:
5020; RV32I-NEXT: addi sp, sp, -48
5021; RV32I-NEXT: sw ra, 44(sp)
5022; RV32I-NEXT: sw s1, 40(sp)
5023; RV32I-NEXT: sw s2, 36(sp)
5024; RV32I-NEXT: sw s3, 32(sp)
5025; RV32I-NEXT: sw s4, 28(sp)
5026; RV32I-NEXT: sw s5, 24(sp)
5027; RV32I-NEXT: sw s6, 20(sp)
5028; RV32I-NEXT: mv s1, a2
5029; RV32I-NEXT: mv s2, a1
5030; RV32I-NEXT: mv s3, a0
5031; RV32I-NEXT: lw a1, 4(a0)
5032; RV32I-NEXT: lw a2, 0(a0)
5033; RV32I-NEXT: addi s4, sp, 8
5034; RV32I-NEXT: addi s5, zero, 4
5035; RV32I-NEXT: addi s6, zero, 2
5036; RV32I-NEXT: .LBB203_1: # %atomicrmw.start
5037; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5038; RV32I-NEXT: beq a1, s1, .LBB203_3
5039; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5040; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
5041; RV32I-NEXT: slt a0, s1, a1
5042; RV32I-NEXT: sw a2, 8(sp)
5043; RV32I-NEXT: beqz a0, .LBB203_4
5044; RV32I-NEXT: j .LBB203_5
5045; RV32I-NEXT: .LBB203_3: # in Loop: Header=BB203_1 Depth=1
5046; RV32I-NEXT: sltu a0, s2, a2
5047; RV32I-NEXT: sw a2, 8(sp)
5048; RV32I-NEXT: bnez a0, .LBB203_5
5049; RV32I-NEXT: .LBB203_4: # %atomicrmw.start
5050; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
5051; RV32I-NEXT: mv a2, s2
5052; RV32I-NEXT: .LBB203_5: # %atomicrmw.start
5053; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
5054; RV32I-NEXT: mv a3, a1
5055; RV32I-NEXT: bnez a0, .LBB203_7
5056; RV32I-NEXT: # %bb.6: # %atomicrmw.start
5057; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
5058; RV32I-NEXT: mv a3, s1
5059; RV32I-NEXT: .LBB203_7: # %atomicrmw.start
5060; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
5061; RV32I-NEXT: sw a1, 12(sp)
5062; RV32I-NEXT: mv a0, s3
5063; RV32I-NEXT: mv a1, s4
5064; RV32I-NEXT: mv a4, s5
5065; RV32I-NEXT: mv a5, s6
5066; RV32I-NEXT: call __atomic_compare_exchange_8
5067; RV32I-NEXT: lw a1, 12(sp)
5068; RV32I-NEXT: lw a2, 8(sp)
5069; RV32I-NEXT: beqz a0, .LBB203_1
5070; RV32I-NEXT: # %bb.8: # %atomicrmw.end
5071; RV32I-NEXT: mv a0, a2
5072; RV32I-NEXT: lw s6, 20(sp)
5073; RV32I-NEXT: lw s5, 24(sp)
5074; RV32I-NEXT: lw s4, 28(sp)
5075; RV32I-NEXT: lw s3, 32(sp)
5076; RV32I-NEXT: lw s2, 36(sp)
5077; RV32I-NEXT: lw s1, 40(sp)
5078; RV32I-NEXT: lw ra, 44(sp)
5079; RV32I-NEXT: addi sp, sp, 48
5080; RV32I-NEXT: ret
5081 %1 = atomicrmw max i64* %a, i64 %b acq_rel
5082 ret i64 %1
5083}
5084
5085define i64 @atomicrmw_max_i64_seq_cst(i64 *%a, i64 %b) nounwind {
5086; RV32I-LABEL: atomicrmw_max_i64_seq_cst:
5087; RV32I: # %bb.0:
5088; RV32I-NEXT: addi sp, sp, -32
5089; RV32I-NEXT: sw ra, 28(sp)
5090; RV32I-NEXT: sw s1, 24(sp)
5091; RV32I-NEXT: sw s2, 20(sp)
5092; RV32I-NEXT: sw s3, 16(sp)
5093; RV32I-NEXT: sw s4, 12(sp)
5094; RV32I-NEXT: sw s5, 8(sp)
5095; RV32I-NEXT: mv s1, a2
5096; RV32I-NEXT: mv s2, a1
5097; RV32I-NEXT: mv s3, a0
5098; RV32I-NEXT: lw a1, 4(a0)
5099; RV32I-NEXT: lw a2, 0(a0)
5100; RV32I-NEXT: mv s4, sp
5101; RV32I-NEXT: addi s5, zero, 5
5102; RV32I-NEXT: .LBB204_1: # %atomicrmw.start
5103; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5104; RV32I-NEXT: beq a1, s1, .LBB204_3
5105; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5106; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
5107; RV32I-NEXT: slt a0, s1, a1
5108; RV32I-NEXT: sw a2, 0(sp)
5109; RV32I-NEXT: beqz a0, .LBB204_4
5110; RV32I-NEXT: j .LBB204_5
5111; RV32I-NEXT: .LBB204_3: # in Loop: Header=BB204_1 Depth=1
5112; RV32I-NEXT: sltu a0, s2, a2
5113; RV32I-NEXT: sw a2, 0(sp)
5114; RV32I-NEXT: bnez a0, .LBB204_5
5115; RV32I-NEXT: .LBB204_4: # %atomicrmw.start
5116; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
5117; RV32I-NEXT: mv a2, s2
5118; RV32I-NEXT: .LBB204_5: # %atomicrmw.start
5119; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
5120; RV32I-NEXT: mv a3, a1
5121; RV32I-NEXT: bnez a0, .LBB204_7
5122; RV32I-NEXT: # %bb.6: # %atomicrmw.start
5123; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
5124; RV32I-NEXT: mv a3, s1
5125; RV32I-NEXT: .LBB204_7: # %atomicrmw.start
5126; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
5127; RV32I-NEXT: sw a1, 4(sp)
5128; RV32I-NEXT: mv a0, s3
5129; RV32I-NEXT: mv a1, s4
5130; RV32I-NEXT: mv a4, s5
5131; RV32I-NEXT: mv a5, s5
5132; RV32I-NEXT: call __atomic_compare_exchange_8
5133; RV32I-NEXT: lw a1, 4(sp)
5134; RV32I-NEXT: lw a2, 0(sp)
5135; RV32I-NEXT: beqz a0, .LBB204_1
5136; RV32I-NEXT: # %bb.8: # %atomicrmw.end
5137; RV32I-NEXT: mv a0, a2
5138; RV32I-NEXT: lw s5, 8(sp)
5139; RV32I-NEXT: lw s4, 12(sp)
5140; RV32I-NEXT: lw s3, 16(sp)
5141; RV32I-NEXT: lw s2, 20(sp)
5142; RV32I-NEXT: lw s1, 24(sp)
5143; RV32I-NEXT: lw ra, 28(sp)
5144; RV32I-NEXT: addi sp, sp, 32
5145; RV32I-NEXT: ret
5146 %1 = atomicrmw max i64* %a, i64 %b seq_cst
5147 ret i64 %1
5148}
5149
5150define i64 @atomicrmw_min_i64_monotonic(i64 *%a, i64 %b) nounwind {
5151; RV32I-LABEL: atomicrmw_min_i64_monotonic:
5152; RV32I: # %bb.0:
5153; RV32I-NEXT: addi sp, sp, -32
5154; RV32I-NEXT: sw ra, 28(sp)
5155; RV32I-NEXT: sw s1, 24(sp)
5156; RV32I-NEXT: sw s2, 20(sp)
5157; RV32I-NEXT: sw s3, 16(sp)
5158; RV32I-NEXT: sw s4, 12(sp)
5159; RV32I-NEXT: mv s1, a2
5160; RV32I-NEXT: mv s2, a1
5161; RV32I-NEXT: mv s3, a0
5162; RV32I-NEXT: lw a1, 4(a0)
5163; RV32I-NEXT: lw a2, 0(a0)
5164; RV32I-NEXT: mv s4, sp
5165; RV32I-NEXT: .LBB205_1: # %atomicrmw.start
5166; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5167; RV32I-NEXT: beq a1, s1, .LBB205_3
5168; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5169; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
5170; RV32I-NEXT: slt a0, s1, a1
5171; RV32I-NEXT: j .LBB205_4
5172; RV32I-NEXT: .LBB205_3: # in Loop: Header=BB205_1 Depth=1
5173; RV32I-NEXT: sltu a0, s2, a2
5174; RV32I-NEXT: .LBB205_4: # %atomicrmw.start
5175; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
5176; RV32I-NEXT: xori a0, a0, 1
5177; RV32I-NEXT: sw a2, 0(sp)
5178; RV32I-NEXT: bnez a0, .LBB205_6
5179; RV32I-NEXT: # %bb.5: # %atomicrmw.start
5180; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
5181; RV32I-NEXT: mv a2, s2
5182; RV32I-NEXT: .LBB205_6: # %atomicrmw.start
5183; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
5184; RV32I-NEXT: mv a3, a1
5185; RV32I-NEXT: bnez a0, .LBB205_8
5186; RV32I-NEXT: # %bb.7: # %atomicrmw.start
5187; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
5188; RV32I-NEXT: mv a3, s1
5189; RV32I-NEXT: .LBB205_8: # %atomicrmw.start
5190; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
5191; RV32I-NEXT: sw a1, 4(sp)
5192; RV32I-NEXT: mv a0, s3
5193; RV32I-NEXT: mv a1, s4
5194; RV32I-NEXT: mv a4, zero
5195; RV32I-NEXT: mv a5, zero
5196; RV32I-NEXT: call __atomic_compare_exchange_8
5197; RV32I-NEXT: lw a1, 4(sp)
5198; RV32I-NEXT: lw a2, 0(sp)
5199; RV32I-NEXT: beqz a0, .LBB205_1
5200; RV32I-NEXT: # %bb.9: # %atomicrmw.end
5201; RV32I-NEXT: mv a0, a2
5202; RV32I-NEXT: lw s4, 12(sp)
5203; RV32I-NEXT: lw s3, 16(sp)
5204; RV32I-NEXT: lw s2, 20(sp)
5205; RV32I-NEXT: lw s1, 24(sp)
5206; RV32I-NEXT: lw ra, 28(sp)
5207; RV32I-NEXT: addi sp, sp, 32
5208; RV32I-NEXT: ret
5209 %1 = atomicrmw min i64* %a, i64 %b monotonic
5210 ret i64 %1
5211}
5212
5213define i64 @atomicrmw_min_i64_acquire(i64 *%a, i64 %b) nounwind {
5214; RV32I-LABEL: atomicrmw_min_i64_acquire:
5215; RV32I: # %bb.0:
5216; RV32I-NEXT: addi sp, sp, -32
5217; RV32I-NEXT: sw ra, 28(sp)
5218; RV32I-NEXT: sw s1, 24(sp)
5219; RV32I-NEXT: sw s2, 20(sp)
5220; RV32I-NEXT: sw s3, 16(sp)
5221; RV32I-NEXT: sw s4, 12(sp)
5222; RV32I-NEXT: sw s5, 8(sp)
5223; RV32I-NEXT: mv s1, a2
5224; RV32I-NEXT: mv s2, a1
5225; RV32I-NEXT: mv s3, a0
5226; RV32I-NEXT: lw a1, 4(a0)
5227; RV32I-NEXT: lw a2, 0(a0)
5228; RV32I-NEXT: mv s4, sp
5229; RV32I-NEXT: addi s5, zero, 2
5230; RV32I-NEXT: .LBB206_1: # %atomicrmw.start
5231; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5232; RV32I-NEXT: beq a1, s1, .LBB206_3
5233; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5234; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
5235; RV32I-NEXT: slt a0, s1, a1
5236; RV32I-NEXT: j .LBB206_4
5237; RV32I-NEXT: .LBB206_3: # in Loop: Header=BB206_1 Depth=1
5238; RV32I-NEXT: sltu a0, s2, a2
5239; RV32I-NEXT: .LBB206_4: # %atomicrmw.start
5240; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
5241; RV32I-NEXT: xori a0, a0, 1
5242; RV32I-NEXT: sw a2, 0(sp)
5243; RV32I-NEXT: bnez a0, .LBB206_6
5244; RV32I-NEXT: # %bb.5: # %atomicrmw.start
5245; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
5246; RV32I-NEXT: mv a2, s2
5247; RV32I-NEXT: .LBB206_6: # %atomicrmw.start
5248; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
5249; RV32I-NEXT: mv a3, a1
5250; RV32I-NEXT: bnez a0, .LBB206_8
5251; RV32I-NEXT: # %bb.7: # %atomicrmw.start
5252; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
5253; RV32I-NEXT: mv a3, s1
5254; RV32I-NEXT: .LBB206_8: # %atomicrmw.start
5255; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
5256; RV32I-NEXT: sw a1, 4(sp)
5257; RV32I-NEXT: mv a0, s3
5258; RV32I-NEXT: mv a1, s4
5259; RV32I-NEXT: mv a4, s5
5260; RV32I-NEXT: mv a5, s5
5261; RV32I-NEXT: call __atomic_compare_exchange_8
5262; RV32I-NEXT: lw a1, 4(sp)
5263; RV32I-NEXT: lw a2, 0(sp)
5264; RV32I-NEXT: beqz a0, .LBB206_1
5265; RV32I-NEXT: # %bb.9: # %atomicrmw.end
5266; RV32I-NEXT: mv a0, a2
5267; RV32I-NEXT: lw s5, 8(sp)
5268; RV32I-NEXT: lw s4, 12(sp)
5269; RV32I-NEXT: lw s3, 16(sp)
5270; RV32I-NEXT: lw s2, 20(sp)
5271; RV32I-NEXT: lw s1, 24(sp)
5272; RV32I-NEXT: lw ra, 28(sp)
5273; RV32I-NEXT: addi sp, sp, 32
5274; RV32I-NEXT: ret
5275 %1 = atomicrmw min i64* %a, i64 %b acquire
5276 ret i64 %1
5277}
5278
5279define i64 @atomicrmw_min_i64_release(i64 *%a, i64 %b) nounwind {
5280; RV32I-LABEL: atomicrmw_min_i64_release:
5281; RV32I: # %bb.0:
5282; RV32I-NEXT: addi sp, sp, -32
5283; RV32I-NEXT: sw ra, 28(sp)
5284; RV32I-NEXT: sw s1, 24(sp)
5285; RV32I-NEXT: sw s2, 20(sp)
5286; RV32I-NEXT: sw s3, 16(sp)
5287; RV32I-NEXT: sw s4, 12(sp)
5288; RV32I-NEXT: sw s5, 8(sp)
5289; RV32I-NEXT: mv s1, a2
5290; RV32I-NEXT: mv s2, a1
5291; RV32I-NEXT: mv s3, a0
5292; RV32I-NEXT: lw a1, 4(a0)
5293; RV32I-NEXT: lw a2, 0(a0)
5294; RV32I-NEXT: mv s4, sp
5295; RV32I-NEXT: addi s5, zero, 3
5296; RV32I-NEXT: .LBB207_1: # %atomicrmw.start
5297; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5298; RV32I-NEXT: beq a1, s1, .LBB207_3
5299; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5300; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
5301; RV32I-NEXT: slt a0, s1, a1
5302; RV32I-NEXT: j .LBB207_4
5303; RV32I-NEXT: .LBB207_3: # in Loop: Header=BB207_1 Depth=1
5304; RV32I-NEXT: sltu a0, s2, a2
5305; RV32I-NEXT: .LBB207_4: # %atomicrmw.start
5306; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
5307; RV32I-NEXT: xori a0, a0, 1
5308; RV32I-NEXT: sw a2, 0(sp)
5309; RV32I-NEXT: bnez a0, .LBB207_6
5310; RV32I-NEXT: # %bb.5: # %atomicrmw.start
5311; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
5312; RV32I-NEXT: mv a2, s2
5313; RV32I-NEXT: .LBB207_6: # %atomicrmw.start
5314; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
5315; RV32I-NEXT: mv a3, a1
5316; RV32I-NEXT: bnez a0, .LBB207_8
5317; RV32I-NEXT: # %bb.7: # %atomicrmw.start
5318; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
5319; RV32I-NEXT: mv a3, s1
5320; RV32I-NEXT: .LBB207_8: # %atomicrmw.start
5321; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
5322; RV32I-NEXT: sw a1, 4(sp)
5323; RV32I-NEXT: mv a0, s3
5324; RV32I-NEXT: mv a1, s4
5325; RV32I-NEXT: mv a4, s5
5326; RV32I-NEXT: mv a5, zero
5327; RV32I-NEXT: call __atomic_compare_exchange_8
5328; RV32I-NEXT: lw a1, 4(sp)
5329; RV32I-NEXT: lw a2, 0(sp)
5330; RV32I-NEXT: beqz a0, .LBB207_1
5331; RV32I-NEXT: # %bb.9: # %atomicrmw.end
5332; RV32I-NEXT: mv a0, a2
5333; RV32I-NEXT: lw s5, 8(sp)
5334; RV32I-NEXT: lw s4, 12(sp)
5335; RV32I-NEXT: lw s3, 16(sp)
5336; RV32I-NEXT: lw s2, 20(sp)
5337; RV32I-NEXT: lw s1, 24(sp)
5338; RV32I-NEXT: lw ra, 28(sp)
5339; RV32I-NEXT: addi sp, sp, 32
5340; RV32I-NEXT: ret
5341 %1 = atomicrmw min i64* %a, i64 %b release
5342 ret i64 %1
5343}
5344
5345define i64 @atomicrmw_min_i64_acq_rel(i64 *%a, i64 %b) nounwind {
5346; RV32I-LABEL: atomicrmw_min_i64_acq_rel:
5347; RV32I: # %bb.0:
5348; RV32I-NEXT: addi sp, sp, -48
5349; RV32I-NEXT: sw ra, 44(sp)
5350; RV32I-NEXT: sw s1, 40(sp)
5351; RV32I-NEXT: sw s2, 36(sp)
5352; RV32I-NEXT: sw s3, 32(sp)
5353; RV32I-NEXT: sw s4, 28(sp)
5354; RV32I-NEXT: sw s5, 24(sp)
5355; RV32I-NEXT: sw s6, 20(sp)
5356; RV32I-NEXT: mv s1, a2
5357; RV32I-NEXT: mv s2, a1
5358; RV32I-NEXT: mv s3, a0
5359; RV32I-NEXT: lw a1, 4(a0)
5360; RV32I-NEXT: lw a2, 0(a0)
5361; RV32I-NEXT: addi s4, sp, 8
5362; RV32I-NEXT: addi s5, zero, 4
5363; RV32I-NEXT: addi s6, zero, 2
5364; RV32I-NEXT: .LBB208_1: # %atomicrmw.start
5365; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5366; RV32I-NEXT: beq a1, s1, .LBB208_3
5367; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5368; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
5369; RV32I-NEXT: slt a0, s1, a1
5370; RV32I-NEXT: j .LBB208_4
5371; RV32I-NEXT: .LBB208_3: # in Loop: Header=BB208_1 Depth=1
5372; RV32I-NEXT: sltu a0, s2, a2
5373; RV32I-NEXT: .LBB208_4: # %atomicrmw.start
5374; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
5375; RV32I-NEXT: xori a0, a0, 1
5376; RV32I-NEXT: sw a2, 8(sp)
5377; RV32I-NEXT: bnez a0, .LBB208_6
5378; RV32I-NEXT: # %bb.5: # %atomicrmw.start
5379; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
5380; RV32I-NEXT: mv a2, s2
5381; RV32I-NEXT: .LBB208_6: # %atomicrmw.start
5382; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
5383; RV32I-NEXT: mv a3, a1
5384; RV32I-NEXT: bnez a0, .LBB208_8
5385; RV32I-NEXT: # %bb.7: # %atomicrmw.start
5386; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
5387; RV32I-NEXT: mv a3, s1
5388; RV32I-NEXT: .LBB208_8: # %atomicrmw.start
5389; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
5390; RV32I-NEXT: sw a1, 12(sp)
5391; RV32I-NEXT: mv a0, s3
5392; RV32I-NEXT: mv a1, s4
5393; RV32I-NEXT: mv a4, s5
5394; RV32I-NEXT: mv a5, s6
5395; RV32I-NEXT: call __atomic_compare_exchange_8
5396; RV32I-NEXT: lw a1, 12(sp)
5397; RV32I-NEXT: lw a2, 8(sp)
5398; RV32I-NEXT: beqz a0, .LBB208_1
5399; RV32I-NEXT: # %bb.9: # %atomicrmw.end
5400; RV32I-NEXT: mv a0, a2
5401; RV32I-NEXT: lw s6, 20(sp)
5402; RV32I-NEXT: lw s5, 24(sp)
5403; RV32I-NEXT: lw s4, 28(sp)
5404; RV32I-NEXT: lw s3, 32(sp)
5405; RV32I-NEXT: lw s2, 36(sp)
5406; RV32I-NEXT: lw s1, 40(sp)
5407; RV32I-NEXT: lw ra, 44(sp)
5408; RV32I-NEXT: addi sp, sp, 48
5409; RV32I-NEXT: ret
5410 %1 = atomicrmw min i64* %a, i64 %b acq_rel
5411 ret i64 %1
5412}
5413
5414define i64 @atomicrmw_min_i64_seq_cst(i64 *%a, i64 %b) nounwind {
5415; RV32I-LABEL: atomicrmw_min_i64_seq_cst:
5416; RV32I: # %bb.0:
5417; RV32I-NEXT: addi sp, sp, -32
5418; RV32I-NEXT: sw ra, 28(sp)
5419; RV32I-NEXT: sw s1, 24(sp)
5420; RV32I-NEXT: sw s2, 20(sp)
5421; RV32I-NEXT: sw s3, 16(sp)
5422; RV32I-NEXT: sw s4, 12(sp)
5423; RV32I-NEXT: sw s5, 8(sp)
5424; RV32I-NEXT: mv s1, a2
5425; RV32I-NEXT: mv s2, a1
5426; RV32I-NEXT: mv s3, a0
5427; RV32I-NEXT: lw a1, 4(a0)
5428; RV32I-NEXT: lw a2, 0(a0)
5429; RV32I-NEXT: mv s4, sp
5430; RV32I-NEXT: addi s5, zero, 5
5431; RV32I-NEXT: .LBB209_1: # %atomicrmw.start
5432; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5433; RV32I-NEXT: beq a1, s1, .LBB209_3
5434; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5435; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
5436; RV32I-NEXT: slt a0, s1, a1
5437; RV32I-NEXT: j .LBB209_4
5438; RV32I-NEXT: .LBB209_3: # in Loop: Header=BB209_1 Depth=1
5439; RV32I-NEXT: sltu a0, s2, a2
5440; RV32I-NEXT: .LBB209_4: # %atomicrmw.start
5441; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
5442; RV32I-NEXT: xori a0, a0, 1
5443; RV32I-NEXT: sw a2, 0(sp)
5444; RV32I-NEXT: bnez a0, .LBB209_6
5445; RV32I-NEXT: # %bb.5: # %atomicrmw.start
5446; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
5447; RV32I-NEXT: mv a2, s2
5448; RV32I-NEXT: .LBB209_6: # %atomicrmw.start
5449; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
5450; RV32I-NEXT: mv a3, a1
5451; RV32I-NEXT: bnez a0, .LBB209_8
5452; RV32I-NEXT: # %bb.7: # %atomicrmw.start
5453; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
5454; RV32I-NEXT: mv a3, s1
5455; RV32I-NEXT: .LBB209_8: # %atomicrmw.start
5456; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
5457; RV32I-NEXT: sw a1, 4(sp)
5458; RV32I-NEXT: mv a0, s3
5459; RV32I-NEXT: mv a1, s4
5460; RV32I-NEXT: mv a4, s5
5461; RV32I-NEXT: mv a5, s5
5462; RV32I-NEXT: call __atomic_compare_exchange_8
5463; RV32I-NEXT: lw a1, 4(sp)
5464; RV32I-NEXT: lw a2, 0(sp)
5465; RV32I-NEXT: beqz a0, .LBB209_1
5466; RV32I-NEXT: # %bb.9: # %atomicrmw.end
5467; RV32I-NEXT: mv a0, a2
5468; RV32I-NEXT: lw s5, 8(sp)
5469; RV32I-NEXT: lw s4, 12(sp)
5470; RV32I-NEXT: lw s3, 16(sp)
5471; RV32I-NEXT: lw s2, 20(sp)
5472; RV32I-NEXT: lw s1, 24(sp)
5473; RV32I-NEXT: lw ra, 28(sp)
5474; RV32I-NEXT: addi sp, sp, 32
5475; RV32I-NEXT: ret
5476 %1 = atomicrmw min i64* %a, i64 %b seq_cst
5477 ret i64 %1
5478}
5479
5480define i64 @atomicrmw_umax_i64_monotonic(i64 *%a, i64 %b) nounwind {
5481; RV32I-LABEL: atomicrmw_umax_i64_monotonic:
5482; RV32I: # %bb.0:
5483; RV32I-NEXT: addi sp, sp, -32
5484; RV32I-NEXT: sw ra, 28(sp)
5485; RV32I-NEXT: sw s1, 24(sp)
5486; RV32I-NEXT: sw s2, 20(sp)
5487; RV32I-NEXT: sw s3, 16(sp)
5488; RV32I-NEXT: sw s4, 12(sp)
5489; RV32I-NEXT: mv s1, a2
5490; RV32I-NEXT: mv s2, a1
5491; RV32I-NEXT: mv s3, a0
5492; RV32I-NEXT: lw a1, 4(a0)
5493; RV32I-NEXT: lw a2, 0(a0)
5494; RV32I-NEXT: mv s4, sp
5495; RV32I-NEXT: .LBB210_1: # %atomicrmw.start
5496; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5497; RV32I-NEXT: beq a1, s1, .LBB210_3
5498; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5499; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
5500; RV32I-NEXT: sltu a0, s1, a1
5501; RV32I-NEXT: sw a2, 0(sp)
5502; RV32I-NEXT: beqz a0, .LBB210_4
5503; RV32I-NEXT: j .LBB210_5
5504; RV32I-NEXT: .LBB210_3: # in Loop: Header=BB210_1 Depth=1
5505; RV32I-NEXT: sltu a0, s2, a2
5506; RV32I-NEXT: sw a2, 0(sp)
5507; RV32I-NEXT: bnez a0, .LBB210_5
5508; RV32I-NEXT: .LBB210_4: # %atomicrmw.start
5509; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
5510; RV32I-NEXT: mv a2, s2
5511; RV32I-NEXT: .LBB210_5: # %atomicrmw.start
5512; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
5513; RV32I-NEXT: mv a3, a1
5514; RV32I-NEXT: bnez a0, .LBB210_7
5515; RV32I-NEXT: # %bb.6: # %atomicrmw.start
5516; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
5517; RV32I-NEXT: mv a3, s1
5518; RV32I-NEXT: .LBB210_7: # %atomicrmw.start
5519; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
5520; RV32I-NEXT: sw a1, 4(sp)
5521; RV32I-NEXT: mv a0, s3
5522; RV32I-NEXT: mv a1, s4
5523; RV32I-NEXT: mv a4, zero
5524; RV32I-NEXT: mv a5, zero
5525; RV32I-NEXT: call __atomic_compare_exchange_8
5526; RV32I-NEXT: lw a1, 4(sp)
5527; RV32I-NEXT: lw a2, 0(sp)
5528; RV32I-NEXT: beqz a0, .LBB210_1
5529; RV32I-NEXT: # %bb.8: # %atomicrmw.end
5530; RV32I-NEXT: mv a0, a2
5531; RV32I-NEXT: lw s4, 12(sp)
5532; RV32I-NEXT: lw s3, 16(sp)
5533; RV32I-NEXT: lw s2, 20(sp)
5534; RV32I-NEXT: lw s1, 24(sp)
5535; RV32I-NEXT: lw ra, 28(sp)
5536; RV32I-NEXT: addi sp, sp, 32
5537; RV32I-NEXT: ret
5538 %1 = atomicrmw umax i64* %a, i64 %b monotonic
5539 ret i64 %1
5540}
5541
5542define i64 @atomicrmw_umax_i64_acquire(i64 *%a, i64 %b) nounwind {
5543; RV32I-LABEL: atomicrmw_umax_i64_acquire:
5544; RV32I: # %bb.0:
5545; RV32I-NEXT: addi sp, sp, -32
5546; RV32I-NEXT: sw ra, 28(sp)
5547; RV32I-NEXT: sw s1, 24(sp)
5548; RV32I-NEXT: sw s2, 20(sp)
5549; RV32I-NEXT: sw s3, 16(sp)
5550; RV32I-NEXT: sw s4, 12(sp)
5551; RV32I-NEXT: sw s5, 8(sp)
5552; RV32I-NEXT: mv s1, a2
5553; RV32I-NEXT: mv s2, a1
5554; RV32I-NEXT: mv s3, a0
5555; RV32I-NEXT: lw a1, 4(a0)
5556; RV32I-NEXT: lw a2, 0(a0)
5557; RV32I-NEXT: mv s4, sp
5558; RV32I-NEXT: addi s5, zero, 2
5559; RV32I-NEXT: .LBB211_1: # %atomicrmw.start
5560; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5561; RV32I-NEXT: beq a1, s1, .LBB211_3
5562; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5563; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
5564; RV32I-NEXT: sltu a0, s1, a1
5565; RV32I-NEXT: sw a2, 0(sp)
5566; RV32I-NEXT: beqz a0, .LBB211_4
5567; RV32I-NEXT: j .LBB211_5
5568; RV32I-NEXT: .LBB211_3: # in Loop: Header=BB211_1 Depth=1
5569; RV32I-NEXT: sltu a0, s2, a2
5570; RV32I-NEXT: sw a2, 0(sp)
5571; RV32I-NEXT: bnez a0, .LBB211_5
5572; RV32I-NEXT: .LBB211_4: # %atomicrmw.start
5573; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
5574; RV32I-NEXT: mv a2, s2
5575; RV32I-NEXT: .LBB211_5: # %atomicrmw.start
5576; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
5577; RV32I-NEXT: mv a3, a1
5578; RV32I-NEXT: bnez a0, .LBB211_7
5579; RV32I-NEXT: # %bb.6: # %atomicrmw.start
5580; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
5581; RV32I-NEXT: mv a3, s1
5582; RV32I-NEXT: .LBB211_7: # %atomicrmw.start
5583; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
5584; RV32I-NEXT: sw a1, 4(sp)
5585; RV32I-NEXT: mv a0, s3
5586; RV32I-NEXT: mv a1, s4
5587; RV32I-NEXT: mv a4, s5
5588; RV32I-NEXT: mv a5, s5
5589; RV32I-NEXT: call __atomic_compare_exchange_8
5590; RV32I-NEXT: lw a1, 4(sp)
5591; RV32I-NEXT: lw a2, 0(sp)
5592; RV32I-NEXT: beqz a0, .LBB211_1
5593; RV32I-NEXT: # %bb.8: # %atomicrmw.end
5594; RV32I-NEXT: mv a0, a2
5595; RV32I-NEXT: lw s5, 8(sp)
5596; RV32I-NEXT: lw s4, 12(sp)
5597; RV32I-NEXT: lw s3, 16(sp)
5598; RV32I-NEXT: lw s2, 20(sp)
5599; RV32I-NEXT: lw s1, 24(sp)
5600; RV32I-NEXT: lw ra, 28(sp)
5601; RV32I-NEXT: addi sp, sp, 32
5602; RV32I-NEXT: ret
5603 %1 = atomicrmw umax i64* %a, i64 %b acquire
5604 ret i64 %1
5605}
5606
5607define i64 @atomicrmw_umax_i64_release(i64 *%a, i64 %b) nounwind {
5608; RV32I-LABEL: atomicrmw_umax_i64_release:
5609; RV32I: # %bb.0:
5610; RV32I-NEXT: addi sp, sp, -32
5611; RV32I-NEXT: sw ra, 28(sp)
5612; RV32I-NEXT: sw s1, 24(sp)
5613; RV32I-NEXT: sw s2, 20(sp)
5614; RV32I-NEXT: sw s3, 16(sp)
5615; RV32I-NEXT: sw s4, 12(sp)
5616; RV32I-NEXT: sw s5, 8(sp)
5617; RV32I-NEXT: mv s1, a2
5618; RV32I-NEXT: mv s2, a1
5619; RV32I-NEXT: mv s3, a0
5620; RV32I-NEXT: lw a1, 4(a0)
5621; RV32I-NEXT: lw a2, 0(a0)
5622; RV32I-NEXT: mv s4, sp
5623; RV32I-NEXT: addi s5, zero, 3
5624; RV32I-NEXT: .LBB212_1: # %atomicrmw.start
5625; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5626; RV32I-NEXT: beq a1, s1, .LBB212_3
5627; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5628; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
5629; RV32I-NEXT: sltu a0, s1, a1
5630; RV32I-NEXT: sw a2, 0(sp)
5631; RV32I-NEXT: beqz a0, .LBB212_4
5632; RV32I-NEXT: j .LBB212_5
5633; RV32I-NEXT: .LBB212_3: # in Loop: Header=BB212_1 Depth=1
5634; RV32I-NEXT: sltu a0, s2, a2
5635; RV32I-NEXT: sw a2, 0(sp)
5636; RV32I-NEXT: bnez a0, .LBB212_5
5637; RV32I-NEXT: .LBB212_4: # %atomicrmw.start
5638; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
5639; RV32I-NEXT: mv a2, s2
5640; RV32I-NEXT: .LBB212_5: # %atomicrmw.start
5641; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
5642; RV32I-NEXT: mv a3, a1
5643; RV32I-NEXT: bnez a0, .LBB212_7
5644; RV32I-NEXT: # %bb.6: # %atomicrmw.start
5645; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
5646; RV32I-NEXT: mv a3, s1
5647; RV32I-NEXT: .LBB212_7: # %atomicrmw.start
5648; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
5649; RV32I-NEXT: sw a1, 4(sp)
5650; RV32I-NEXT: mv a0, s3
5651; RV32I-NEXT: mv a1, s4
5652; RV32I-NEXT: mv a4, s5
5653; RV32I-NEXT: mv a5, zero
5654; RV32I-NEXT: call __atomic_compare_exchange_8
5655; RV32I-NEXT: lw a1, 4(sp)
5656; RV32I-NEXT: lw a2, 0(sp)
5657; RV32I-NEXT: beqz a0, .LBB212_1
5658; RV32I-NEXT: # %bb.8: # %atomicrmw.end
5659; RV32I-NEXT: mv a0, a2
5660; RV32I-NEXT: lw s5, 8(sp)
5661; RV32I-NEXT: lw s4, 12(sp)
5662; RV32I-NEXT: lw s3, 16(sp)
5663; RV32I-NEXT: lw s2, 20(sp)
5664; RV32I-NEXT: lw s1, 24(sp)
5665; RV32I-NEXT: lw ra, 28(sp)
5666; RV32I-NEXT: addi sp, sp, 32
5667; RV32I-NEXT: ret
5668 %1 = atomicrmw umax i64* %a, i64 %b release
5669 ret i64 %1
5670}
5671
5672define i64 @atomicrmw_umax_i64_acq_rel(i64 *%a, i64 %b) nounwind {
5673; RV32I-LABEL: atomicrmw_umax_i64_acq_rel:
5674; RV32I: # %bb.0:
5675; RV32I-NEXT: addi sp, sp, -48
5676; RV32I-NEXT: sw ra, 44(sp)
5677; RV32I-NEXT: sw s1, 40(sp)
5678; RV32I-NEXT: sw s2, 36(sp)
5679; RV32I-NEXT: sw s3, 32(sp)
5680; RV32I-NEXT: sw s4, 28(sp)
5681; RV32I-NEXT: sw s5, 24(sp)
5682; RV32I-NEXT: sw s6, 20(sp)
5683; RV32I-NEXT: mv s1, a2
5684; RV32I-NEXT: mv s2, a1
5685; RV32I-NEXT: mv s3, a0
5686; RV32I-NEXT: lw a1, 4(a0)
5687; RV32I-NEXT: lw a2, 0(a0)
5688; RV32I-NEXT: addi s4, sp, 8
5689; RV32I-NEXT: addi s5, zero, 4
5690; RV32I-NEXT: addi s6, zero, 2
5691; RV32I-NEXT: .LBB213_1: # %atomicrmw.start
5692; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5693; RV32I-NEXT: beq a1, s1, .LBB213_3
5694; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5695; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
5696; RV32I-NEXT: sltu a0, s1, a1
5697; RV32I-NEXT: sw a2, 8(sp)
5698; RV32I-NEXT: beqz a0, .LBB213_4
5699; RV32I-NEXT: j .LBB213_5
5700; RV32I-NEXT: .LBB213_3: # in Loop: Header=BB213_1 Depth=1
5701; RV32I-NEXT: sltu a0, s2, a2
5702; RV32I-NEXT: sw a2, 8(sp)
5703; RV32I-NEXT: bnez a0, .LBB213_5
5704; RV32I-NEXT: .LBB213_4: # %atomicrmw.start
5705; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
5706; RV32I-NEXT: mv a2, s2
5707; RV32I-NEXT: .LBB213_5: # %atomicrmw.start
5708; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
5709; RV32I-NEXT: mv a3, a1
5710; RV32I-NEXT: bnez a0, .LBB213_7
5711; RV32I-NEXT: # %bb.6: # %atomicrmw.start
5712; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
5713; RV32I-NEXT: mv a3, s1
5714; RV32I-NEXT: .LBB213_7: # %atomicrmw.start
5715; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
5716; RV32I-NEXT: sw a1, 12(sp)
5717; RV32I-NEXT: mv a0, s3
5718; RV32I-NEXT: mv a1, s4
5719; RV32I-NEXT: mv a4, s5
5720; RV32I-NEXT: mv a5, s6
5721; RV32I-NEXT: call __atomic_compare_exchange_8
5722; RV32I-NEXT: lw a1, 12(sp)
5723; RV32I-NEXT: lw a2, 8(sp)
5724; RV32I-NEXT: beqz a0, .LBB213_1
5725; RV32I-NEXT: # %bb.8: # %atomicrmw.end
5726; RV32I-NEXT: mv a0, a2
5727; RV32I-NEXT: lw s6, 20(sp)
5728; RV32I-NEXT: lw s5, 24(sp)
5729; RV32I-NEXT: lw s4, 28(sp)
5730; RV32I-NEXT: lw s3, 32(sp)
5731; RV32I-NEXT: lw s2, 36(sp)
5732; RV32I-NEXT: lw s1, 40(sp)
5733; RV32I-NEXT: lw ra, 44(sp)
5734; RV32I-NEXT: addi sp, sp, 48
5735; RV32I-NEXT: ret
5736 %1 = atomicrmw umax i64* %a, i64 %b acq_rel
5737 ret i64 %1
5738}
5739
5740define i64 @atomicrmw_umax_i64_seq_cst(i64 *%a, i64 %b) nounwind {
5741; RV32I-LABEL: atomicrmw_umax_i64_seq_cst:
5742; RV32I: # %bb.0:
5743; RV32I-NEXT: addi sp, sp, -32
5744; RV32I-NEXT: sw ra, 28(sp)
5745; RV32I-NEXT: sw s1, 24(sp)
5746; RV32I-NEXT: sw s2, 20(sp)
5747; RV32I-NEXT: sw s3, 16(sp)
5748; RV32I-NEXT: sw s4, 12(sp)
5749; RV32I-NEXT: sw s5, 8(sp)
5750; RV32I-NEXT: mv s1, a2
5751; RV32I-NEXT: mv s2, a1
5752; RV32I-NEXT: mv s3, a0
5753; RV32I-NEXT: lw a1, 4(a0)
5754; RV32I-NEXT: lw a2, 0(a0)
5755; RV32I-NEXT: mv s4, sp
5756; RV32I-NEXT: addi s5, zero, 5
5757; RV32I-NEXT: .LBB214_1: # %atomicrmw.start
5758; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5759; RV32I-NEXT: beq a1, s1, .LBB214_3
5760; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5761; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
5762; RV32I-NEXT: sltu a0, s1, a1
5763; RV32I-NEXT: sw a2, 0(sp)
5764; RV32I-NEXT: beqz a0, .LBB214_4
5765; RV32I-NEXT: j .LBB214_5
5766; RV32I-NEXT: .LBB214_3: # in Loop: Header=BB214_1 Depth=1
5767; RV32I-NEXT: sltu a0, s2, a2
5768; RV32I-NEXT: sw a2, 0(sp)
5769; RV32I-NEXT: bnez a0, .LBB214_5
5770; RV32I-NEXT: .LBB214_4: # %atomicrmw.start
5771; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
5772; RV32I-NEXT: mv a2, s2
5773; RV32I-NEXT: .LBB214_5: # %atomicrmw.start
5774; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
5775; RV32I-NEXT: mv a3, a1
5776; RV32I-NEXT: bnez a0, .LBB214_7
5777; RV32I-NEXT: # %bb.6: # %atomicrmw.start
5778; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
5779; RV32I-NEXT: mv a3, s1
5780; RV32I-NEXT: .LBB214_7: # %atomicrmw.start
5781; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
5782; RV32I-NEXT: sw a1, 4(sp)
5783; RV32I-NEXT: mv a0, s3
5784; RV32I-NEXT: mv a1, s4
5785; RV32I-NEXT: mv a4, s5
5786; RV32I-NEXT: mv a5, s5
5787; RV32I-NEXT: call __atomic_compare_exchange_8
5788; RV32I-NEXT: lw a1, 4(sp)
5789; RV32I-NEXT: lw a2, 0(sp)
5790; RV32I-NEXT: beqz a0, .LBB214_1
5791; RV32I-NEXT: # %bb.8: # %atomicrmw.end
5792; RV32I-NEXT: mv a0, a2
5793; RV32I-NEXT: lw s5, 8(sp)
5794; RV32I-NEXT: lw s4, 12(sp)
5795; RV32I-NEXT: lw s3, 16(sp)
5796; RV32I-NEXT: lw s2, 20(sp)
5797; RV32I-NEXT: lw s1, 24(sp)
5798; RV32I-NEXT: lw ra, 28(sp)
5799; RV32I-NEXT: addi sp, sp, 32
5800; RV32I-NEXT: ret
5801 %1 = atomicrmw umax i64* %a, i64 %b seq_cst
5802 ret i64 %1
5803}
5804
5805define i64 @atomicrmw_umin_i64_monotonic(i64 *%a, i64 %b) nounwind {
5806; RV32I-LABEL: atomicrmw_umin_i64_monotonic:
5807; RV32I: # %bb.0:
5808; RV32I-NEXT: addi sp, sp, -32
5809; RV32I-NEXT: sw ra, 28(sp)
5810; RV32I-NEXT: sw s1, 24(sp)
5811; RV32I-NEXT: sw s2, 20(sp)
5812; RV32I-NEXT: sw s3, 16(sp)
5813; RV32I-NEXT: sw s4, 12(sp)
5814; RV32I-NEXT: mv s1, a2
5815; RV32I-NEXT: mv s2, a1
5816; RV32I-NEXT: mv s3, a0
5817; RV32I-NEXT: lw a1, 4(a0)
5818; RV32I-NEXT: lw a2, 0(a0)
5819; RV32I-NEXT: mv s4, sp
5820; RV32I-NEXT: .LBB215_1: # %atomicrmw.start
5821; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5822; RV32I-NEXT: beq a1, s1, .LBB215_3
5823; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5824; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
5825; RV32I-NEXT: sltu a0, s1, a1
5826; RV32I-NEXT: j .LBB215_4
5827; RV32I-NEXT: .LBB215_3: # in Loop: Header=BB215_1 Depth=1
5828; RV32I-NEXT: sltu a0, s2, a2
5829; RV32I-NEXT: .LBB215_4: # %atomicrmw.start
5830; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
5831; RV32I-NEXT: xori a0, a0, 1
5832; RV32I-NEXT: sw a2, 0(sp)
5833; RV32I-NEXT: bnez a0, .LBB215_6
5834; RV32I-NEXT: # %bb.5: # %atomicrmw.start
5835; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
5836; RV32I-NEXT: mv a2, s2
5837; RV32I-NEXT: .LBB215_6: # %atomicrmw.start
5838; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
5839; RV32I-NEXT: mv a3, a1
5840; RV32I-NEXT: bnez a0, .LBB215_8
5841; RV32I-NEXT: # %bb.7: # %atomicrmw.start
5842; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
5843; RV32I-NEXT: mv a3, s1
5844; RV32I-NEXT: .LBB215_8: # %atomicrmw.start
5845; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
5846; RV32I-NEXT: sw a1, 4(sp)
5847; RV32I-NEXT: mv a0, s3
5848; RV32I-NEXT: mv a1, s4
5849; RV32I-NEXT: mv a4, zero
5850; RV32I-NEXT: mv a5, zero
5851; RV32I-NEXT: call __atomic_compare_exchange_8
5852; RV32I-NEXT: lw a1, 4(sp)
5853; RV32I-NEXT: lw a2, 0(sp)
5854; RV32I-NEXT: beqz a0, .LBB215_1
5855; RV32I-NEXT: # %bb.9: # %atomicrmw.end
5856; RV32I-NEXT: mv a0, a2
5857; RV32I-NEXT: lw s4, 12(sp)
5858; RV32I-NEXT: lw s3, 16(sp)
5859; RV32I-NEXT: lw s2, 20(sp)
5860; RV32I-NEXT: lw s1, 24(sp)
5861; RV32I-NEXT: lw ra, 28(sp)
5862; RV32I-NEXT: addi sp, sp, 32
5863; RV32I-NEXT: ret
5864 %1 = atomicrmw umin i64* %a, i64 %b monotonic
5865 ret i64 %1
5866}
5867
5868define i64 @atomicrmw_umin_i64_acquire(i64 *%a, i64 %b) nounwind {
5869; RV32I-LABEL: atomicrmw_umin_i64_acquire:
5870; RV32I: # %bb.0:
5871; RV32I-NEXT: addi sp, sp, -32
5872; RV32I-NEXT: sw ra, 28(sp)
5873; RV32I-NEXT: sw s1, 24(sp)
5874; RV32I-NEXT: sw s2, 20(sp)
5875; RV32I-NEXT: sw s3, 16(sp)
5876; RV32I-NEXT: sw s4, 12(sp)
5877; RV32I-NEXT: sw s5, 8(sp)
5878; RV32I-NEXT: mv s1, a2
5879; RV32I-NEXT: mv s2, a1
5880; RV32I-NEXT: mv s3, a0
5881; RV32I-NEXT: lw a1, 4(a0)
5882; RV32I-NEXT: lw a2, 0(a0)
5883; RV32I-NEXT: mv s4, sp
5884; RV32I-NEXT: addi s5, zero, 2
5885; RV32I-NEXT: .LBB216_1: # %atomicrmw.start
5886; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5887; RV32I-NEXT: beq a1, s1, .LBB216_3
5888; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5889; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
5890; RV32I-NEXT: sltu a0, s1, a1
5891; RV32I-NEXT: j .LBB216_4
5892; RV32I-NEXT: .LBB216_3: # in Loop: Header=BB216_1 Depth=1
5893; RV32I-NEXT: sltu a0, s2, a2
5894; RV32I-NEXT: .LBB216_4: # %atomicrmw.start
5895; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
5896; RV32I-NEXT: xori a0, a0, 1
5897; RV32I-NEXT: sw a2, 0(sp)
5898; RV32I-NEXT: bnez a0, .LBB216_6
5899; RV32I-NEXT: # %bb.5: # %atomicrmw.start
5900; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
5901; RV32I-NEXT: mv a2, s2
5902; RV32I-NEXT: .LBB216_6: # %atomicrmw.start
5903; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
5904; RV32I-NEXT: mv a3, a1
5905; RV32I-NEXT: bnez a0, .LBB216_8
5906; RV32I-NEXT: # %bb.7: # %atomicrmw.start
5907; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
5908; RV32I-NEXT: mv a3, s1
5909; RV32I-NEXT: .LBB216_8: # %atomicrmw.start
5910; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
5911; RV32I-NEXT: sw a1, 4(sp)
5912; RV32I-NEXT: mv a0, s3
5913; RV32I-NEXT: mv a1, s4
5914; RV32I-NEXT: mv a4, s5
5915; RV32I-NEXT: mv a5, s5
5916; RV32I-NEXT: call __atomic_compare_exchange_8
5917; RV32I-NEXT: lw a1, 4(sp)
5918; RV32I-NEXT: lw a2, 0(sp)
5919; RV32I-NEXT: beqz a0, .LBB216_1
5920; RV32I-NEXT: # %bb.9: # %atomicrmw.end
5921; RV32I-NEXT: mv a0, a2
5922; RV32I-NEXT: lw s5, 8(sp)
5923; RV32I-NEXT: lw s4, 12(sp)
5924; RV32I-NEXT: lw s3, 16(sp)
5925; RV32I-NEXT: lw s2, 20(sp)
5926; RV32I-NEXT: lw s1, 24(sp)
5927; RV32I-NEXT: lw ra, 28(sp)
5928; RV32I-NEXT: addi sp, sp, 32
5929; RV32I-NEXT: ret
5930 %1 = atomicrmw umin i64* %a, i64 %b acquire
5931 ret i64 %1
5932}
5933
5934define i64 @atomicrmw_umin_i64_release(i64 *%a, i64 %b) nounwind {
5935; RV32I-LABEL: atomicrmw_umin_i64_release:
5936; RV32I: # %bb.0:
5937; RV32I-NEXT: addi sp, sp, -32
5938; RV32I-NEXT: sw ra, 28(sp)
5939; RV32I-NEXT: sw s1, 24(sp)
5940; RV32I-NEXT: sw s2, 20(sp)
5941; RV32I-NEXT: sw s3, 16(sp)
5942; RV32I-NEXT: sw s4, 12(sp)
5943; RV32I-NEXT: sw s5, 8(sp)
5944; RV32I-NEXT: mv s1, a2
5945; RV32I-NEXT: mv s2, a1
5946; RV32I-NEXT: mv s3, a0
5947; RV32I-NEXT: lw a1, 4(a0)
5948; RV32I-NEXT: lw a2, 0(a0)
5949; RV32I-NEXT: mv s4, sp
5950; RV32I-NEXT: addi s5, zero, 3
5951; RV32I-NEXT: .LBB217_1: # %atomicrmw.start
5952; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5953; RV32I-NEXT: beq a1, s1, .LBB217_3
5954; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5955; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
5956; RV32I-NEXT: sltu a0, s1, a1
5957; RV32I-NEXT: j .LBB217_4
5958; RV32I-NEXT: .LBB217_3: # in Loop: Header=BB217_1 Depth=1
5959; RV32I-NEXT: sltu a0, s2, a2
5960; RV32I-NEXT: .LBB217_4: # %atomicrmw.start
5961; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
5962; RV32I-NEXT: xori a0, a0, 1
5963; RV32I-NEXT: sw a2, 0(sp)
5964; RV32I-NEXT: bnez a0, .LBB217_6
5965; RV32I-NEXT: # %bb.5: # %atomicrmw.start
5966; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
5967; RV32I-NEXT: mv a2, s2
5968; RV32I-NEXT: .LBB217_6: # %atomicrmw.start
5969; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
5970; RV32I-NEXT: mv a3, a1
5971; RV32I-NEXT: bnez a0, .LBB217_8
5972; RV32I-NEXT: # %bb.7: # %atomicrmw.start
5973; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
5974; RV32I-NEXT: mv a3, s1
5975; RV32I-NEXT: .LBB217_8: # %atomicrmw.start
5976; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
5977; RV32I-NEXT: sw a1, 4(sp)
5978; RV32I-NEXT: mv a0, s3
5979; RV32I-NEXT: mv a1, s4
5980; RV32I-NEXT: mv a4, s5
5981; RV32I-NEXT: mv a5, zero
5982; RV32I-NEXT: call __atomic_compare_exchange_8
5983; RV32I-NEXT: lw a1, 4(sp)
5984; RV32I-NEXT: lw a2, 0(sp)
5985; RV32I-NEXT: beqz a0, .LBB217_1
5986; RV32I-NEXT: # %bb.9: # %atomicrmw.end
5987; RV32I-NEXT: mv a0, a2
5988; RV32I-NEXT: lw s5, 8(sp)
5989; RV32I-NEXT: lw s4, 12(sp)
5990; RV32I-NEXT: lw s3, 16(sp)
5991; RV32I-NEXT: lw s2, 20(sp)
5992; RV32I-NEXT: lw s1, 24(sp)
5993; RV32I-NEXT: lw ra, 28(sp)
5994; RV32I-NEXT: addi sp, sp, 32
5995; RV32I-NEXT: ret
5996 %1 = atomicrmw umin i64* %a, i64 %b release
5997 ret i64 %1
5998}
5999
6000define i64 @atomicrmw_umin_i64_acq_rel(i64 *%a, i64 %b) nounwind {
6001; RV32I-LABEL: atomicrmw_umin_i64_acq_rel:
6002; RV32I: # %bb.0:
6003; RV32I-NEXT: addi sp, sp, -48
6004; RV32I-NEXT: sw ra, 44(sp)
6005; RV32I-NEXT: sw s1, 40(sp)
6006; RV32I-NEXT: sw s2, 36(sp)
6007; RV32I-NEXT: sw s3, 32(sp)
6008; RV32I-NEXT: sw s4, 28(sp)
6009; RV32I-NEXT: sw s5, 24(sp)
6010; RV32I-NEXT: sw s6, 20(sp)
6011; RV32I-NEXT: mv s1, a2
6012; RV32I-NEXT: mv s2, a1
6013; RV32I-NEXT: mv s3, a0
6014; RV32I-NEXT: lw a1, 4(a0)
6015; RV32I-NEXT: lw a2, 0(a0)
6016; RV32I-NEXT: addi s4, sp, 8
6017; RV32I-NEXT: addi s5, zero, 4
6018; RV32I-NEXT: addi s6, zero, 2
6019; RV32I-NEXT: .LBB218_1: # %atomicrmw.start
6020; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6021; RV32I-NEXT: beq a1, s1, .LBB218_3
6022; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6023; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
6024; RV32I-NEXT: sltu a0, s1, a1
6025; RV32I-NEXT: j .LBB218_4
6026; RV32I-NEXT: .LBB218_3: # in Loop: Header=BB218_1 Depth=1
6027; RV32I-NEXT: sltu a0, s2, a2
6028; RV32I-NEXT: .LBB218_4: # %atomicrmw.start
6029; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
6030; RV32I-NEXT: xori a0, a0, 1
6031; RV32I-NEXT: sw a2, 8(sp)
6032; RV32I-NEXT: bnez a0, .LBB218_6
6033; RV32I-NEXT: # %bb.5: # %atomicrmw.start
6034; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
6035; RV32I-NEXT: mv a2, s2
6036; RV32I-NEXT: .LBB218_6: # %atomicrmw.start
6037; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
6038; RV32I-NEXT: mv a3, a1
6039; RV32I-NEXT: bnez a0, .LBB218_8
6040; RV32I-NEXT: # %bb.7: # %atomicrmw.start
6041; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
6042; RV32I-NEXT: mv a3, s1
6043; RV32I-NEXT: .LBB218_8: # %atomicrmw.start
6044; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
6045; RV32I-NEXT: sw a1, 12(sp)
6046; RV32I-NEXT: mv a0, s3
6047; RV32I-NEXT: mv a1, s4
6048; RV32I-NEXT: mv a4, s5
6049; RV32I-NEXT: mv a5, s6
6050; RV32I-NEXT: call __atomic_compare_exchange_8
6051; RV32I-NEXT: lw a1, 12(sp)
6052; RV32I-NEXT: lw a2, 8(sp)
6053; RV32I-NEXT: beqz a0, .LBB218_1
6054; RV32I-NEXT: # %bb.9: # %atomicrmw.end
6055; RV32I-NEXT: mv a0, a2
6056; RV32I-NEXT: lw s6, 20(sp)
6057; RV32I-NEXT: lw s5, 24(sp)
6058; RV32I-NEXT: lw s4, 28(sp)
6059; RV32I-NEXT: lw s3, 32(sp)
6060; RV32I-NEXT: lw s2, 36(sp)
6061; RV32I-NEXT: lw s1, 40(sp)
6062; RV32I-NEXT: lw ra, 44(sp)
6063; RV32I-NEXT: addi sp, sp, 48
6064; RV32I-NEXT: ret
6065 %1 = atomicrmw umin i64* %a, i64 %b acq_rel
6066 ret i64 %1
6067}
6068
6069define i64 @atomicrmw_umin_i64_seq_cst(i64 *%a, i64 %b) nounwind {
6070; RV32I-LABEL: atomicrmw_umin_i64_seq_cst:
6071; RV32I: # %bb.0:
6072; RV32I-NEXT: addi sp, sp, -32
6073; RV32I-NEXT: sw ra, 28(sp)
6074; RV32I-NEXT: sw s1, 24(sp)
6075; RV32I-NEXT: sw s2, 20(sp)
6076; RV32I-NEXT: sw s3, 16(sp)
6077; RV32I-NEXT: sw s4, 12(sp)
6078; RV32I-NEXT: sw s5, 8(sp)
6079; RV32I-NEXT: mv s1, a2
6080; RV32I-NEXT: mv s2, a1
6081; RV32I-NEXT: mv s3, a0
6082; RV32I-NEXT: lw a1, 4(a0)
6083; RV32I-NEXT: lw a2, 0(a0)
6084; RV32I-NEXT: mv s4, sp
6085; RV32I-NEXT: addi s5, zero, 5
6086; RV32I-NEXT: .LBB219_1: # %atomicrmw.start
6087; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6088; RV32I-NEXT: beq a1, s1, .LBB219_3
6089; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6090; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
6091; RV32I-NEXT: sltu a0, s1, a1
6092; RV32I-NEXT: j .LBB219_4
6093; RV32I-NEXT: .LBB219_3: # in Loop: Header=BB219_1 Depth=1
6094; RV32I-NEXT: sltu a0, s2, a2
6095; RV32I-NEXT: .LBB219_4: # %atomicrmw.start
6096; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
6097; RV32I-NEXT: xori a0, a0, 1
6098; RV32I-NEXT: sw a2, 0(sp)
6099; RV32I-NEXT: bnez a0, .LBB219_6
6100; RV32I-NEXT: # %bb.5: # %atomicrmw.start
6101; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
6102; RV32I-NEXT: mv a2, s2
6103; RV32I-NEXT: .LBB219_6: # %atomicrmw.start
6104; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
6105; RV32I-NEXT: mv a3, a1
6106; RV32I-NEXT: bnez a0, .LBB219_8
6107; RV32I-NEXT: # %bb.7: # %atomicrmw.start
6108; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
6109; RV32I-NEXT: mv a3, s1
6110; RV32I-NEXT: .LBB219_8: # %atomicrmw.start
6111; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
6112; RV32I-NEXT: sw a1, 4(sp)
6113; RV32I-NEXT: mv a0, s3
6114; RV32I-NEXT: mv a1, s4
6115; RV32I-NEXT: mv a4, s5
6116; RV32I-NEXT: mv a5, s5
6117; RV32I-NEXT: call __atomic_compare_exchange_8
6118; RV32I-NEXT: lw a1, 4(sp)
6119; RV32I-NEXT: lw a2, 0(sp)
6120; RV32I-NEXT: beqz a0, .LBB219_1
6121; RV32I-NEXT: # %bb.9: # %atomicrmw.end
6122; RV32I-NEXT: mv a0, a2
6123; RV32I-NEXT: lw s5, 8(sp)
6124; RV32I-NEXT: lw s4, 12(sp)
6125; RV32I-NEXT: lw s3, 16(sp)
6126; RV32I-NEXT: lw s2, 20(sp)
6127; RV32I-NEXT: lw s1, 24(sp)
6128; RV32I-NEXT: lw ra, 28(sp)
6129; RV32I-NEXT: addi sp, sp, 32
6130; RV32I-NEXT: ret
6131 %1 = atomicrmw umin i64* %a, i64 %b seq_cst
6132 ret i64 %1
6133}