blob: 0b7a38b9153f3df96bd52fd79800203eed709be8 [file] [log] [blame]
Tim Northover389a1e32016-06-15 20:33:36 +00001; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone < %s | FileCheck %s
Juergen Ributzkaa80dd082014-07-31 04:10:43 +00002; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -fast-isel < %s | FileCheck %s --check-prefix=FAST
Tim Northover389a1e32016-06-15 20:33:36 +00003; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -filetype=obj -o %t %s
4; RUN: llvm-objdump -triple arm64-apple-darwin -d %t | FileCheck %s --check-prefix CHECK-ENCODING
5
6; CHECK-ENCODING-NOT: <unknown>
Tim Northoverdaa1c012016-06-16 01:42:25 +00007; CHECK-ENCODING: mov x16, #281470681743360
Tim Northover389a1e32016-06-15 20:33:36 +00008; CHECK-ENCODING: movk x16, #57005, lsl #16
9; CHECK-ENCODING: movk x16, #48879
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000010
11; One argument will be passed in register, the other will be pushed on the stack.
12; Return value in x0.
13define void @jscall_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
14entry:
15; CHECK-LABEL: jscall_patchpoint_codegen:
Geoff Berrya5335642016-05-06 16:34:59 +000016; CHECK: str x{{.+}}, [sp]
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000017; CHECK-NEXT: mov x0, x{{.+}}
18; CHECK: Ltmp
Tim Northoverdaa1c012016-06-16 01:42:25 +000019; CHECK-NEXT: mov x16, #281470681743360
Tim Northover389a1e32016-06-15 20:33:36 +000020; CHECK: movk x16, #57005, lsl #16
21; CHECK: movk x16, #48879
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000022; CHECK-NEXT: blr x16
23; FAST-LABEL: jscall_patchpoint_codegen:
Geoff Berrya5335642016-05-06 16:34:59 +000024; FAST: str x{{.+}}, [sp]
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000025; FAST: Ltmp
Tim Northoverdaa1c012016-06-16 01:42:25 +000026; FAST-NEXT: mov x16, #281470681743360
Paul Osmialowski4f5b3be2016-05-13 18:00:09 +000027; FAST-NEXT: movk x16, #57005, lsl #16
28; FAST-NEXT: movk x16, #48879
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000029; FAST-NEXT: blr x16
30 %resolveCall2 = inttoptr i64 281474417671919 to i8*
David Blaikie23af6482015-04-16 23:24:18 +000031 %result = tail call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* %resolveCall2, i32 2, i64 %p4, i64 %p2)
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000032 %resolveCall3 = inttoptr i64 244837814038255 to i8*
David Blaikie23af6482015-04-16 23:24:18 +000033 tail call webkit_jscc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 20, i8* %resolveCall3, i32 2, i64 %p4, i64 %result)
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000034 ret void
35}
36
37; Test if the arguments are properly aligned and that we don't store undef arguments.
38define i64 @jscall_patchpoint_codegen2(i64 %callee) {
39entry:
40; CHECK-LABEL: jscall_patchpoint_codegen2:
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000041; CHECK: orr w[[REG:[0-9]+]], wzr, #0x6
42; CHECK-NEXT: str x[[REG]], [sp, #24]
43; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
44; CHECK-NEXT: str w[[REG]], [sp, #16]
45; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2
46; CHECK-NEXT: str x[[REG]], [sp]
47; CHECK: Ltmp
Tim Northoverdaa1c012016-06-16 01:42:25 +000048; CHECK-NEXT: mov x16, #281470681743360
Paul Osmialowski4f5b3be2016-05-13 18:00:09 +000049; CHECK-NEXT: movk x16, #57005, lsl #16
50; CHECK-NEXT: movk x16, #48879
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000051; CHECK-NEXT: blr x16
52; FAST-LABEL: jscall_patchpoint_codegen2:
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000053; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2
Geoff Berrya5335642016-05-06 16:34:59 +000054; FAST-NEXT: str [[REG1]], [sp]
Reid Kleckner3a7a2e42018-03-14 21:54:21 +000055; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000056; FAST-NEXT: str [[REG2]], [sp, #16]
Reid Kleckner3a7a2e42018-03-14 21:54:21 +000057; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000058; FAST-NEXT: str [[REG3]], [sp, #24]
59; FAST: Ltmp
Tim Northoverdaa1c012016-06-16 01:42:25 +000060; FAST-NEXT: mov x16, #281470681743360
Paul Osmialowski4f5b3be2016-05-13 18:00:09 +000061; FAST-NEXT: movk x16, #57005, lsl #16
62; FAST-NEXT: movk x16, #48879
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000063; FAST-NEXT: blr x16
64 %call = inttoptr i64 281474417671919 to i8*
David Blaikie23af6482015-04-16 23:24:18 +000065 %result = call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 6, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6)
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000066 ret i64 %result
67}
68
69; Test if the arguments are properly aligned and that we don't store undef arguments.
70define i64 @jscall_patchpoint_codegen3(i64 %callee) {
71entry:
72; CHECK-LABEL: jscall_patchpoint_codegen3:
Tim Northoverdaa1c012016-06-16 01:42:25 +000073; CHECK: mov w[[REG:[0-9]+]], #10
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000074; CHECK-NEXT: str x[[REG]], [sp, #48]
75; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x8
76; CHECK-NEXT: str w[[REG]], [sp, #36]
77; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x6
78; CHECK-NEXT: str x[[REG]], [sp, #24]
79; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
80; CHECK-NEXT: str w[[REG]], [sp, #16]
81; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2
82; CHECK-NEXT: str x[[REG]], [sp]
83; CHECK: Ltmp
Tim Northoverdaa1c012016-06-16 01:42:25 +000084; CHECK-NEXT: mov x16, #281470681743360
Paul Osmialowski4f5b3be2016-05-13 18:00:09 +000085; CHECK-NEXT: movk x16, #57005, lsl #16
86; CHECK-NEXT: movk x16, #48879
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000087; CHECK-NEXT: blr x16
88; FAST-LABEL: jscall_patchpoint_codegen3:
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000089; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2
Geoff Berrya5335642016-05-06 16:34:59 +000090; FAST-NEXT: str [[REG1]], [sp]
Reid Kleckner3a7a2e42018-03-14 21:54:21 +000091; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000092; FAST-NEXT: str [[REG2]], [sp, #16]
Reid Kleckner3a7a2e42018-03-14 21:54:21 +000093; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000094; FAST-NEXT: str [[REG3]], [sp, #24]
Reid Kleckner3a7a2e42018-03-14 21:54:21 +000095; FAST-NEXT: orr [[REG4:w[0-9]+]], wzr, #0x8
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000096; FAST-NEXT: str [[REG4]], [sp, #36]
Reid Kleckner3a7a2e42018-03-14 21:54:21 +000097; FAST-NEXT: mov [[REG5:x[0-9]+]], #10
Juergen Ributzkaa80dd082014-07-31 04:10:43 +000098; FAST-NEXT: str [[REG5]], [sp, #48]
99; FAST: Ltmp
Tim Northoverdaa1c012016-06-16 01:42:25 +0000100; FAST-NEXT: mov x16, #281470681743360
Paul Osmialowski4f5b3be2016-05-13 18:00:09 +0000101; FAST-NEXT: movk x16, #57005, lsl #16
102; FAST-NEXT: movk x16, #48879
Juergen Ributzkaa80dd082014-07-31 04:10:43 +0000103; FAST-NEXT: blr x16
104 %call = inttoptr i64 281474417671919 to i8*
David Blaikie23af6482015-04-16 23:24:18 +0000105 %result = call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 10, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6, i32 undef, i32 8, i32 undef, i64 10)
Juergen Ributzkaa80dd082014-07-31 04:10:43 +0000106 ret i64 %result
107}
108
109; CHECK-LABEL: test_i16:
110; CHECK: ldrh [[BREG:w[0-9]+]], [sp]
111; CHECK: add {{w[0-9]+}}, w0, [[BREG]]
112define webkit_jscc zeroext i16 @test_i16(i16 zeroext %a, i16 zeroext %b) {
113 %sum = add i16 %a, %b
114 ret i16 %sum
115}
116
117declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
118declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...)