| Philip Reames | b568113 | 2016-03-25 22:40:35 +0000 | [diff] [blame] | 1 | ; RUN: opt -S -basicaa -dse < %s | FileCheck %s |
| 2 | |
| 3 | ; We conservative choose to prevent dead store elimination |
| 4 | ; across release or stronger fences. It's not required |
| 5 | ; (since the must still be a race on %addd.i), but |
| 6 | ; it is conservatively correct. A legal optimization |
| 7 | ; could hoist the second store above the fence, and then |
| 8 | ; DSE one of them. |
| 9 | define void @test1(i32* %addr.i) { |
| 10 | ; CHECK-LABEL: @test1 |
| 11 | ; CHECK: store i32 5 |
| 12 | ; CHECK: fence |
| 13 | ; CHECK: store i32 5 |
| 14 | ; CHECK: ret |
| 15 | store i32 5, i32* %addr.i, align 4 |
| 16 | fence release |
| 17 | store i32 5, i32* %addr.i, align 4 |
| 18 | ret void |
| 19 | } |
| 20 | |
| 21 | ; Same as previous, but with different values. If we ever optimize |
| 22 | ; this more aggressively, this allows us to check that the correct |
| 23 | ; store is retained (the 'i32 1' store in this case) |
| 24 | define void @test1b(i32* %addr.i) { |
| 25 | ; CHECK-LABEL: @test1b |
| 26 | ; CHECK: store i32 42 |
| 27 | ; CHECK: fence release |
| 28 | ; CHECK: store i32 1 |
| 29 | ; CHECK: ret |
| 30 | store i32 42, i32* %addr.i, align 4 |
| 31 | fence release |
| 32 | store i32 1, i32* %addr.i, align 4 |
| 33 | ret void |
| 34 | } |
| 35 | |
| 36 | ; We *could* DSE across this fence, but don't. No other thread can |
| 37 | ; observe the order of the acquire fence and the store. |
| 38 | define void @test2(i32* %addr.i) { |
| 39 | ; CHECK-LABEL: @test2 |
| 40 | ; CHECK: store |
| 41 | ; CHECK: fence |
| 42 | ; CHECK: store |
| 43 | ; CHECK: ret |
| 44 | store i32 5, i32* %addr.i, align 4 |
| 45 | fence acquire |
| 46 | store i32 5, i32* %addr.i, align 4 |
| 47 | ret void |
| 48 | } |
| Anna Thomas | 6a78c78 | 2016-07-07 20:51:42 +0000 | [diff] [blame] | 49 | |
| 50 | ; We DSE stack alloc'ed and byval locations, in the presence of fences. |
| 51 | ; Fence does not make an otherwise thread local store visible. |
| 52 | ; Right now the DSE in presence of fence is only done in end blocks (with no successors), |
| 53 | ; but the same logic applies to other basic blocks as well. |
| 54 | ; The store to %addr.i can be removed since it is a byval attribute |
| 55 | define void @test3(i32* byval %addr.i) { |
| 56 | ; CHECK-LABEL: @test3 |
| 57 | ; CHECK-NOT: store |
| 58 | ; CHECK: fence |
| 59 | ; CHECK: ret |
| 60 | store i32 5, i32* %addr.i, align 4 |
| 61 | fence release |
| 62 | ret void |
| 63 | } |
| 64 | |
| 65 | declare void @foo(i8* nocapture %p) |
| 66 | |
| 67 | declare noalias i8* @malloc(i32) |
| 68 | |
| 69 | ; DSE of stores in locations allocated through library calls. |
| 70 | define void @test_nocapture() { |
| 71 | ; CHECK-LABEL: @test_nocapture |
| 72 | ; CHECK: malloc |
| 73 | ; CHECK: foo |
| 74 | ; CHECK-NOT: store |
| 75 | ; CHECK: fence |
| 76 | %m = call i8* @malloc(i32 24) |
| 77 | call void @foo(i8* %m) |
| 78 | store i8 4, i8* %m |
| 79 | fence release |
| 80 | ret void |
| 81 | } |
| 82 | |
| 83 | |
| 84 | ; This is a full fence, but it does not make a thread local store visible. |
| 85 | ; We can DSE the store in presence of the fence. |
| 86 | define void @fence_seq_cst() { |
| 87 | ; CHECK-LABEL: @fence_seq_cst |
| 88 | ; CHECK-NEXT: fence seq_cst |
| 89 | ; CHECK-NEXT: ret void |
| 90 | %P1 = alloca i32 |
| 91 | store i32 0, i32* %P1, align 4 |
| 92 | fence seq_cst |
| 93 | store i32 4, i32* %P1, align 4 |
| 94 | ret void |
| 95 | } |
| 96 | |