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Evan Cheng928ce722011-07-06 22:02:34 +00001//===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file provides ARM specific target descriptions.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef ARMMCTARGETDESC_H
15#define ARMMCTARGETDESC_H
16
NAKAMURA Takumi287bc6b2011-07-23 01:16:22 +000017#include "llvm/Support/DataTypes.h"
Evan Cheng2bd65362011-07-07 00:08:19 +000018#include <string>
19
Evan Cheng928ce722011-07-06 22:02:34 +000020namespace llvm {
Rafael Espindolaa17151a2013-10-08 13:08:17 +000021class formatted_raw_ostream;
Evan Cheng5928e692011-07-25 23:24:55 +000022class MCAsmBackend;
Evan Chengad5f4852011-07-23 00:00:19 +000023class MCCodeEmitter;
24class MCContext;
25class MCInstrInfo;
Rafael Espindolaa17151a2013-10-08 13:08:17 +000026class MCInstPrinter;
Evan Chengad5f4852011-07-23 00:00:19 +000027class MCObjectWriter;
Jim Grosbachc3b04272012-05-15 17:35:52 +000028class MCRegisterInfo;
Evan Cheng4d1ca962011-07-08 01:53:10 +000029class MCSubtargetInfo;
Rafael Espindolaa17151a2013-10-08 13:08:17 +000030class MCStreamer;
Ahmed Bougachaad1084d2013-05-24 00:39:57 +000031class MCRelocationInfo;
Evan Cheng2bd65362011-07-07 00:08:19 +000032class StringRef;
Evan Chengad5f4852011-07-23 00:00:19 +000033class Target;
Evan Chengad5f4852011-07-23 00:00:19 +000034class raw_ostream;
Evan Cheng928ce722011-07-06 22:02:34 +000035
Christian Pirkerdc9ff752014-04-01 15:19:30 +000036extern Target TheARMLETarget, TheThumbLETarget;
37extern Target TheARMBETarget, TheThumbBETarget;
Evan Cheng2bd65362011-07-07 00:08:19 +000038
39namespace ARM_MC {
Evan Cheng9f7ad312012-04-26 01:13:36 +000040 std::string ParseARMTriple(StringRef TT, StringRef CPU);
Evan Cheng4d1ca962011-07-08 01:53:10 +000041
42 /// createARMMCSubtargetInfo - Create a ARM MCSubtargetInfo instance.
43 /// This is exposed so Asm parser, etc. do not need to go through
44 /// TargetRegistry.
45 MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
46 StringRef FS);
Evan Cheng2bd65362011-07-07 00:08:19 +000047}
48
Rafael Espindolaa17151a2013-10-08 13:08:17 +000049MCStreamer *createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
Rafael Espindolab4eec1d2014-02-05 18:00:21 +000050 bool isVerboseAsm, bool useCFI,
Rafael Espindolaa17151a2013-10-08 13:08:17 +000051 bool useDwarfDirectory,
52 MCInstPrinter *InstPrint, MCCodeEmitter *CE,
53 MCAsmBackend *TAB, bool ShowInst);
54
Christian Pirkerdc9ff752014-04-01 15:19:30 +000055MCCodeEmitter *createARMLEMCCodeEmitter(const MCInstrInfo &MCII,
Christian Pirker2a111602014-03-28 14:35:30 +000056 const MCRegisterInfo &MRI,
57 const MCSubtargetInfo &STI,
58 MCContext &Ctx);
59
Christian Pirkerdc9ff752014-04-01 15:19:30 +000060MCCodeEmitter *createARMBEMCCodeEmitter(const MCInstrInfo &MCII,
Christian Pirker2a111602014-03-28 14:35:30 +000061 const MCRegisterInfo &MRI,
62 const MCSubtargetInfo &STI,
63 MCContext &Ctx);
Evan Chengad5f4852011-07-23 00:00:19 +000064
Bill Wendling58e2d3d2013-09-09 02:37:14 +000065MCAsmBackend *createARMAsmBackend(const Target &T, const MCRegisterInfo &MRI,
Christian Pirker2a111602014-03-28 14:35:30 +000066 StringRef TT, StringRef CPU,
67 bool IsLittleEndian);
68
Christian Pirkerdc9ff752014-04-01 15:19:30 +000069MCAsmBackend *createARMLEAsmBackend(const Target &T, const MCRegisterInfo &MRI,
Bill Wendling58e2d3d2013-09-09 02:37:14 +000070 StringRef TT, StringRef CPU);
Evan Chengad5f4852011-07-23 00:00:19 +000071
Christian Pirkerdc9ff752014-04-01 15:19:30 +000072MCAsmBackend *createARMBEAsmBackend(const Target &T, const MCRegisterInfo &MRI,
Christian Pirker2a111602014-03-28 14:35:30 +000073 StringRef TT, StringRef CPU);
74
Christian Pirkerdc9ff752014-04-01 15:19:30 +000075MCAsmBackend *createThumbLEAsmBackend(const Target &T, const MCRegisterInfo &MRI,
Christian Pirker2a111602014-03-28 14:35:30 +000076 StringRef TT, StringRef CPU);
77
Christian Pirkerdc9ff752014-04-01 15:19:30 +000078MCAsmBackend *createThumbBEAsmBackend(const Target &T, const MCRegisterInfo &MRI,
Christian Pirker2a111602014-03-28 14:35:30 +000079 StringRef TT, StringRef CPU);
80
Rafael Espindolaa0124052011-12-22 00:37:50 +000081/// createARMELFObjectWriter - Construct an ELF Mach-O object writer.
82MCObjectWriter *createARMELFObjectWriter(raw_ostream &OS,
Christian Pirker2a111602014-03-28 14:35:30 +000083 uint8_t OSABI,
84 bool IsLittleEndian);
Rafael Espindolaa0124052011-12-22 00:37:50 +000085
Evan Chengad5f4852011-07-23 00:00:19 +000086/// createARMMachObjectWriter - Construct an ARM Mach-O object writer.
87MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS,
88 bool Is64Bit,
89 uint32_t CPUType,
90 uint32_t CPUSubtype);
91
Ahmed Bougachaad1084d2013-05-24 00:39:57 +000092
93/// createARMMachORelocationInfo - Construct ARM Mach-O relocation info.
94MCRelocationInfo *createARMMachORelocationInfo(MCContext &Ctx);
Evan Cheng928ce722011-07-06 22:02:34 +000095} // End llvm namespace
96
97// Defines symbolic names for ARM registers. This defines a mapping from
98// register name to register number.
99//
100#define GET_REGINFO_ENUM
101#include "ARMGenRegisterInfo.inc"
102
103// Defines symbolic names for the ARM instructions.
104//
105#define GET_INSTRINFO_ENUM
106#include "ARMGenInstrInfo.inc"
107
Evan Chengbc153d42011-07-14 20:59:42 +0000108#define GET_SUBTARGETINFO_ENUM
109#include "ARMGenSubtargetInfo.inc"
110
Evan Cheng928ce722011-07-06 22:02:34 +0000111#endif