| Akira Hatanaka | df98a7a | 2012-05-24 18:32:33 +0000 | [diff] [blame^] | 1 | //===- Mips16InstrInfo.td - Target Description for Mips16 -*- tablegen -*-=// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file describes Mips16 instructions. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | let isReturn=1, isTerminator=1, hasDelaySlot=1, isCodeGenOnly=1, |
| 15 | isBarrier=1, hasCtrlDep=1, rx=0b000, ry=0b001 in |
| 16 | def RET16 : FRR16 <0, (outs), (ins CPURAReg:$target), |
| 17 | "jr\t$target", [(MipsRet CPURAReg:$target)], IIBranch>, |
| 18 | Requires<[InMips16Mode]>; |