Akira Hatanaka | b7fa3c9 | 2012-07-31 21:49:49 +0000 | [diff] [blame] | 1 | //===-- Mips16InstrInfo.h - Mips16 Instruction Information ------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the Mips16 implementation of the TargetInstrInfo class. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef MIPS16INSTRUCTIONINFO_H |
| 15 | #define MIPS16INSTRUCTIONINFO_H |
| 16 | |
Akira Hatanaka | cb37e13 | 2012-07-31 23:41:32 +0000 | [diff] [blame] | 17 | #include "Mips16RegisterInfo.h" |
Chandler Carruth | 802d755 | 2012-12-04 07:12:27 +0000 | [diff] [blame] | 18 | #include "MipsInstrInfo.h" |
Akira Hatanaka | b7fa3c9 | 2012-07-31 21:49:49 +0000 | [diff] [blame] | 19 | |
| 20 | namespace llvm { |
| 21 | |
| 22 | class Mips16InstrInfo : public MipsInstrInfo { |
Akira Hatanaka | cb37e13 | 2012-07-31 23:41:32 +0000 | [diff] [blame] | 23 | const Mips16RegisterInfo RI; |
| 24 | |
Akira Hatanaka | b7fa3c9 | 2012-07-31 21:49:49 +0000 | [diff] [blame] | 25 | public: |
| 26 | explicit Mips16InstrInfo(MipsTargetMachine &TM); |
| 27 | |
Akira Hatanaka | cb37e13 | 2012-07-31 23:41:32 +0000 | [diff] [blame] | 28 | virtual const MipsRegisterInfo &getRegisterInfo() const; |
| 29 | |
Akira Hatanaka | b7fa3c9 | 2012-07-31 21:49:49 +0000 | [diff] [blame] | 30 | /// isLoadFromStackSlot - If the specified machine instruction is a direct |
| 31 | /// load from a stack slot, return the virtual or physical register number of |
| 32 | /// the destination along with the FrameIndex of the loaded stack slot. If |
| 33 | /// not, return 0. This predicate must return 0 if the instruction has |
| 34 | /// any side effects other than loading from the stack slot. |
| 35 | virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, |
| 36 | int &FrameIndex) const; |
| 37 | |
| 38 | /// isStoreToStackSlot - If the specified machine instruction is a direct |
| 39 | /// store to a stack slot, return the virtual or physical register number of |
| 40 | /// the source reg along with the FrameIndex of the loaded stack slot. If |
| 41 | /// not, return 0. This predicate must return 0 if the instruction has |
| 42 | /// any side effects other than storing to the stack slot. |
| 43 | virtual unsigned isStoreToStackSlot(const MachineInstr *MI, |
| 44 | int &FrameIndex) const; |
| 45 | |
| 46 | virtual void copyPhysReg(MachineBasicBlock &MBB, |
| 47 | MachineBasicBlock::iterator MI, DebugLoc DL, |
| 48 | unsigned DestReg, unsigned SrcReg, |
| 49 | bool KillSrc) const; |
| 50 | |
| 51 | virtual void storeRegToStackSlot(MachineBasicBlock &MBB, |
| 52 | MachineBasicBlock::iterator MBBI, |
| 53 | unsigned SrcReg, bool isKill, int FrameIndex, |
| 54 | const TargetRegisterClass *RC, |
| 55 | const TargetRegisterInfo *TRI) const; |
| 56 | |
| 57 | virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, |
| 58 | MachineBasicBlock::iterator MBBI, |
| 59 | unsigned DestReg, int FrameIndex, |
| 60 | const TargetRegisterClass *RC, |
| 61 | const TargetRegisterInfo *TRI) const; |
| 62 | |
| 63 | virtual bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const; |
| 64 | |
| 65 | virtual unsigned GetOppositeBranchOpc(unsigned Opc) const; |
| 66 | |
Reed Kotler | d019dbf | 2012-12-20 04:07:42 +0000 | [diff] [blame] | 67 | // Adjust SP by FrameSize bytes. Save RA, S0, S1 |
| 68 | void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, |
| 69 | MachineBasicBlock::iterator I) const; |
| 70 | |
| 71 | // Adjust SP by FrameSize bytes. Restore RA, S0, S1 |
| 72 | void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, |
| 73 | MachineBasicBlock::iterator I) const; |
| 74 | |
| 75 | |
Reed Kotler | 27a7229 | 2012-10-31 05:21:10 +0000 | [diff] [blame] | 76 | /// Adjust SP by Amount bytes. |
| 77 | void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, |
| 78 | MachineBasicBlock::iterator I) const; |
| 79 | |
Reed Kotler | d019dbf | 2012-12-20 04:07:42 +0000 | [diff] [blame] | 80 | /// Emit a series of instructions to load an immediate. If NewImm is a |
| 81 | /// non-NULL parameter, the last instruction is not emitted, but instead |
| 82 | /// its immediate operand is returned in NewImm. |
| 83 | unsigned loadImmediate(int64_t Imm, MachineBasicBlock &MBB, |
| 84 | MachineBasicBlock::iterator II, DebugLoc DL, |
| 85 | unsigned *NewImm) const; |
| 86 | |
Akira Hatanaka | b7fa3c9 | 2012-07-31 21:49:49 +0000 | [diff] [blame] | 87 | private: |
| 88 | virtual unsigned GetAnalyzableBrOpc(unsigned Opc) const; |
| 89 | |
| 90 | void ExpandRetRA16(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, |
| 91 | unsigned Opc) const; |
Reed Kotler | d019dbf | 2012-12-20 04:07:42 +0000 | [diff] [blame] | 92 | |
| 93 | // Adjust SP by Amount bytes where bytes can be up to 32bit number. |
| 94 | void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, |
| 95 | MachineBasicBlock::iterator I, |
| 96 | unsigned Reg1, unsigned Reg2) const; |
| 97 | |
| 98 | // Adjust SP by Amount bytes where bytes can be up to 32bit number. |
Akira Hatanaka | e067e5a | 2013-01-04 19:38:05 +0000 | [diff] [blame^] | 99 | void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount, |
| 100 | MachineBasicBlock &MBB, |
| 101 | MachineBasicBlock::iterator I) const; |
Reed Kotler | d019dbf | 2012-12-20 04:07:42 +0000 | [diff] [blame] | 102 | |
| 103 | |
Akira Hatanaka | b7fa3c9 | 2012-07-31 21:49:49 +0000 | [diff] [blame] | 104 | }; |
| 105 | |
| 106 | } |
| 107 | |
| 108 | #endif |