Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / e14524ca30735e5e9aeee8ac3173f37ec5ed68f8 / . / clang / test / CodeGen / zvector.c
blob: ebe7e415e1db8dcf88a1e6c2fb6aa5fd1d4cab0b [file] [log] [blame]
Ulrich Weigand3c5038a2015-07-30 14:08:36 +0000[diff] [blame]1// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu z13 -fzvector \
2// RUN: -O -emit-llvm -o - -W -Wall -Werror %s | FileCheck %s
3
4volatile vector signed char sc, sc2;
5volatile vector unsigned char uc, uc2;
6volatile vector bool char bc, bc2;
7
8volatile vector signed short ss, ss2;
9volatile vector unsigned short us, us2;
10volatile vector bool short bs, bs2;
11
12volatile vector signed int si, si2;
13volatile vector unsigned int ui, ui2;
14volatile vector bool int bi, bi2;
15
16volatile vector signed long long sl, sl2;
17volatile vector unsigned long long ul, ul2;
18volatile vector bool long long bl, bl2;
19
20volatile vector double fd, fd2;
21
22volatile int cnt;
23
24void test_assign (void)
25{
26// CHECK-LABEL: test_assign
27
28// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
29// CHECK: store volatile <16 x i8> [[VAL]], <16 x i8>* @sc
30 sc = sc2;
31// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
32// CHECK: store volatile <16 x i8> [[VAL]], <16 x i8>* @uc
33 uc = uc2;
34
35// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
36// CHECK: store volatile <8 x i16> [[VAL]], <8 x i16>* @ss
37 ss = ss2;
38// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
39// CHECK: store volatile <8 x i16> [[VAL]], <8 x i16>* @us
40 us = us2;
41
42// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
43// CHECK: store volatile <4 x i32> [[VAL]], <4 x i32>* @si
44 si = si2;
45// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
46// CHECK: store volatile <4 x i32> [[VAL]], <4 x i32>* @ui
47 ui = ui2;
48
49// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
50// CHECK: store volatile <2 x i64> [[VAL]], <2 x i64>* @sl
51 sl = sl2;
52// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
53// CHECK: store volatile <2 x i64> [[VAL]], <2 x i64>* @ul
54 ul = ul2;
55
56// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
57// CHECK: store volatile <2 x double> [[VAL]], <2 x double>* @fd
58 fd = fd2;
59}
60
61void test_pos (void)
62{
63// CHECK-LABEL: test_pos
64
65// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
66// CHECK: store volatile <16 x i8> [[VAL]], <16 x i8>* @sc
67 sc = +sc2;
68// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
69// CHECK: store volatile <16 x i8> [[VAL]], <16 x i8>* @uc
70 uc = +uc2;
71
72// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
73// CHECK: store volatile <8 x i16> [[VAL]], <8 x i16>* @ss
74 ss = +ss2;
75// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
76// CHECK: store volatile <8 x i16> [[VAL]], <8 x i16>* @us
77 us = +us2;
78
79// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
80// CHECK: store volatile <4 x i32> [[VAL]], <4 x i32>* @si
81 si = +si2;
82// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
83// CHECK: store volatile <4 x i32> [[VAL]], <4 x i32>* @ui
84 ui = +ui2;
85
86// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
87// CHECK: store volatile <2 x i64> [[VAL]], <2 x i64>* @sl
88 sl = +sl2;
89// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
90// CHECK: store volatile <2 x i64> [[VAL]], <2 x i64>* @ul
91 ul = +ul2;
92
93// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
94// CHECK: store volatile <2 x double> [[VAL]], <2 x double>* @fd
95 fd = +fd2;
96}
97
98void test_neg (void)
99{
100// CHECK-LABEL: test_neg
101
102// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
103// CHECK: %{{.*}} = sub <16 x i8> zeroinitializer, [[VAL]]
104 sc = -sc2;
105// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
106// CHECK: %{{.*}} = sub <8 x i16> zeroinitializer, [[VAL]]
107 ss = -ss2;
108// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
109// CHECK: %{{.*}} = sub <4 x i32> zeroinitializer, [[VAL]]
110 si = -si2;
111// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
112// CHECK: %{{.*}} = sub <2 x i64> zeroinitializer, [[VAL]]
113 sl = -sl2;
114// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
115// CHECK: %{{.*}} = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, [[VAL]]
116 fd = -fd2;
117}
118
119void test_preinc (void)
120{
121// CHECK-LABEL: test_preinc
122
123// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
124// CHECK: %{{.*}} = add <16 x i8> [[VAL]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
125 ++sc2;
126// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
127// CHECK: %{{.*}} = add <16 x i8> [[VAL]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
128 ++uc2;
129
130// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
131// CHECK: %{{.*}} = add <8 x i16> [[VAL]], <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
132 ++ss2;
133// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
134// CHECK: %{{.*}} = add <8 x i16> [[VAL]], <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
135 ++us2;
136
137// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
138// CHECK: %{{.*}} = add <4 x i32> [[VAL]], <i32 1, i32 1, i32 1, i32 1>
139 ++si2;
140// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
141// CHECK: %{{.*}} = add <4 x i32> [[VAL]], <i32 1, i32 1, i32 1, i32 1>
142 ++ui2;
143
144// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
145// CHECK: %{{.*}} = add <2 x i64> [[VAL]], <i64 1, i64 1>
146 ++sl2;
147// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
148// CHECK: %{{.*}} = add <2 x i64> [[VAL]], <i64 1, i64 1>
149 ++ul2;
150
151// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
152// CHECK: %{{.*}} = fadd <2 x double> [[VAL]], <double 1.000000e+00, double 1.000000e+00>
153 ++fd2;
154}
155
156void test_postinc (void)
157{
158// CHECK-LABEL: test_postinc
159
160// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
161// CHECK: %{{.*}} = add <16 x i8> [[VAL]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
162 sc2++;
163// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
164// CHECK: %{{.*}} = add <16 x i8> [[VAL]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
165 uc2++;
166
167// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
168// CHECK: %{{.*}} = add <8 x i16> [[VAL]], <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
169 ss2++;
170// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
171// CHECK: %{{.*}} = add <8 x i16> [[VAL]], <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
172 us2++;
173
174// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
175// CHECK: %{{.*}} = add <4 x i32> [[VAL]], <i32 1, i32 1, i32 1, i32 1>
176 si2++;
177// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
178// CHECK: %{{.*}} = add <4 x i32> [[VAL]], <i32 1, i32 1, i32 1, i32 1>
179 ui2++;
180
181// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
182// CHECK: %{{.*}} = add <2 x i64> [[VAL]], <i64 1, i64 1>
183 sl2++;
184// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
185// CHECK: %{{.*}} = add <2 x i64> [[VAL]], <i64 1, i64 1>
186 ul2++;
187
188// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
189// CHECK: %{{.*}} = fadd <2 x double> [[VAL]], <double 1.000000e+00, double 1.000000e+00>
190 fd2++;
191}
192
193void test_predec (void)
194{
195// CHECK-LABEL: test_predec
196
197// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
198// CHECK: %{{.*}} = add <16 x i8> [[VAL]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
199 --sc2;
200// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
201// CHECK: %{{.*}} = add <16 x i8> [[VAL]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
202 --uc2;
203
204// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
205// CHECK: %{{.*}} = add <8 x i16> [[VAL]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
206 --ss2;
207// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
208// CHECK: %{{.*}} = add <8 x i16> [[VAL]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
209 --us2;
210
211// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
212// CHECK: %{{.*}} = add <4 x i32> [[VAL]], <i32 -1, i32 -1, i32 -1, i32 -1>
213 --si2;
214// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
215// CHECK: %{{.*}} = add <4 x i32> [[VAL]], <i32 -1, i32 -1, i32 -1, i32 -1>
216 --ui2;
217
218// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
219// CHECK: %{{.*}} = add <2 x i64> [[VAL]], <i64 -1, i64 -1>
220 --sl2;
221// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
222// CHECK: %{{.*}} = add <2 x i64> [[VAL]], <i64 -1, i64 -1>
223 --ul2;
224
225// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
226// CHECK: %{{.*}} = fadd <2 x double> [[VAL]], <double -1.000000e+00, double -1.000000e+00>
227 --fd2;
228}
229
230void test_postdec (void)
231{
232// CHECK-LABEL: test_postdec
233
234// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
235// CHECK: %{{.*}} = add <16 x i8> [[VAL]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
236 sc2--;
237// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
238// CHECK: %{{.*}} = add <16 x i8> [[VAL]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
239 uc2--;
240
241// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
242// CHECK: %{{.*}} = add <8 x i16> [[VAL]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
243 ss2--;
244// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
245// CHECK: %{{.*}} = add <8 x i16> [[VAL]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
246 us2--;
247
248// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
249// CHECK: %{{.*}} = add <4 x i32> [[VAL]], <i32 -1, i32 -1, i32 -1, i32 -1>
250 si2--;
251// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
252// CHECK: %{{.*}} = add <4 x i32> [[VAL]], <i32 -1, i32 -1, i32 -1, i32 -1>
253 ui2--;
254
255// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
256// CHECK: %{{.*}} = add <2 x i64> [[VAL]], <i64 -1, i64 -1>
257 sl2--;
258// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
259// CHECK: %{{.*}} = add <2 x i64> [[VAL]], <i64 -1, i64 -1>
260 ul2--;
261
262// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
263// CHECK: %{{.*}} = fadd <2 x double> [[VAL]], <double -1.000000e+00, double -1.000000e+00>
264 fd2--;
265}
266
267void test_add (void)
268{
269// CHECK-LABEL: test_add
270
271// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
272// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
273// CHECK: %{{.*}} = add <16 x i8> [[VAL2]], [[VAL1]]
274 sc = sc + sc2;
275// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
276// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
277// CHECK: %{{.*}} = add <16 x i8> [[VAL2]], [[VAL1]]
278 sc = sc + bc2;
279// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
280// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
281// CHECK: %{{.*}} = add <16 x i8> [[VAL2]], [[VAL1]]
282 sc = bc + sc2;
283// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
284// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
285// CHECK: %{{.*}} = add <16 x i8> [[VAL2]], [[VAL1]]
286 uc = uc + uc2;
287// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
288// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
289// CHECK: %{{.*}} = add <16 x i8> [[VAL2]], [[VAL1]]
290 uc = uc + bc2;
291// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
292// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
293// CHECK: %{{.*}} = add <16 x i8> [[VAL2]], [[VAL1]]
294 uc = bc + uc2;
295
296// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
297// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
298// CHECK: %{{.*}} = add <8 x i16> [[VAL2]], [[VAL1]]
299 ss = ss + ss2;
300// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
301// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
302// CHECK: %{{.*}} = add <8 x i16> [[VAL2]], [[VAL1]]
303 ss = ss + bs2;
304// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
305// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
306// CHECK: %{{.*}} = add <8 x i16> [[VAL2]], [[VAL1]]
307 ss = bs + ss2;
308// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
309// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
310// CHECK: %{{.*}} = add <8 x i16> [[VAL2]], [[VAL1]]
311 us = us + us2;
312// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
313// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
314// CHECK: %{{.*}} = add <8 x i16> [[VAL2]], [[VAL1]]
315 us = us + bs2;
316// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
317// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
318// CHECK: %{{.*}} = add <8 x i16> [[VAL2]], [[VAL1]]
319 us = bs + us2;
320
321// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
322// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
323// CHECK: %{{.*}} = add <4 x i32> [[VAL2]], [[VAL1]]
324 si = si + si2;
325// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
326// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
327// CHECK: %{{.*}} = add <4 x i32> [[VAL2]], [[VAL1]]
328 si = si + bi2;
329// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
330// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
331// CHECK: %{{.*}} = add <4 x i32> [[VAL2]], [[VAL1]]
332 si = bi + si2;
333// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
334// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
335// CHECK: %{{.*}} = add <4 x i32> [[VAL2]], [[VAL1]]
336 ui = ui + ui2;
337// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
338// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
339// CHECK: %{{.*}} = add <4 x i32> [[VAL2]], [[VAL1]]
340 ui = ui + bi2;
341// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
342// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
343// CHECK: %{{.*}} = add <4 x i32> [[VAL2]], [[VAL1]]
344 ui = bi + ui2;
345
346// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
347// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
348// CHECK: %{{.*}} = add <2 x i64> [[VAL2]], [[VAL1]]
349 sl = sl + sl2;
350// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
351// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
352// CHECK: %{{.*}} = add <2 x i64> [[VAL2]], [[VAL1]]
353 sl = sl + bl2;
354// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
355// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
356// CHECK: %{{.*}} = add <2 x i64> [[VAL2]], [[VAL1]]
357 sl = bl + sl2;
358// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
359// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
360// CHECK: %{{.*}} = add <2 x i64> [[VAL2]], [[VAL1]]
361 ul = ul + ul2;
362// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
363// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
364// CHECK: %{{.*}} = add <2 x i64> [[VAL2]], [[VAL1]]
365 ul = ul + bl2;
366// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
367// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
368// CHECK: %{{.*}} = add <2 x i64> [[VAL2]], [[VAL1]]
369 ul = bl + ul2;
370
371// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
372// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
373// CHECK: %{{.*}} = fadd <2 x double> [[VAL1]], [[VAL2]]
374 fd = fd + fd2;
375}
376
377void test_add_assign (void)
378{
379// CHECK-LABEL: test_add_assign
380
381// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
382// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
383// CHECK: %{{.*}} = add <16 x i8> [[VAL1]], [[VAL2]]
384 sc += sc2;
385// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
386// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
387// CHECK: %{{.*}} = add <16 x i8> [[VAL1]], [[VAL2]]
388 sc += bc2;
389// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
390// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
391// CHECK: %{{.*}} = add <16 x i8> [[VAL1]], [[VAL2]]
392 uc += uc2;
393// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
394// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
395// CHECK: %{{.*}} = add <16 x i8> [[VAL1]], [[VAL2]]
396 uc += bc2;
397
398// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
399// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
400// CHECK: %{{.*}} = add <8 x i16> [[VAL1]], [[VAL2]]
401 ss += ss2;
402// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
403// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
404// CHECK: %{{.*}} = add <8 x i16> [[VAL1]], [[VAL2]]
405 ss += bs2;
406// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
407// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
408// CHECK: %{{.*}} = add <8 x i16> [[VAL1]], [[VAL2]]
409 us += us2;
410// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
411// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
412// CHECK: %{{.*}} = add <8 x i16> [[VAL1]], [[VAL2]]
413 us += bs2;
414
415// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
416// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
417// CHECK: %{{.*}} = add <4 x i32> [[VAL1]], [[VAL2]]
418 si += si2;
419// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
420// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
421// CHECK: %{{.*}} = add <4 x i32> [[VAL1]], [[VAL2]]
422 si += bi2;
423// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
424// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
425// CHECK: %{{.*}} = add <4 x i32> [[VAL1]], [[VAL2]]
426 ui += ui2;
427// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
428// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
429// CHECK: %{{.*}} = add <4 x i32> [[VAL1]], [[VAL2]]
430 ui += bi2;
431
432// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
433// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
434// CHECK: %{{.*}} = add <2 x i64> [[VAL1]], [[VAL2]]
435 sl += sl2;
436// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
437// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
438// CHECK: %{{.*}} = add <2 x i64> [[VAL1]], [[VAL2]]
439 sl += bl2;
440// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
441// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
442// CHECK: %{{.*}} = add <2 x i64> [[VAL1]], [[VAL2]]
443 ul += ul2;
444// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
445// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
446// CHECK: %{{.*}} = add <2 x i64> [[VAL1]], [[VAL2]]
447 ul += bl2;
448
449// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
450// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
451// CHECK: %{{.*}} = fadd <2 x double> [[VAL2]], [[VAL1]]
452 fd += fd2;
453}
454
455void test_sub (void)
456{
457// CHECK-LABEL: test_sub
458
459// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
460// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
461// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
462 sc = sc - sc2;
463// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
464// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
465// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
466 sc = sc - bc2;
467// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
468// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
469// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
470 sc = bc - sc2;
471// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
472// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
473// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
474 uc = uc - uc2;
475// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
476// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
477// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
478 uc = uc - bc2;
479// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
480// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
481// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
482 uc = bc - uc2;
483
484// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
485// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
486// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
487 ss = ss - ss2;
488// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
489// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
490// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
491 ss = ss - bs2;
492// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
493// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
494// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
495 ss = bs - ss2;
496// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
497// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
498// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
499 us = us - us2;
500// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
501// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
502// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
503 us = us - bs2;
504// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
505// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
506// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
507 us = bs - us2;
508
509// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
510// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
511// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
512 si = si - si2;
513// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
514// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
515// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
516 si = si - bi2;
517// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
518// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
519// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
520 si = bi - si2;
521// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
522// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
523// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
524 ui = ui - ui2;
525// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
526// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
527// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
528 ui = ui - bi2;
529// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
530// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
531// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
532 ui = bi - ui2;
533
534// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
535// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
536// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
537 sl = sl - sl2;
538// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
539// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
540// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
541 sl = sl - bl2;
542// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
543// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
544// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
545 sl = bl - sl2;
546// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
547// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
548// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
549 ul = ul - ul2;
550// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
551// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
552// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
553 ul = ul - bl2;
554// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
555// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
556// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
557 ul = bl - ul2;
558
559// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
560// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
561// CHECK: %{{.*}} = fsub <2 x double> [[VAL1]], [[VAL2]]
562 fd = fd - fd2;
563}
564
565void test_sub_assign (void)
566{
567// CHECK-LABEL: test_sub_assign
568
569// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
570// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
571// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
572 sc -= sc2;
573// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
574// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
575// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
576 sc -= bc2;
577// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
578// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
579// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
580 uc -= uc2;
581// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
582// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
583// CHECK: %{{.*}} = sub <16 x i8> [[VAL1]], [[VAL2]]
584 uc -= bc2;
585
586// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
587// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
588// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
589 ss -= ss2;
590// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
591// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
592// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
593 ss -= bs2;
594// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
595// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
596// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
597 us -= us2;
598// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
599// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
600// CHECK: %{{.*}} = sub <8 x i16> [[VAL1]], [[VAL2]]
601 us -= bs2;
602
603// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
604// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
605// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
606 si -= si2;
607// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
608// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
609// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
610 si -= bi2;
611// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
612// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
613// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
614 ui -= ui2;
615// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
616// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
617// CHECK: %{{.*}} = sub <4 x i32> [[VAL1]], [[VAL2]]
618 ui -= bi2;
619
620// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
621// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
622// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
623 sl -= sl2;
624// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
625// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
626// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
627 sl -= bl2;
628// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
629// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
630// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
631 ul -= ul2;
632// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
633// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
634// CHECK: %{{.*}} = sub <2 x i64> [[VAL1]], [[VAL2]]
635 ul -= bl2;
636
637// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
638// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
639// CHECK: %{{.*}} = fsub <2 x double> [[VAL1]], [[VAL2]]
640 fd -= fd2;
641}
642
643void test_mul (void)
644{
645// CHECK-LABEL: test_mul
646
647// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
648// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
649// CHECK: %{{.*}} = mul <16 x i8> [[VAL2]], [[VAL1]]
650 sc = sc * sc2;
651// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
652// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
653// CHECK: %{{.*}} = mul <16 x i8> [[VAL2]], [[VAL1]]
654 uc = uc * uc2;
655
656// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
657// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
658// CHECK: %{{.*}} = mul <8 x i16> [[VAL2]], [[VAL1]]
659 ss = ss * ss2;
660// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
661// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
662// CHECK: %{{.*}} = mul <8 x i16> [[VAL2]], [[VAL1]]
663 us = us * us2;
664
665// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
666// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
667// CHECK: %{{.*}} = mul <4 x i32> [[VAL2]], [[VAL1]]
668 si = si * si2;
669// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
670// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
671// CHECK: %{{.*}} = mul <4 x i32> [[VAL2]], [[VAL1]]
672 ui = ui * ui2;
673
674// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
675// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
676// CHECK: %{{.*}} = mul <2 x i64> [[VAL2]], [[VAL1]]
677 sl = sl * sl2;
678// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
679// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
680// CHECK: %{{.*}} = mul <2 x i64> [[VAL2]], [[VAL1]]
681 ul = ul * ul2;
682
683// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
684// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
685// CHECK: %{{.*}} = fmul <2 x double> [[VAL1]], [[VAL2]]
686 fd = fd * fd2;
687}
688
689void test_mul_assign (void)
690{
691// CHECK-LABEL: test_mul_assign
692
693// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
694// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
695// CHECK: %{{.*}} = mul <16 x i8> [[VAL1]], [[VAL2]]
696 sc *= sc2;
697// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
698// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
699// CHECK: %{{.*}} = mul <16 x i8> [[VAL1]], [[VAL2]]
700 uc *= uc2;
701
702// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
703// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
704// CHECK: %{{.*}} = mul <8 x i16> [[VAL1]], [[VAL2]]
705 ss *= ss2;
706// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
707// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
708// CHECK: %{{.*}} = mul <8 x i16> [[VAL1]], [[VAL2]]
709 us *= us2;
710
711// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
712// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
713// CHECK: %{{.*}} = mul <4 x i32> [[VAL1]], [[VAL2]]
714 si *= si2;
715// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
716// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
717// CHECK: %{{.*}} = mul <4 x i32> [[VAL1]], [[VAL2]]
718 ui *= ui2;
719
720// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
721// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
722// CHECK: %{{.*}} = mul <2 x i64> [[VAL1]], [[VAL2]]
723 sl *= sl2;
724// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
725// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
726// CHECK: %{{.*}} = mul <2 x i64> [[VAL1]], [[VAL2]]
727 ul *= ul2;
728
729// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
730// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
731// CHECK: %{{.*}} = fmul <2 x double> [[VAL2]], [[VAL1]]
732 fd *= fd2;
733}
734
735void test_div (void)
736{
737// CHECK-LABEL: test_div
738
739// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
740// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
741// CHECK: %{{.*}} = sdiv <16 x i8> [[VAL1]], [[VAL2]]
742 sc = sc / sc2;
743// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
744// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
745// CHECK: %{{.*}} = udiv <16 x i8> [[VAL1]], [[VAL2]]
746 uc = uc / uc2;
747
748// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
749// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
750// CHECK: %{{.*}} = sdiv <8 x i16> [[VAL1]], [[VAL2]]
751 ss = ss / ss2;
752// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
753// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
754// CHECK: %{{.*}} = udiv <8 x i16> [[VAL1]], [[VAL2]]
755 us = us / us2;
756
757// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
758// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
759// CHECK: %{{.*}} = sdiv <4 x i32> [[VAL1]], [[VAL2]]
760 si = si / si2;
761// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
762// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
763// CHECK: %{{.*}} = udiv <4 x i32> [[VAL1]], [[VAL2]]
764 ui = ui / ui2;
765
766// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
767// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
768// CHECK: %{{.*}} = sdiv <2 x i64> [[VAL1]], [[VAL2]]
769 sl = sl / sl2;
770// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
771// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
772// CHECK: %{{.*}} = udiv <2 x i64> [[VAL1]], [[VAL2]]
773 ul = ul / ul2;
774
775// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
776// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
777// CHECK: %{{.*}} = fdiv <2 x double> [[VAL1]], [[VAL2]]
778 fd = fd / fd2;
779}
780
781void test_div_assign (void)
782{
783// CHECK-LABEL: test_div_assign
784
785// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
786// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
787// CHECK: %{{.*}} = sdiv <16 x i8> [[VAL1]], [[VAL2]]
788 sc /= sc2;
789// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
790// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
791// CHECK: %{{.*}} = udiv <16 x i8> [[VAL1]], [[VAL2]]
792 uc /= uc2;
793
794// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
795// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
796// CHECK: %{{.*}} = sdiv <8 x i16> [[VAL1]], [[VAL2]]
797 ss /= ss2;
798// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
799// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
800// CHECK: %{{.*}} = udiv <8 x i16> [[VAL1]], [[VAL2]]
801 us /= us2;
802
803// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
804// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
805// CHECK: %{{.*}} = sdiv <4 x i32> [[VAL1]], [[VAL2]]
806 si /= si2;
807// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
808// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
809// CHECK: %{{.*}} = udiv <4 x i32> [[VAL1]], [[VAL2]]
810 ui /= ui2;
811
812// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
813// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
814// CHECK: %{{.*}} = sdiv <2 x i64> [[VAL1]], [[VAL2]]
815 sl /= sl2;
816// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
817// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
818// CHECK: %{{.*}} = udiv <2 x i64> [[VAL1]], [[VAL2]]
819 ul /= ul2;
820
821// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
822// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
823// CHECK: %{{.*}} = fdiv <2 x double> [[VAL1]], [[VAL2]]
824 fd /= fd2;
825}
826
827void test_rem (void)
828{
829// CHECK-LABEL: test_rem
830
831// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
832// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
833// CHECK: %{{.*}} = srem <16 x i8> [[VAL1]], [[VAL2]]
834 sc = sc % sc2;
835// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
836// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
837// CHECK: %{{.*}} = urem <16 x i8> [[VAL1]], [[VAL2]]
838 uc = uc % uc2;
839
840// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
841// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
842// CHECK: %{{.*}} = srem <8 x i16> [[VAL1]], [[VAL2]]
843 ss = ss % ss2;
844// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
845// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
846// CHECK: %{{.*}} = urem <8 x i16> [[VAL1]], [[VAL2]]
847 us = us % us2;
848
849// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
850// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
851// CHECK: %{{.*}} = srem <4 x i32> [[VAL1]], [[VAL2]]
852 si = si % si2;
853// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
854// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
855// CHECK: %{{.*}} = urem <4 x i32> [[VAL1]], [[VAL2]]
856 ui = ui % ui2;
857
858// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
859// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
860// CHECK: %{{.*}} = srem <2 x i64> [[VAL1]], [[VAL2]]
861 sl = sl % sl2;
862// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
863// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
864// CHECK: %{{.*}} = urem <2 x i64> [[VAL1]], [[VAL2]]
865 ul = ul % ul2;
866}
867
868void test_rem_assign (void)
869{
870// CHECK-LABEL: test_rem_assign
871
872// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
873// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
874// CHECK: %{{.*}} = srem <16 x i8> [[VAL1]], [[VAL2]]
875 sc %= sc2;
876// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
877// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
878// CHECK: %{{.*}} = urem <16 x i8> [[VAL1]], [[VAL2]]
879 uc %= uc2;
880
881// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
882// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
883// CHECK: %{{.*}} = srem <8 x i16> [[VAL1]], [[VAL2]]
884 ss %= ss2;
885// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
886// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
887// CHECK: %{{.*}} = urem <8 x i16> [[VAL1]], [[VAL2]]
888 us %= us2;
889
890// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
891// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
892// CHECK: %{{.*}} = srem <4 x i32> [[VAL1]], [[VAL2]]
893 si %= si2;
894// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
895// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
896// CHECK: %{{.*}} = urem <4 x i32> [[VAL1]], [[VAL2]]
897 ui %= ui2;
898
899// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
900// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
901// CHECK: %{{.*}} = srem <2 x i64> [[VAL1]], [[VAL2]]
902 sl %= sl2;
903// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
904// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
905// CHECK: %{{.*}} = urem <2 x i64> [[VAL1]], [[VAL2]]
906 ul %= ul2;
907}
908
909void test_not (void)
910{
911// CHECK-LABEL: test_not
912
913// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
914// CHECK: %{{.*}} = xor <16 x i8> [[VAL]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
915 sc = ~sc2;
916// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
917// CHECK: %{{.*}} = xor <16 x i8> [[VAL]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
918 uc = ~uc2;
919// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
920// CHECK: %{{.*}} = xor <16 x i8> [[VAL]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
921 bc = ~bc2;
922
923// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
924// CHECK: %{{.*}} = xor <8 x i16> [[VAL]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
925 ss = ~ss2;
926// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
927// CHECK: %{{.*}} = xor <8 x i16> [[VAL]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
928 us = ~us2;
929// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
930// CHECK: %{{.*}} = xor <8 x i16> [[VAL]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
931 bs = ~bs2;
932
933// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
934// CHECK: %{{.*}} = xor <4 x i32> [[VAL]], <i32 -1, i32 -1, i32 -1, i32 -1>
935 si = ~si2;
936// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
937// CHECK: %{{.*}} = xor <4 x i32> [[VAL]], <i32 -1, i32 -1, i32 -1, i32 -1>
938 ui = ~ui2;
939// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
940// CHECK: %{{.*}} = xor <4 x i32> [[VAL]], <i32 -1, i32 -1, i32 -1, i32 -1>
941 bi = ~bi2;
942
943// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
944// CHECK: %{{.*}} = xor <2 x i64> [[VAL]], <i64 -1, i64 -1>
945 sl = ~sl2;
946// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
947// CHECK: %{{.*}} = xor <2 x i64> [[VAL]], <i64 -1, i64 -1>
948 ul = ~ul2;
949// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
950// CHECK: %{{.*}} = xor <2 x i64> [[VAL]], <i64 -1, i64 -1>
951 bl = ~bl2;
952}
953
954void test_and (void)
955{
956// CHECK-LABEL: test_and
957
958// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
959// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
960// CHECK: %{{.*}} = and <16 x i8> [[VAL2]], [[VAL1]]
961 sc = sc & sc2;
962// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
963// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
964// CHECK: %{{.*}} = and <16 x i8> [[VAL2]], [[VAL1]]
965 sc = sc & bc2;
966// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
967// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
968// CHECK: %{{.*}} = and <16 x i8> [[VAL2]], [[VAL1]]
969 sc = bc & sc2;
970// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
971// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
972// CHECK: %{{.*}} = and <16 x i8> [[VAL2]], [[VAL1]]
973 uc = uc & uc2;
974// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
975// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
976// CHECK: %{{.*}} = and <16 x i8> [[VAL2]], [[VAL1]]
977 uc = uc & bc2;
978// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
979// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
980// CHECK: %{{.*}} = and <16 x i8> [[VAL2]], [[VAL1]]
981 uc = bc & uc2;
982// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
983// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
984// CHECK: %{{.*}} = and <16 x i8> [[VAL2]], [[VAL1]]
985 bc = bc & bc2;
986
987// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
988// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
989// CHECK: %{{.*}} = and <8 x i16> [[VAL2]], [[VAL1]]
990 ss = ss & ss2;
991// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
992// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
993// CHECK: %{{.*}} = and <8 x i16> [[VAL2]], [[VAL1]]
994 ss = ss & bs2;
995// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
996// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
997// CHECK: %{{.*}} = and <8 x i16> [[VAL2]], [[VAL1]]
998 ss = bs & ss2;
999// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1000// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1001// CHECK: %{{.*}} = and <8 x i16> [[VAL2]], [[VAL1]]
1002 us = us & us2;
1003// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1004// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1005// CHECK: %{{.*}} = and <8 x i16> [[VAL2]], [[VAL1]]
1006 us = us & bs2;
1007// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1008// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1009// CHECK: %{{.*}} = and <8 x i16> [[VAL2]], [[VAL1]]
1010 us = bs & us2;
1011// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1012// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1013// CHECK: %{{.*}} = and <8 x i16> [[VAL2]], [[VAL1]]
1014 bs = bs & bs2;
1015
1016// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1017// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1018// CHECK: %{{.*}} = and <4 x i32> [[VAL2]], [[VAL1]]
1019 si = si & si2;
1020// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1021// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1022// CHECK: %{{.*}} = and <4 x i32> [[VAL2]], [[VAL1]]
1023 si = si & bi2;
1024// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1025// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1026// CHECK: %{{.*}} = and <4 x i32> [[VAL2]], [[VAL1]]
1027 si = bi & si2;
1028// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1029// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1030// CHECK: %{{.*}} = and <4 x i32> [[VAL2]], [[VAL1]]
1031 ui = ui & ui2;
1032// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1033// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1034// CHECK: %{{.*}} = and <4 x i32> [[VAL2]], [[VAL1]]
1035 ui = ui & bi2;
1036// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1037// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1038// CHECK: %{{.*}} = and <4 x i32> [[VAL2]], [[VAL1]]
1039 ui = bi & ui2;
1040// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1041// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1042// CHECK: %{{.*}} = and <4 x i32> [[VAL2]], [[VAL1]]
1043 bi = bi & bi2;
1044
1045// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1046// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1047// CHECK: %{{.*}} = and <2 x i64> [[VAL2]], [[VAL1]]
1048 sl = sl & sl2;
1049// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1050// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1051// CHECK: %{{.*}} = and <2 x i64> [[VAL2]], [[VAL1]]
1052 sl = sl & bl2;
1053// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1054// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1055// CHECK: %{{.*}} = and <2 x i64> [[VAL2]], [[VAL1]]
1056 sl = bl & sl2;
1057// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1058// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1059// CHECK: %{{.*}} = and <2 x i64> [[VAL2]], [[VAL1]]
1060 ul = ul & ul2;
1061// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1062// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1063// CHECK: %{{.*}} = and <2 x i64> [[VAL2]], [[VAL1]]
1064 ul = ul & bl2;
1065// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1066// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1067// CHECK: %{{.*}} = and <2 x i64> [[VAL2]], [[VAL1]]
1068 ul = bl & ul2;
1069// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1070// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1071// CHECK: %{{.*}} = and <2 x i64> [[VAL2]], [[VAL1]]
1072 bl = bl & bl2;
1073}
1074
1075void test_and_assign (void)
1076{
1077// CHECK-LABEL: test_and_assign
1078
1079// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1080// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1081// CHECK: %{{.*}} = and <16 x i8> [[VAL1]], [[VAL2]]
1082 sc &= sc2;
1083// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1084// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1085// CHECK: %{{.*}} = and <16 x i8> [[VAL1]], [[VAL2]]
1086 sc &= bc2;
1087// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1088// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1089// CHECK: %{{.*}} = and <16 x i8> [[VAL1]], [[VAL2]]
1090 uc &= uc2;
1091// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1092// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1093// CHECK: %{{.*}} = and <16 x i8> [[VAL1]], [[VAL2]]
1094 uc &= bc2;
1095// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1096// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
1097// CHECK: %{{.*}} = and <16 x i8> [[VAL1]], [[VAL2]]
1098 bc &= bc2;
1099
1100// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1101// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1102// CHECK: %{{.*}} = and <8 x i16> [[VAL1]], [[VAL2]]
1103 ss &= ss2;
1104// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1105// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1106// CHECK: %{{.*}} = and <8 x i16> [[VAL1]], [[VAL2]]
1107 ss &= bs2;
1108// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1109// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1110// CHECK: %{{.*}} = and <8 x i16> [[VAL1]], [[VAL2]]
1111 us &= us2;
1112// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1113// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1114// CHECK: %{{.*}} = and <8 x i16> [[VAL1]], [[VAL2]]
1115 us &= bs2;
1116// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1117// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1118// CHECK: %{{.*}} = and <8 x i16> [[VAL1]], [[VAL2]]
1119 bs &= bs2;
1120
1121// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1122// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1123// CHECK: %{{.*}} = and <4 x i32> [[VAL1]], [[VAL2]]
1124 si &= si2;
1125// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1126// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1127// CHECK: %{{.*}} = and <4 x i32> [[VAL1]], [[VAL2]]
1128 si &= bi2;
1129// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1130// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1131// CHECK: %{{.*}} = and <4 x i32> [[VAL1]], [[VAL2]]
1132 ui &= ui2;
1133// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1134// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1135// CHECK: %{{.*}} = and <4 x i32> [[VAL1]], [[VAL2]]
1136 ui &= bi2;
1137// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1138// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1139// CHECK: %{{.*}} = and <4 x i32> [[VAL1]], [[VAL2]]
1140 bi &= bi2;
1141
1142// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1143// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1144// CHECK: %{{.*}} = and <2 x i64> [[VAL1]], [[VAL2]]
1145 sl &= sl2;
1146// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1147// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1148// CHECK: %{{.*}} = and <2 x i64> [[VAL1]], [[VAL2]]
1149 sl &= bl2;
1150// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1151// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1152// CHECK: %{{.*}} = and <2 x i64> [[VAL1]], [[VAL2]]
1153 ul &= ul2;
1154// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1155// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1156// CHECK: %{{.*}} = and <2 x i64> [[VAL1]], [[VAL2]]
1157 ul &= bl2;
1158// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1159// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1160// CHECK: %{{.*}} = and <2 x i64> [[VAL1]], [[VAL2]]
1161 bl &= bl2;
1162}
1163
1164void test_or (void)
1165{
1166// CHECK-LABEL: test_or
1167
1168// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1169// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1170// CHECK: %{{.*}} = or <16 x i8> [[VAL2]], [[VAL1]]
1171 sc = sc | sc2;
1172// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1173// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1174// CHECK: %{{.*}} = or <16 x i8> [[VAL2]], [[VAL1]]
1175 sc = sc | bc2;
1176// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
1177// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1178// CHECK: %{{.*}} = or <16 x i8> [[VAL2]], [[VAL1]]
1179 sc = bc | sc2;
1180// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1181// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1182// CHECK: %{{.*}} = or <16 x i8> [[VAL2]], [[VAL1]]
1183 uc = uc | uc2;
1184// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1185// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1186// CHECK: %{{.*}} = or <16 x i8> [[VAL2]], [[VAL1]]
1187 uc = uc | bc2;
1188// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
1189// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1190// CHECK: %{{.*}} = or <16 x i8> [[VAL2]], [[VAL1]]
1191 uc = bc | uc2;
1192// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
1193// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1194// CHECK: %{{.*}} = or <16 x i8> [[VAL2]], [[VAL1]]
1195 bc = bc | bc2;
1196
1197// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1198// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1199// CHECK: %{{.*}} = or <8 x i16> [[VAL2]], [[VAL1]]
1200 ss = ss | ss2;
1201// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1202// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1203// CHECK: %{{.*}} = or <8 x i16> [[VAL2]], [[VAL1]]
1204 ss = ss | bs2;
1205// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1206// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1207// CHECK: %{{.*}} = or <8 x i16> [[VAL2]], [[VAL1]]
1208 ss = bs | ss2;
1209// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1210// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1211// CHECK: %{{.*}} = or <8 x i16> [[VAL2]], [[VAL1]]
1212 us = us | us2;
1213// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1214// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1215// CHECK: %{{.*}} = or <8 x i16> [[VAL2]], [[VAL1]]
1216 us = us | bs2;
1217// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1218// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1219// CHECK: %{{.*}} = or <8 x i16> [[VAL2]], [[VAL1]]
1220 us = bs | us2;
1221// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1222// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1223// CHECK: %{{.*}} = or <8 x i16> [[VAL2]], [[VAL1]]
1224 bs = bs | bs2;
1225
1226// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1227// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1228// CHECK: %{{.*}} = or <4 x i32> [[VAL2]], [[VAL1]]
1229 si = si | si2;
1230// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1231// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1232// CHECK: %{{.*}} = or <4 x i32> [[VAL2]], [[VAL1]]
1233 si = si | bi2;
1234// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1235// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1236// CHECK: %{{.*}} = or <4 x i32> [[VAL2]], [[VAL1]]
1237 si = bi | si2;
1238// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1239// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1240// CHECK: %{{.*}} = or <4 x i32> [[VAL2]], [[VAL1]]
1241 ui = ui | ui2;
1242// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1243// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1244// CHECK: %{{.*}} = or <4 x i32> [[VAL2]], [[VAL1]]
1245 ui = ui | bi2;
1246// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1247// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1248// CHECK: %{{.*}} = or <4 x i32> [[VAL2]], [[VAL1]]
1249 ui = bi | ui2;
1250// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1251// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1252// CHECK: %{{.*}} = or <4 x i32> [[VAL2]], [[VAL1]]
1253 bi = bi | bi2;
1254
1255// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1256// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1257// CHECK: %{{.*}} = or <2 x i64> [[VAL2]], [[VAL1]]
1258 sl = sl | sl2;
1259// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1260// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1261// CHECK: %{{.*}} = or <2 x i64> [[VAL2]], [[VAL1]]
1262 sl = sl | bl2;
1263// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1264// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1265// CHECK: %{{.*}} = or <2 x i64> [[VAL2]], [[VAL1]]
1266 sl = bl | sl2;
1267// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1268// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1269// CHECK: %{{.*}} = or <2 x i64> [[VAL2]], [[VAL1]]
1270 ul = ul | ul2;
1271// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1272// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1273// CHECK: %{{.*}} = or <2 x i64> [[VAL2]], [[VAL1]]
1274 ul = ul | bl2;
1275// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1276// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1277// CHECK: %{{.*}} = or <2 x i64> [[VAL2]], [[VAL1]]
1278 ul = bl | ul2;
1279// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1280// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1281// CHECK: %{{.*}} = or <2 x i64> [[VAL2]], [[VAL1]]
1282 bl = bl | bl2;
1283}
1284
1285void test_or_assign (void)
1286{
1287// CHECK-LABEL: test_or_assign
1288
1289// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1290// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1291// CHECK: %{{.*}} = or <16 x i8> [[VAL1]], [[VAL2]]
1292 sc |= sc2;
1293// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1294// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1295// CHECK: %{{.*}} = or <16 x i8> [[VAL1]], [[VAL2]]
1296 sc |= bc2;
1297// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1298// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1299// CHECK: %{{.*}} = or <16 x i8> [[VAL1]], [[VAL2]]
1300 uc |= uc2;
1301// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1302// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1303// CHECK: %{{.*}} = or <16 x i8> [[VAL1]], [[VAL2]]
1304 uc |= bc2;
1305// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1306// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
1307// CHECK: %{{.*}} = or <16 x i8> [[VAL1]], [[VAL2]]
1308 bc |= bc2;
1309
1310// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1311// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1312// CHECK: %{{.*}} = or <8 x i16> [[VAL1]], [[VAL2]]
1313 ss |= ss2;
1314// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1315// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1316// CHECK: %{{.*}} = or <8 x i16> [[VAL1]], [[VAL2]]
1317 ss |= bs2;
1318// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1319// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1320// CHECK: %{{.*}} = or <8 x i16> [[VAL1]], [[VAL2]]
1321 us |= us2;
1322// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1323// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1324// CHECK: %{{.*}} = or <8 x i16> [[VAL1]], [[VAL2]]
1325 us |= bs2;
1326// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1327// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1328// CHECK: %{{.*}} = or <8 x i16> [[VAL1]], [[VAL2]]
1329 bs |= bs2;
1330
1331// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1332// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1333// CHECK: %{{.*}} = or <4 x i32> [[VAL1]], [[VAL2]]
1334 si |= si2;
1335// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1336// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1337// CHECK: %{{.*}} = or <4 x i32> [[VAL1]], [[VAL2]]
1338 si |= bi2;
1339// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1340// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1341// CHECK: %{{.*}} = or <4 x i32> [[VAL1]], [[VAL2]]
1342 ui |= ui2;
1343// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1344// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1345// CHECK: %{{.*}} = or <4 x i32> [[VAL1]], [[VAL2]]
1346 ui |= bi2;
1347// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1348// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1349// CHECK: %{{.*}} = or <4 x i32> [[VAL1]], [[VAL2]]
1350 bi |= bi2;
1351
1352// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1353// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1354// CHECK: %{{.*}} = or <2 x i64> [[VAL1]], [[VAL2]]
1355 sl |= sl2;
1356// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1357// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1358// CHECK: %{{.*}} = or <2 x i64> [[VAL1]], [[VAL2]]
1359 sl |= bl2;
1360// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1361// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1362// CHECK: %{{.*}} = or <2 x i64> [[VAL1]], [[VAL2]]
1363 ul |= ul2;
1364// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1365// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1366// CHECK: %{{.*}} = or <2 x i64> [[VAL1]], [[VAL2]]
1367 ul |= bl2;
1368// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1369// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1370// CHECK: %{{.*}} = or <2 x i64> [[VAL1]], [[VAL2]]
1371 bl |= bl2;
1372}
1373
1374void test_xor (void)
1375{
1376// CHECK-LABEL: test_xor
1377
1378// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1379// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1380// CHECK: %{{.*}} = xor <16 x i8> [[VAL1]], [[VAL2]]
1381 sc = sc ^ sc2;
1382// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1383// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1384// CHECK: %{{.*}} = xor <16 x i8> [[VAL1]], [[VAL2]]
1385 sc = sc ^ bc2;
1386// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
1387// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1388// CHECK: %{{.*}} = xor <16 x i8> [[VAL1]], [[VAL2]]
1389 sc = bc ^ sc2;
1390// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1391// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1392// CHECK: %{{.*}} = xor <16 x i8> [[VAL1]], [[VAL2]]
1393 uc = uc ^ uc2;
1394// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1395// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1396// CHECK: %{{.*}} = xor <16 x i8> [[VAL1]], [[VAL2]]
1397 uc = uc ^ bc2;
1398// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
1399// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1400// CHECK: %{{.*}} = xor <16 x i8> [[VAL1]], [[VAL2]]
1401 uc = bc ^ uc2;
1402// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
1403// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1404// CHECK: %{{.*}} = xor <16 x i8> [[VAL1]], [[VAL2]]
1405 bc = bc ^ bc2;
1406
1407// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1408// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1409// CHECK: %{{.*}} = xor <8 x i16> [[VAL1]], [[VAL2]]
1410 ss = ss ^ ss2;
1411// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1412// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1413// CHECK: %{{.*}} = xor <8 x i16> [[VAL1]], [[VAL2]]
1414 ss = ss ^ bs2;
1415// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1416// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1417// CHECK: %{{.*}} = xor <8 x i16> [[VAL1]], [[VAL2]]
1418 ss = bs ^ ss2;
1419// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1420// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1421// CHECK: %{{.*}} = xor <8 x i16> [[VAL1]], [[VAL2]]
1422 us = us ^ us2;
1423// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1424// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1425// CHECK: %{{.*}} = xor <8 x i16> [[VAL1]], [[VAL2]]
1426 us = us ^ bs2;
1427// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1428// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1429// CHECK: %{{.*}} = xor <8 x i16> [[VAL1]], [[VAL2]]
1430 us = bs ^ us2;
1431// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1432// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1433// CHECK: %{{.*}} = xor <8 x i16> [[VAL1]], [[VAL2]]
1434 bs = bs ^ bs2;
1435
1436// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1437// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1438// CHECK: %{{.*}} = xor <4 x i32> [[VAL1]], [[VAL2]]
1439 si = si ^ si2;
1440// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1441// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1442// CHECK: %{{.*}} = xor <4 x i32> [[VAL1]], [[VAL2]]
1443 si = si ^ bi2;
1444// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1445// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1446// CHECK: %{{.*}} = xor <4 x i32> [[VAL1]], [[VAL2]]
1447 si = bi ^ si2;
1448// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1449// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1450// CHECK: %{{.*}} = xor <4 x i32> [[VAL1]], [[VAL2]]
1451 ui = ui ^ ui2;
1452// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1453// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1454// CHECK: %{{.*}} = xor <4 x i32> [[VAL1]], [[VAL2]]
1455 ui = ui ^ bi2;
1456// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1457// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1458// CHECK: %{{.*}} = xor <4 x i32> [[VAL1]], [[VAL2]]
1459 ui = bi ^ ui2;
1460// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1461// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1462// CHECK: %{{.*}} = xor <4 x i32> [[VAL1]], [[VAL2]]
1463 bi = bi ^ bi2;
1464
1465// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1466// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1467// CHECK: %{{.*}} = xor <2 x i64> [[VAL1]], [[VAL2]]
1468 sl = sl ^ sl2;
1469// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1470// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1471// CHECK: %{{.*}} = xor <2 x i64> [[VAL1]], [[VAL2]]
1472 sl = sl ^ bl2;
1473// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1474// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1475// CHECK: %{{.*}} = xor <2 x i64> [[VAL1]], [[VAL2]]
1476 sl = bl ^ sl2;
1477// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1478// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1479// CHECK: %{{.*}} = xor <2 x i64> [[VAL1]], [[VAL2]]
1480 ul = ul ^ ul2;
1481// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1482// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1483// CHECK: %{{.*}} = xor <2 x i64> [[VAL1]], [[VAL2]]
1484 ul = ul ^ bl2;
1485// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1486// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1487// CHECK: %{{.*}} = xor <2 x i64> [[VAL1]], [[VAL2]]
1488 ul = bl ^ ul2;
1489// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1490// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1491// CHECK: %{{.*}} = xor <2 x i64> [[VAL1]], [[VAL2]]
1492 bl = bl ^ bl2;
1493}
1494
1495void test_xor_assign (void)
1496{
1497// CHECK-LABEL: test_xor_assign
1498
1499// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1500// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1501// CHECK: %{{.*}} = xor <16 x i8> [[VAL2]], [[VAL1]]
1502 sc ^= sc2;
1503// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1504// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1505// CHECK: %{{.*}} = xor <16 x i8> [[VAL2]], [[VAL1]]
1506 sc ^= bc2;
1507// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1508// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1509// CHECK: %{{.*}} = xor <16 x i8> [[VAL2]], [[VAL1]]
1510 uc ^= uc2;
1511// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1512// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1513// CHECK: %{{.*}} = xor <16 x i8> [[VAL2]], [[VAL1]]
1514 uc ^= bc2;
1515// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
1516// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
1517// CHECK: %{{.*}} = xor <16 x i8> [[VAL2]], [[VAL1]]
1518 bc ^= bc2;
1519
1520// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1521// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1522// CHECK: %{{.*}} = xor <8 x i16> [[VAL2]], [[VAL1]]
1523 ss ^= ss2;
1524// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1525// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1526// CHECK: %{{.*}} = xor <8 x i16> [[VAL2]], [[VAL1]]
1527 ss ^= bs2;
1528// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1529// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1530// CHECK: %{{.*}} = xor <8 x i16> [[VAL2]], [[VAL1]]
1531 us ^= us2;
1532// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1533// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1534// CHECK: %{{.*}} = xor <8 x i16> [[VAL2]], [[VAL1]]
1535 us ^= bs2;
1536// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
1537// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
1538// CHECK: %{{.*}} = xor <8 x i16> [[VAL2]], [[VAL1]]
1539 bs ^= bs2;
1540
1541// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1542// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1543// CHECK: %{{.*}} = xor <4 x i32> [[VAL2]], [[VAL1]]
1544 si ^= si2;
1545// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1546// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1547// CHECK: %{{.*}} = xor <4 x i32> [[VAL2]], [[VAL1]]
1548 si ^= bi2;
1549// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1550// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1551// CHECK: %{{.*}} = xor <4 x i32> [[VAL2]], [[VAL1]]
1552 ui ^= ui2;
1553// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1554// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1555// CHECK: %{{.*}} = xor <4 x i32> [[VAL2]], [[VAL1]]
1556 ui ^= bi2;
1557// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
1558// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
1559// CHECK: %{{.*}} = xor <4 x i32> [[VAL2]], [[VAL1]]
1560 bi ^= bi2;
1561
1562// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1563// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1564// CHECK: %{{.*}} = xor <2 x i64> [[VAL2]], [[VAL1]]
1565 sl ^= sl2;
1566// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1567// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1568// CHECK: %{{.*}} = xor <2 x i64> [[VAL2]], [[VAL1]]
1569 sl ^= bl2;
1570// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1571// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1572// CHECK: %{{.*}} = xor <2 x i64> [[VAL2]], [[VAL1]]
1573 ul ^= ul2;
1574// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1575// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1576// CHECK: %{{.*}} = xor <2 x i64> [[VAL2]], [[VAL1]]
1577 ul ^= bl2;
1578// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
1579// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
1580// CHECK: %{{.*}} = xor <2 x i64> [[VAL2]], [[VAL1]]
1581 bl ^= bl2;
1582}
1583
1584void test_sl (void)
1585{
1586// CHECK-LABEL: test_sl
1587
1588// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1589// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1590// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1591 sc = sc << sc2;
1592// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1593// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1594// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1595 sc = sc << uc2;
1596// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1597// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1598// CHECK: [[T2:%[^ ]+]] = insertelement <16 x i32> undef, i32 [[T1]], i32 0
1599// CHECK: [[T3:%[^ ]+]] = shufflevector <16 x i32> [[T2]], <16 x i32> undef, <16 x i32> zeroinitializer
1600// CHECK: [[CNT:%[^ ]+]] = trunc <16 x i32> [[T3]] to <16 x i8>
1601// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1602 sc = sc << cnt;
1603// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1604// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
1605 sc = sc << 5;
1606// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1607// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1608// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1609 uc = uc << sc2;
1610// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1611// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1612// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1613 uc = uc << uc2;
1614// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1615// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1616// CHECK: [[T2:%[^ ]+]] = insertelement <16 x i32> undef, i32 [[T1]], i32 0
1617// CHECK: [[T3:%[^ ]+]] = shufflevector <16 x i32> [[T2]], <16 x i32> undef, <16 x i32> zeroinitializer
1618// CHECK: [[CNT:%[^ ]+]] = trunc <16 x i32> [[T3]] to <16 x i8>
1619// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1620 uc = uc << cnt;
1621// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1622// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
1623 uc = uc << 5;
1624
1625// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1626// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1627// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1628 ss = ss << ss2;
1629// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1630// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1631// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1632 ss = ss << us2;
1633// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1634// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1635// CHECK: [[T2:%[^ ]+]] = insertelement <8 x i32> undef, i32 [[T1]], i32 0
1636// CHECK: [[T3:%[^ ]+]] = shufflevector <8 x i32> [[T2]], <8 x i32> undef, <8 x i32> zeroinitializer
1637// CHECK: [[CNT:%[^ ]+]] = trunc <8 x i32> [[T3]] to <8 x i16>
1638// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1639 ss = ss << cnt;
1640// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1641// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
1642 ss = ss << 5;
1643// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1644// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1645// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1646 us = us << ss2;
1647// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1648// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1649// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1650 us = us << us2;
1651// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1652// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1653// CHECK: [[T2:%[^ ]+]] = insertelement <8 x i32> undef, i32 [[T1]], i32 0
1654// CHECK: [[T3:%[^ ]+]] = shufflevector <8 x i32> [[T2]], <8 x i32> undef, <8 x i32> zeroinitializer
1655// CHECK: [[CNT:%[^ ]+]] = trunc <8 x i32> [[T3]] to <8 x i16>
1656// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1657 us = us << cnt;
1658// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1659// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
1660 us = us << 5;
1661
1662// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1663// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1664// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1665 si = si << si2;
1666// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1667// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1668// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1669 si = si << ui2;
1670// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1671// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1672// CHECK: [[T3:%[^ ]+]] = insertelement <4 x i32> undef, i32 [[T1]], i32 0
1673// CHECK: [[CNT:%[^ ]+]] = shufflevector <4 x i32> [[T3]], <4 x i32> undef, <4 x i32> zeroinitializer
1674// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1675 si = si << cnt;
1676// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1677// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], <i32 5, i32 5, i32 5, i32 5>
1678 si = si << 5;
1679// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1680// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1681// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1682 ui = ui << si2;
1683// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1684// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1685// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1686 ui = ui << ui2;
1687// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1688// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1689// CHECK: [[T3:%[^ ]+]] = insertelement <4 x i32> undef, i32 [[T1]], i32 0
1690// CHECK: [[CNT:%[^ ]+]] = shufflevector <4 x i32> [[T3]], <4 x i32> undef, <4 x i32> zeroinitializer
1691// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1692 ui = ui << cnt;
1693// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1694// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], <i32 5, i32 5, i32 5, i32 5>
1695 ui = ui << 5;
1696
1697// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1698// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1699// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1700 sl = sl << sl2;
1701// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1702// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1703// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1704 sl = sl << ul2;
1705// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1706// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1707// CHECK: [[T2:%[^ ]+]] = insertelement <2 x i32> undef, i32 [[T1]], i32 0
1708// CHECK: [[T3:%[^ ]+]] = shufflevector <2 x i32> [[T2]], <2 x i32> undef, <2 x i32> zeroinitializer
1709// CHECK: [[CNT:%[^ ]+]] = zext <2 x i32> [[T3]] to <2 x i64>
1710// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1711 sl = sl << cnt;
1712// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1713// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], <i64 5, i64 5>
1714 sl = sl << 5;
1715// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1716// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1717// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1718 ul = ul << sl2;
1719// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1720// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1721// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1722 ul = ul << ul2;
1723// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1724// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1725// CHECK: [[T2:%[^ ]+]] = insertelement <2 x i32> undef, i32 [[T1]], i32 0
1726// CHECK: [[T3:%[^ ]+]] = shufflevector <2 x i32> [[T2]], <2 x i32> undef, <2 x i32> zeroinitializer
1727// CHECK: [[CNT:%[^ ]+]] = zext <2 x i32> [[T3]] to <2 x i64>
1728// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1729 ul = ul << cnt;
1730// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1731// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], <i64 5, i64 5>
1732 ul = ul << 5;
1733}
1734
1735void test_sl_assign (void)
1736{
1737// CHECK-LABEL: test_sl_assign
1738
1739// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1740// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1741// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1742 sc <<= sc2;
1743// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1744// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1745// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1746 sc <<= uc2;
1747// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1748// CHECK: [[T2:%[^ ]+]] = insertelement <16 x i32> undef, i32 [[T1]], i32 0
1749// CHECK: [[T3:%[^ ]+]] = shufflevector <16 x i32> [[T2]], <16 x i32> undef, <16 x i32> zeroinitializer
1750// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1751// CHECK: [[CNT:%[^ ]+]] = trunc <16 x i32> [[T3]] to <16 x i8>
1752// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1753 sc <<= cnt;
1754// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1755// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
1756 sc <<= 5;
1757// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1758// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1759// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1760 uc <<= sc2;
1761// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1762// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1763// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1764 uc <<= uc2;
1765// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1766// CHECK: [[T2:%[^ ]+]] = insertelement <16 x i32> undef, i32 [[T1]], i32 0
1767// CHECK: [[T3:%[^ ]+]] = shufflevector <16 x i32> [[T2]], <16 x i32> undef, <16 x i32> zeroinitializer
1768// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1769// CHECK: [[CNT:%[^ ]+]] = trunc <16 x i32> [[T3]] to <16 x i8>
1770// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], [[CNT]]
1771 uc <<= cnt;
1772// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1773// CHECK: %{{.*}} = shl <16 x i8> [[VAL]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
1774 uc <<= 5;
1775
1776// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1777// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1778// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1779 ss <<= ss2;
1780// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1781// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1782// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1783 ss <<= us2;
1784// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1785// CHECK: [[T2:%[^ ]+]] = insertelement <8 x i32> undef, i32 [[T1]], i32 0
1786// CHECK: [[T3:%[^ ]+]] = shufflevector <8 x i32> [[T2]], <8 x i32> undef, <8 x i32> zeroinitializer
1787// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1788// CHECK: [[CNT:%[^ ]+]] = trunc <8 x i32> [[T3]] to <8 x i16>
1789// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1790 ss <<= cnt;
1791// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1792// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
1793 ss <<= 5;
1794// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1795// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1796// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1797 us <<= ss2;
1798// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1799// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1800// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1801 us <<= us2;
1802// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1803// CHECK: [[T2:%[^ ]+]] = insertelement <8 x i32> undef, i32 [[T1]], i32 0
1804// CHECK: [[T3:%[^ ]+]] = shufflevector <8 x i32> [[T2]], <8 x i32> undef, <8 x i32> zeroinitializer
1805// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1806// CHECK: [[CNT:%[^ ]+]] = trunc <8 x i32> [[T3]] to <8 x i16>
1807// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], [[CNT]]
1808 us <<= cnt;
1809// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1810// CHECK: %{{.*}} = shl <8 x i16> [[VAL]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
1811 us <<= 5;
1812
1813// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1814// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1815// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1816 si <<= si2;
1817// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1818// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1819// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1820 si <<= ui2;
1821// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1822// CHECK: [[T3:%[^ ]+]] = insertelement <4 x i32> undef, i32 [[T1]], i32 0
1823// CHECK: [[CNT:%[^ ]+]] = shufflevector <4 x i32> [[T3]], <4 x i32> undef, <4 x i32> zeroinitializer
1824// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1825// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1826 si <<= cnt;
1827// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1828// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], <i32 5, i32 5, i32 5, i32 5>
1829 si <<= 5;
1830// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1831// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1832// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1833 ui <<= si2;
1834// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1835// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1836// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1837 ui <<= ui2;
1838// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1839// CHECK: [[T3:%[^ ]+]] = insertelement <4 x i32> undef, i32 [[T1]], i32 0
1840// CHECK: [[CNT:%[^ ]+]] = shufflevector <4 x i32> [[T3]], <4 x i32> undef, <4 x i32> zeroinitializer
1841// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1842// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], [[CNT]]
1843 ui <<= cnt;
1844// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1845// CHECK: %{{.*}} = shl <4 x i32> [[VAL]], <i32 5, i32 5, i32 5, i32 5>
1846 ui <<= 5;
1847
1848// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1849// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1850// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1851 sl <<= sl2;
1852// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1853// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1854// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1855 sl <<= ul2;
1856// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1857// CHECK: [[T2:%[^ ]+]] = insertelement <2 x i32> undef, i32 [[T1]], i32 0
1858// CHECK: [[T3:%[^ ]+]] = shufflevector <2 x i32> [[T2]], <2 x i32> undef, <2 x i32> zeroinitializer
1859// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1860// CHECK: [[CNT:%[^ ]+]] = zext <2 x i32> [[T3]] to <2 x i64>
1861// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1862 sl <<= cnt;
1863// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
1864// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], <i64 5, i64 5>
1865 sl <<= 5;
1866// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
1867// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1868// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1869 ul <<= sl2;
1870// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
1871// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1872// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1873 ul <<= ul2;
1874// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1875// CHECK: [[T2:%[^ ]+]] = insertelement <2 x i32> undef, i32 [[T1]], i32 0
1876// CHECK: [[T3:%[^ ]+]] = shufflevector <2 x i32> [[T2]], <2 x i32> undef, <2 x i32> zeroinitializer
1877// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1878// CHECK: [[CNT:%[^ ]+]] = zext <2 x i32> [[T3]] to <2 x i64>
1879// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], [[CNT]]
1880 ul <<= cnt;
1881// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
1882// CHECK: %{{.*}} = shl <2 x i64> [[VAL]], <i64 5, i64 5>
1883 ul <<= 5;
1884}
1885
1886void test_sr (void)
1887{
1888// CHECK-LABEL: test_sr
1889
1890// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1891// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1892// CHECK: %{{.*}} = ashr <16 x i8> [[VAL]], [[CNT]]
1893 sc = sc >> sc2;
1894// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1895// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1896// CHECK: %{{.*}} = ashr <16 x i8> [[VAL]], [[CNT]]
1897 sc = sc >> uc2;
1898// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1899// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1900// CHECK: [[T2:%[^ ]+]] = insertelement <16 x i32> undef, i32 [[T1]], i32 0
1901// CHECK: [[T3:%[^ ]+]] = shufflevector <16 x i32> [[T2]], <16 x i32> undef, <16 x i32> zeroinitializer
1902// CHECK: [[CNT:%[^ ]+]] = trunc <16 x i32> [[T3]] to <16 x i8>
1903// CHECK: %{{.*}} = ashr <16 x i8> [[VAL]], [[CNT]]
1904 sc = sc >> cnt;
1905// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
1906// CHECK: %{{.*}} = ashr <16 x i8> [[VAL]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
1907 sc = sc >> 5;
1908// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1909// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
1910// CHECK: %{{.*}} = lshr <16 x i8> [[VAL]], [[CNT]]
1911 uc = uc >> sc2;
1912// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1913// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
1914// CHECK: %{{.*}} = lshr <16 x i8> [[VAL]], [[CNT]]
1915 uc = uc >> uc2;
1916// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1917// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1918// CHECK: [[T2:%[^ ]+]] = insertelement <16 x i32> undef, i32 [[T1]], i32 0
1919// CHECK: [[T3:%[^ ]+]] = shufflevector <16 x i32> [[T2]], <16 x i32> undef, <16 x i32> zeroinitializer
1920// CHECK: [[CNT:%[^ ]+]] = trunc <16 x i32> [[T3]] to <16 x i8>
1921// CHECK: %{{.*}} = lshr <16 x i8> [[VAL]], [[CNT]]
1922 uc = uc >> cnt;
1923// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
1924// CHECK: %{{.*}} = lshr <16 x i8> [[VAL]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
1925 uc = uc >> 5;
1926
1927// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1928// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1929// CHECK: %{{.*}} = ashr <8 x i16> [[VAL]], [[CNT]]
1930 ss = ss >> ss2;
1931// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1932// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1933// CHECK: %{{.*}} = ashr <8 x i16> [[VAL]], [[CNT]]
1934 ss = ss >> us2;
1935// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1936// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1937// CHECK: [[T2:%[^ ]+]] = insertelement <8 x i32> undef, i32 [[T1]], i32 0
1938// CHECK: [[T3:%[^ ]+]] = shufflevector <8 x i32> [[T2]], <8 x i32> undef, <8 x i32> zeroinitializer
1939// CHECK: [[CNT:%[^ ]+]] = trunc <8 x i32> [[T3]] to <8 x i16>
1940// CHECK: %{{.*}} = ashr <8 x i16> [[VAL]], [[CNT]]
1941 ss = ss >> cnt;
1942// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
1943// CHECK: %{{.*}} = ashr <8 x i16> [[VAL]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
1944 ss = ss >> 5;
1945// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1946// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
1947// CHECK: %{{.*}} = lshr <8 x i16> [[VAL]], [[CNT]]
1948 us = us >> ss2;
1949// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1950// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
1951// CHECK: %{{.*}} = lshr <8 x i16> [[VAL]], [[CNT]]
1952 us = us >> us2;
1953// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1954// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1955// CHECK: [[T2:%[^ ]+]] = insertelement <8 x i32> undef, i32 [[T1]], i32 0
1956// CHECK: [[T3:%[^ ]+]] = shufflevector <8 x i32> [[T2]], <8 x i32> undef, <8 x i32> zeroinitializer
1957// CHECK: [[CNT:%[^ ]+]] = trunc <8 x i32> [[T3]] to <8 x i16>
1958// CHECK: %{{.*}} = lshr <8 x i16> [[VAL]], [[CNT]]
1959 us = us >> cnt;
1960// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
1961// CHECK: %{{.*}} = lshr <8 x i16> [[VAL]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
1962 us = us >> 5;
1963
1964// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1965// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1966// CHECK: %{{.*}} = ashr <4 x i32> [[VAL]], [[CNT]]
1967 si = si >> si2;
1968// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1969// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1970// CHECK: %{{.*}} = ashr <4 x i32> [[VAL]], [[CNT]]
1971 si = si >> ui2;
1972// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1973// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1974// CHECK: [[T3:%[^ ]+]] = insertelement <4 x i32> undef, i32 [[T1]], i32 0
1975// CHECK: [[CNT:%[^ ]+]] = shufflevector <4 x i32> [[T3]], <4 x i32> undef, <4 x i32> zeroinitializer
1976// CHECK: %{{.*}} = ashr <4 x i32> [[VAL]], [[CNT]]
1977 si = si >> cnt;
1978// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
1979// CHECK: %{{.*}} = ashr <4 x i32> [[VAL]], <i32 5, i32 5, i32 5, i32 5>
1980 si = si >> 5;
1981// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1982// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
1983// CHECK: %{{.*}} = lshr <4 x i32> [[VAL]], [[CNT]]
1984 ui = ui >> si2;
1985// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1986// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
1987// CHECK: %{{.*}} = lshr <4 x i32> [[VAL]], [[CNT]]
1988 ui = ui >> ui2;
1989// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1990// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
1991// CHECK: [[T3:%[^ ]+]] = insertelement <4 x i32> undef, i32 [[T1]], i32 0
1992// CHECK: [[CNT:%[^ ]+]] = shufflevector <4 x i32> [[T3]], <4 x i32> undef, <4 x i32> zeroinitializer
1993// CHECK: %{{.*}} = lshr <4 x i32> [[VAL]], [[CNT]]
1994 ui = ui >> cnt;
1995// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
1996// CHECK: %{{.*}} = lshr <4 x i32> [[VAL]], <i32 5, i32 5, i32 5, i32 5>
1997 ui = ui >> 5;
1998
1999// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2000// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2001// CHECK: %{{.*}} = ashr <2 x i64> [[VAL]], [[CNT]]
2002 sl = sl >> sl2;
2003// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2004// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2005// CHECK: %{{.*}} = ashr <2 x i64> [[VAL]], [[CNT]]
2006 sl = sl >> ul2;
2007// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2008// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2009// CHECK: [[T2:%[^ ]+]] = insertelement <2 x i32> undef, i32 [[T1]], i32 0
2010// CHECK: [[T3:%[^ ]+]] = shufflevector <2 x i32> [[T2]], <2 x i32> undef, <2 x i32> zeroinitializer
2011// CHECK: [[CNT:%[^ ]+]] = zext <2 x i32> [[T3]] to <2 x i64>
2012// CHECK: %{{.*}} = ashr <2 x i64> [[VAL]], [[CNT]]
2013 sl = sl >> cnt;
2014// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2015// CHECK: %{{.*}} = ashr <2 x i64> [[VAL]], <i64 5, i64 5>
2016 sl = sl >> 5;
2017// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2018// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2019// CHECK: %{{.*}} = lshr <2 x i64> [[VAL]], [[CNT]]
2020 ul = ul >> sl2;
2021// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2022// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2023// CHECK: %{{.*}} = lshr <2 x i64> [[VAL]], [[CNT]]
2024 ul = ul >> ul2;
2025// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2026// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2027// CHECK: [[T2:%[^ ]+]] = insertelement <2 x i32> undef, i32 [[T1]], i32 0
2028// CHECK: [[T3:%[^ ]+]] = shufflevector <2 x i32> [[T2]], <2 x i32> undef, <2 x i32> zeroinitializer
2029// CHECK: [[CNT:%[^ ]+]] = zext <2 x i32> [[T3]] to <2 x i64>
2030// CHECK: %{{.*}} = lshr <2 x i64> [[VAL]], [[CNT]]
2031 ul = ul >> cnt;
2032// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2033// CHECK: %{{.*}} = lshr <2 x i64> [[VAL]], <i64 5, i64 5>
2034 ul = ul >> 5;
2035}
2036
2037void test_sr_assign (void)
2038{
2039// CHECK-LABEL: test_sr_assign
2040
2041// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2042// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2043// CHECK: %{{.*}} = ashr <16 x i8> [[VAL]], [[CNT]]
2044 sc >>= sc2;
2045// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2046// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2047// CHECK: %{{.*}} = ashr <16 x i8> [[VAL]], [[CNT]]
2048 sc >>= uc2;
2049// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2050// CHECK: [[T2:%[^ ]+]] = insertelement <16 x i32> undef, i32 [[T1]], i32 0
2051// CHECK: [[T3:%[^ ]+]] = shufflevector <16 x i32> [[T2]], <16 x i32> undef, <16 x i32> zeroinitializer
2052// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2053// CHECK: [[CNT:%[^ ]+]] = trunc <16 x i32> [[T3]] to <16 x i8>
2054// CHECK: %{{.*}} = ashr <16 x i8> [[VAL]], [[CNT]]
2055 sc >>= cnt;
2056// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2057// CHECK: %{{.*}} = ashr <16 x i8> [[VAL]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
2058 sc >>= 5;
2059// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2060// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2061// CHECK: %{{.*}} = lshr <16 x i8> [[VAL]], [[CNT]]
2062 uc >>= sc2;
2063// CHECK: [[CNT:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2064// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2065// CHECK: %{{.*}} = lshr <16 x i8> [[VAL]], [[CNT]]
2066 uc >>= uc2;
2067// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2068// CHECK: [[T2:%[^ ]+]] = insertelement <16 x i32> undef, i32 [[T1]], i32 0
2069// CHECK: [[T3:%[^ ]+]] = shufflevector <16 x i32> [[T2]], <16 x i32> undef, <16 x i32> zeroinitializer
2070// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2071// CHECK: [[CNT:%[^ ]+]] = trunc <16 x i32> [[T3]] to <16 x i8>
2072// CHECK: %{{.*}} = lshr <16 x i8> [[VAL]], [[CNT]]
2073 uc >>= cnt;
2074// CHECK: [[VAL:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2075// CHECK: %{{.*}} = lshr <16 x i8> [[VAL]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
2076 uc >>= 5;
2077
2078// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2079// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2080// CHECK: %{{.*}} = ashr <8 x i16> [[VAL]], [[CNT]]
2081 ss >>= ss2;
2082// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2083// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2084// CHECK: %{{.*}} = ashr <8 x i16> [[VAL]], [[CNT]]
2085 ss >>= us2;
2086// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2087// CHECK: [[T2:%[^ ]+]] = insertelement <8 x i32> undef, i32 [[T1]], i32 0
2088// CHECK: [[T3:%[^ ]+]] = shufflevector <8 x i32> [[T2]], <8 x i32> undef, <8 x i32> zeroinitializer
2089// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2090// CHECK: [[CNT:%[^ ]+]] = trunc <8 x i32> [[T3]] to <8 x i16>
2091// CHECK: %{{.*}} = ashr <8 x i16> [[VAL]], [[CNT]]
2092 ss >>= cnt;
2093// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2094// CHECK: %{{.*}} = ashr <8 x i16> [[VAL]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
2095 ss >>= 5;
2096// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2097// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2098// CHECK: %{{.*}} = lshr <8 x i16> [[VAL]], [[CNT]]
2099 us >>= ss2;
2100// CHECK: [[CNT:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2101// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2102// CHECK: %{{.*}} = lshr <8 x i16> [[VAL]], [[CNT]]
2103 us >>= us2;
2104// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2105// CHECK: [[T2:%[^ ]+]] = insertelement <8 x i32> undef, i32 [[T1]], i32 0
2106// CHECK: [[T3:%[^ ]+]] = shufflevector <8 x i32> [[T2]], <8 x i32> undef, <8 x i32> zeroinitializer
2107// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2108// CHECK: [[CNT:%[^ ]+]] = trunc <8 x i32> [[T3]] to <8 x i16>
2109// CHECK: %{{.*}} = lshr <8 x i16> [[VAL]], [[CNT]]
2110 us >>= cnt;
2111// CHECK: [[VAL:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2112// CHECK: %{{.*}} = lshr <8 x i16> [[VAL]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
2113 us >>= 5;
2114
2115// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2116// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2117// CHECK: %{{.*}} = ashr <4 x i32> [[VAL]], [[CNT]]
2118 si >>= si2;
2119// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2120// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2121// CHECK: %{{.*}} = ashr <4 x i32> [[VAL]], [[CNT]]
2122 si >>= ui2;
2123// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2124// CHECK: [[T3:%[^ ]+]] = insertelement <4 x i32> undef, i32 [[T1]], i32 0
2125// CHECK: [[CNT:%[^ ]+]] = shufflevector <4 x i32> [[T3]], <4 x i32> undef, <4 x i32> zeroinitializer
2126// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2127// CHECK: %{{.*}} = ashr <4 x i32> [[VAL]], [[CNT]]
2128 si >>= cnt;
2129// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2130// CHECK: %{{.*}} = ashr <4 x i32> [[VAL]], <i32 5, i32 5, i32 5, i32 5>
2131 si >>= 5;
2132// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2133// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2134// CHECK: %{{.*}} = lshr <4 x i32> [[VAL]], [[CNT]]
2135 ui >>= si2;
2136// CHECK: [[CNT:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2137// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2138// CHECK: %{{.*}} = lshr <4 x i32> [[VAL]], [[CNT]]
2139 ui >>= ui2;
2140// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2141// CHECK: [[T3:%[^ ]+]] = insertelement <4 x i32> undef, i32 [[T1]], i32 0
2142// CHECK: [[CNT:%[^ ]+]] = shufflevector <4 x i32> [[T3]], <4 x i32> undef, <4 x i32> zeroinitializer
2143// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2144// CHECK: %{{.*}} = lshr <4 x i32> [[VAL]], [[CNT]]
2145 ui >>= cnt;
2146// CHECK: [[VAL:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2147// CHECK: %{{.*}} = lshr <4 x i32> [[VAL]], <i32 5, i32 5, i32 5, i32 5>
2148 ui >>= 5;
2149
2150// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2151// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2152// CHECK: %{{.*}} = ashr <2 x i64> [[VAL]], [[CNT]]
2153 sl >>= sl2;
2154// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2155// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2156// CHECK: %{{.*}} = ashr <2 x i64> [[VAL]], [[CNT]]
2157 sl >>= ul2;
2158// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2159// CHECK: [[T2:%[^ ]+]] = insertelement <2 x i32> undef, i32 [[T1]], i32 0
2160// CHECK: [[T3:%[^ ]+]] = shufflevector <2 x i32> [[T2]], <2 x i32> undef, <2 x i32> zeroinitializer
2161// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2162// CHECK: [[CNT:%[^ ]+]] = zext <2 x i32> [[T3]] to <2 x i64>
2163// CHECK: %{{.*}} = ashr <2 x i64> [[VAL]], [[CNT]]
2164 sl >>= cnt;
2165// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2166// CHECK: %{{.*}} = ashr <2 x i64> [[VAL]], <i64 5, i64 5>
2167 sl >>= 5;
2168// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2169// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2170// CHECK: %{{.*}} = lshr <2 x i64> [[VAL]], [[CNT]]
2171 ul >>= sl2;
2172// CHECK: [[CNT:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2173// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2174// CHECK: %{{.*}} = lshr <2 x i64> [[VAL]], [[CNT]]
2175 ul >>= ul2;
2176// CHECK: [[T1:%[^ ]+]] = load volatile i32, i32* @cnt
2177// CHECK: [[T2:%[^ ]+]] = insertelement <2 x i32> undef, i32 [[T1]], i32 0
2178// CHECK: [[T3:%[^ ]+]] = shufflevector <2 x i32> [[T2]], <2 x i32> undef, <2 x i32> zeroinitializer
2179// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2180// CHECK: [[CNT:%[^ ]+]] = zext <2 x i32> [[T3]] to <2 x i64>
2181// CHECK: %{{.*}} = lshr <2 x i64> [[VAL]], [[CNT]]
2182 ul >>= cnt;
2183// CHECK: [[VAL:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2184// CHECK: %{{.*}} = lshr <2 x i64> [[VAL]], <i64 5, i64 5>
2185 ul >>= 5;
2186}
2187
2188
2189void test_cmpeq (void)
2190{
2191// CHECK-LABEL: test_cmpeq
2192
2193// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2194// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2195// CHECK: [[CMP:%[^ ]+]] = icmp eq <16 x i8> [[VAL1]], [[VAL2]]
2196// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2197 bc = sc == sc2;
2198// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2199// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2200// CHECK: [[CMP:%[^ ]+]] = icmp eq <16 x i8> [[VAL1]], [[VAL2]]
2201// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2202 bc = sc == bc2;
2203// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2204// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2205// CHECK: [[CMP:%[^ ]+]] = icmp eq <16 x i8> [[VAL1]], [[VAL2]]
2206// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2207 bc = bc == sc2;
2208// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2209// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2210// CHECK: [[CMP:%[^ ]+]] = icmp eq <16 x i8> [[VAL1]], [[VAL2]]
2211// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2212 bc = uc == uc2;
2213// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2214// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2215// CHECK: [[CMP:%[^ ]+]] = icmp eq <16 x i8> [[VAL1]], [[VAL2]]
2216// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2217 bc = uc == bc2;
2218// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2219// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2220// CHECK: [[CMP:%[^ ]+]] = icmp eq <16 x i8> [[VAL1]], [[VAL2]]
2221// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2222 bc = bc == uc2;
2223// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2224// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2225// CHECK: [[CMP:%[^ ]+]] = icmp eq <16 x i8> [[VAL1]], [[VAL2]]
2226// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2227 bc = bc == bc2;
2228
2229// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2230// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2231// CHECK: [[CMP:%[^ ]+]] = icmp eq <8 x i16> [[VAL1]], [[VAL2]]
2232// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2233 bs = ss == ss2;
2234// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2235// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2236// CHECK: [[CMP:%[^ ]+]] = icmp eq <8 x i16> [[VAL1]], [[VAL2]]
2237// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2238 bs = ss == bs2;
2239// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2240// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2241// CHECK: [[CMP:%[^ ]+]] = icmp eq <8 x i16> [[VAL1]], [[VAL2]]
2242// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2243 bs = bs == ss2;
2244// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2245// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2246// CHECK: [[CMP:%[^ ]+]] = icmp eq <8 x i16> [[VAL1]], [[VAL2]]
2247// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2248 bs = us == us2;
2249// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2250// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2251// CHECK: [[CMP:%[^ ]+]] = icmp eq <8 x i16> [[VAL1]], [[VAL2]]
2252// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2253 bs = us == bs2;
2254// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2255// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2256// CHECK: [[CMP:%[^ ]+]] = icmp eq <8 x i16> [[VAL1]], [[VAL2]]
2257// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2258 bs = bs == us2;
2259// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2260// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2261// CHECK: [[CMP:%[^ ]+]] = icmp eq <8 x i16> [[VAL1]], [[VAL2]]
2262// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2263 bs = bs == bs2;
2264
2265// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2266// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2267// CHECK: [[CMP:%[^ ]+]] = icmp eq <4 x i32> [[VAL1]], [[VAL2]]
2268// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2269 bi = si == si2;
2270// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2271// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2272// CHECK: [[CMP:%[^ ]+]] = icmp eq <4 x i32> [[VAL1]], [[VAL2]]
2273// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2274 bi = si == bi2;
2275// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2276// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2277// CHECK: [[CMP:%[^ ]+]] = icmp eq <4 x i32> [[VAL1]], [[VAL2]]
2278// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2279 bi = bi == si2;
2280// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2281// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2282// CHECK: [[CMP:%[^ ]+]] = icmp eq <4 x i32> [[VAL1]], [[VAL2]]
2283// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2284 bi = ui == ui2;
2285// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2286// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2287// CHECK: [[CMP:%[^ ]+]] = icmp eq <4 x i32> [[VAL1]], [[VAL2]]
2288// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2289 bi = ui == bi2;
2290// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2291// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2292// CHECK: [[CMP:%[^ ]+]] = icmp eq <4 x i32> [[VAL1]], [[VAL2]]
2293// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2294 bi = bi == ui2;
2295// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2296// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2297// CHECK: [[CMP:%[^ ]+]] = icmp eq <4 x i32> [[VAL1]], [[VAL2]]
2298// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2299 bi = bi == bi2;
2300
2301// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2302// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2303// CHECK: [[CMP:%[^ ]+]] = icmp eq <2 x i64> [[VAL1]], [[VAL2]]
2304// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2305 bl = sl == sl2;
2306// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2307// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2308// CHECK: [[CMP:%[^ ]+]] = icmp eq <2 x i64> [[VAL1]], [[VAL2]]
2309// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2310 bl = sl == bl2;
2311// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2312// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2313// CHECK: [[CMP:%[^ ]+]] = icmp eq <2 x i64> [[VAL1]], [[VAL2]]
2314// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2315 bl = bl == sl2;
2316// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2317// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2318// CHECK: [[CMP:%[^ ]+]] = icmp eq <2 x i64> [[VAL1]], [[VAL2]]
2319// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2320 bl = ul == ul2;
2321// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2322// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2323// CHECK: [[CMP:%[^ ]+]] = icmp eq <2 x i64> [[VAL1]], [[VAL2]]
2324// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2325 bl = ul == bl2;
2326// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2327// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2328// CHECK: [[CMP:%[^ ]+]] = icmp eq <2 x i64> [[VAL1]], [[VAL2]]
2329// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2330 bl = bl == ul2;
2331// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2332// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2333// CHECK: [[CMP:%[^ ]+]] = icmp eq <2 x i64> [[VAL1]], [[VAL2]]
2334// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2335 bl = bl == bl2;
2336
2337// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
2338// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
2339// CHECK: [[CMP:%[^ ]+]] = fcmp oeq <2 x double> [[VAL1]], [[VAL2]]
2340// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2341 bl = fd == fd2;
2342}
2343
2344void test_cmpne (void)
2345{
2346// CHECK-LABEL: test_cmpne
2347
2348// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2349// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2350// CHECK: [[CMP:%[^ ]+]] = icmp ne <16 x i8> [[VAL1]], [[VAL2]]
2351// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2352 bc = sc != sc2;
2353// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2354// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2355// CHECK: [[CMP:%[^ ]+]] = icmp ne <16 x i8> [[VAL1]], [[VAL2]]
2356// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2357 bc = sc != bc2;
2358// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2359// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2360// CHECK: [[CMP:%[^ ]+]] = icmp ne <16 x i8> [[VAL1]], [[VAL2]]
2361// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2362 bc = bc != sc2;
2363// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2364// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2365// CHECK: [[CMP:%[^ ]+]] = icmp ne <16 x i8> [[VAL1]], [[VAL2]]
2366// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2367 bc = uc != uc2;
2368// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2369// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2370// CHECK: [[CMP:%[^ ]+]] = icmp ne <16 x i8> [[VAL1]], [[VAL2]]
2371// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2372 bc = uc != bc2;
2373// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2374// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2375// CHECK: [[CMP:%[^ ]+]] = icmp ne <16 x i8> [[VAL1]], [[VAL2]]
2376// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2377 bc = bc != uc2;
2378// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2379// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2380// CHECK: [[CMP:%[^ ]+]] = icmp ne <16 x i8> [[VAL1]], [[VAL2]]
2381// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2382 bc = bc != bc2;
2383
2384// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2385// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2386// CHECK: [[CMP:%[^ ]+]] = icmp ne <8 x i16> [[VAL1]], [[VAL2]]
2387// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2388 bs = ss != ss2;
2389// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2390// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2391// CHECK: [[CMP:%[^ ]+]] = icmp ne <8 x i16> [[VAL1]], [[VAL2]]
2392// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2393 bs = ss != bs2;
2394// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2395// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2396// CHECK: [[CMP:%[^ ]+]] = icmp ne <8 x i16> [[VAL1]], [[VAL2]]
2397// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2398 bs = bs != ss2;
2399// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2400// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2401// CHECK: [[CMP:%[^ ]+]] = icmp ne <8 x i16> [[VAL1]], [[VAL2]]
2402// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2403 bs = us != us2;
2404// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2405// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2406// CHECK: [[CMP:%[^ ]+]] = icmp ne <8 x i16> [[VAL1]], [[VAL2]]
2407// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2408 bs = us != bs2;
2409// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2410// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2411// CHECK: [[CMP:%[^ ]+]] = icmp ne <8 x i16> [[VAL1]], [[VAL2]]
2412// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2413 bs = bs != us2;
2414// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2415// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2416// CHECK: [[CMP:%[^ ]+]] = icmp ne <8 x i16> [[VAL1]], [[VAL2]]
2417// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2418 bs = bs != bs2;
2419
2420// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2421// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2422// CHECK: [[CMP:%[^ ]+]] = icmp ne <4 x i32> [[VAL1]], [[VAL2]]
2423// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2424 bi = si != si2;
2425// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2426// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2427// CHECK: [[CMP:%[^ ]+]] = icmp ne <4 x i32> [[VAL1]], [[VAL2]]
2428// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2429 bi = si != bi2;
2430// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2431// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2432// CHECK: [[CMP:%[^ ]+]] = icmp ne <4 x i32> [[VAL1]], [[VAL2]]
2433// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2434 bi = bi != si2;
2435// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2436// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2437// CHECK: [[CMP:%[^ ]+]] = icmp ne <4 x i32> [[VAL1]], [[VAL2]]
2438// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2439 bi = ui != ui2;
2440// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2441// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2442// CHECK: [[CMP:%[^ ]+]] = icmp ne <4 x i32> [[VAL1]], [[VAL2]]
2443// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2444 bi = ui != bi2;
2445// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2446// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2447// CHECK: [[CMP:%[^ ]+]] = icmp ne <4 x i32> [[VAL1]], [[VAL2]]
2448// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2449 bi = bi != ui2;
2450// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2451// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2452// CHECK: [[CMP:%[^ ]+]] = icmp ne <4 x i32> [[VAL1]], [[VAL2]]
2453// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2454 bi = bi != bi2;
2455
2456// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2457// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2458// CHECK: [[CMP:%[^ ]+]] = icmp ne <2 x i64> [[VAL1]], [[VAL2]]
2459// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2460 bl = sl != sl2;
2461// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2462// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2463// CHECK: [[CMP:%[^ ]+]] = icmp ne <2 x i64> [[VAL1]], [[VAL2]]
2464// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2465 bl = sl != bl2;
2466// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2467// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2468// CHECK: [[CMP:%[^ ]+]] = icmp ne <2 x i64> [[VAL1]], [[VAL2]]
2469// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2470 bl = bl != sl2;
2471// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2472// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2473// CHECK: [[CMP:%[^ ]+]] = icmp ne <2 x i64> [[VAL1]], [[VAL2]]
2474// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2475 bl = ul != ul2;
2476// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2477// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2478// CHECK: [[CMP:%[^ ]+]] = icmp ne <2 x i64> [[VAL1]], [[VAL2]]
2479// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2480 bl = ul != bl2;
2481// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2482// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2483// CHECK: [[CMP:%[^ ]+]] = icmp ne <2 x i64> [[VAL1]], [[VAL2]]
2484// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2485 bl = bl != ul2;
2486// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2487// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2488// CHECK: [[CMP:%[^ ]+]] = icmp ne <2 x i64> [[VAL1]], [[VAL2]]
2489// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2490 bl = bl != bl2;
2491
2492// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
2493// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
2494// CHECK: [[CMP:%[^ ]+]] = fcmp une <2 x double> [[VAL1]], [[VAL2]]
2495// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2496 bl = fd != fd2;
2497}
2498
2499void test_cmpge (void)
2500{
2501// CHECK-LABEL: test_cmpge
2502
2503// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2504// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2505// CHECK: [[CMP:%[^ ]+]] = icmp sge <16 x i8> [[VAL1]], [[VAL2]]
2506// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2507 bc = sc >= sc2;
2508// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2509// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2510// CHECK: [[CMP:%[^ ]+]] = icmp uge <16 x i8> [[VAL1]], [[VAL2]]
2511// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2512 bc = uc >= uc2;
2513// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2514// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2515// CHECK: [[CMP:%[^ ]+]] = icmp uge <16 x i8> [[VAL1]], [[VAL2]]
2516// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2517 bc = bc >= bc2;
2518
2519// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2520// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2521// CHECK: [[CMP:%[^ ]+]] = icmp sge <8 x i16> [[VAL1]], [[VAL2]]
2522// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2523 bs = ss >= ss2;
2524// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2525// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2526// CHECK: [[CMP:%[^ ]+]] = icmp uge <8 x i16> [[VAL1]], [[VAL2]]
2527// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2528 bs = us >= us2;
2529// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2530// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2531// CHECK: [[CMP:%[^ ]+]] = icmp uge <8 x i16> [[VAL1]], [[VAL2]]
2532// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2533 bs = bs >= bs2;
2534
2535// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2536// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2537// CHECK: [[CMP:%[^ ]+]] = icmp sge <4 x i32> [[VAL1]], [[VAL2]]
2538// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2539 bi = si >= si2;
2540// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2541// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2542// CHECK: [[CMP:%[^ ]+]] = icmp uge <4 x i32> [[VAL1]], [[VAL2]]
2543// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2544 bi = ui >= ui2;
2545// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2546// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2547// CHECK: [[CMP:%[^ ]+]] = icmp uge <4 x i32> [[VAL1]], [[VAL2]]
2548// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2549 bi = bi >= bi2;
2550
2551// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2552// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2553// CHECK: [[CMP:%[^ ]+]] = icmp sge <2 x i64> [[VAL1]], [[VAL2]]
2554// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2555 bl = sl >= sl2;
2556// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2557// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2558// CHECK: [[CMP:%[^ ]+]] = icmp uge <2 x i64> [[VAL1]], [[VAL2]]
2559// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2560 bl = ul >= ul2;
2561// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2562// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2563// CHECK: [[CMP:%[^ ]+]] = icmp uge <2 x i64> [[VAL1]], [[VAL2]]
2564// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2565 bl = bl >= bl2;
2566
2567// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
2568// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
2569// CHECK: [[CMP:%[^ ]+]] = fcmp oge <2 x double> [[VAL1]], [[VAL2]]
2570// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2571 bl = fd >= fd2;
2572}
2573
2574void test_cmpgt (void)
2575{
2576// CHECK-LABEL: test_cmpgt
2577
2578// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2579// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2580// CHECK: [[CMP:%[^ ]+]] = icmp sgt <16 x i8> [[VAL1]], [[VAL2]]
2581// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2582 bc = sc > sc2;
2583// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2584// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2585// CHECK: [[CMP:%[^ ]+]] = icmp ugt <16 x i8> [[VAL1]], [[VAL2]]
2586// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2587 bc = uc > uc2;
2588// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2589// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2590// CHECK: [[CMP:%[^ ]+]] = icmp ugt <16 x i8> [[VAL1]], [[VAL2]]
2591// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2592 bc = bc > bc2;
2593
2594// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2595// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2596// CHECK: [[CMP:%[^ ]+]] = icmp sgt <8 x i16> [[VAL1]], [[VAL2]]
2597// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2598 bs = ss > ss2;
2599// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2600// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2601// CHECK: [[CMP:%[^ ]+]] = icmp ugt <8 x i16> [[VAL1]], [[VAL2]]
2602// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2603 bs = us > us2;
2604// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2605// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2606// CHECK: [[CMP:%[^ ]+]] = icmp ugt <8 x i16> [[VAL1]], [[VAL2]]
2607// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2608 bs = bs > bs2;
2609
2610// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2611// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2612// CHECK: [[CMP:%[^ ]+]] = icmp sgt <4 x i32> [[VAL1]], [[VAL2]]
2613// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2614 bi = si > si2;
2615// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2616// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2617// CHECK: [[CMP:%[^ ]+]] = icmp ugt <4 x i32> [[VAL1]], [[VAL2]]
2618// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2619 bi = ui > ui2;
2620// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2621// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2622// CHECK: [[CMP:%[^ ]+]] = icmp ugt <4 x i32> [[VAL1]], [[VAL2]]
2623// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2624 bi = bi > bi2;
2625
2626// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2627// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2628// CHECK: [[CMP:%[^ ]+]] = icmp sgt <2 x i64> [[VAL1]], [[VAL2]]
2629// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2630 bl = sl > sl2;
2631// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2632// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2633// CHECK: [[CMP:%[^ ]+]] = icmp ugt <2 x i64> [[VAL1]], [[VAL2]]
2634// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2635 bl = ul > ul2;
2636// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2637// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2638// CHECK: [[CMP:%[^ ]+]] = icmp ugt <2 x i64> [[VAL1]], [[VAL2]]
2639// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2640 bl = bl > bl2;
2641
2642// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
2643// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
2644// CHECK: [[CMP:%[^ ]+]] = fcmp ogt <2 x double> [[VAL1]], [[VAL2]]
2645// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2646 bl = fd > fd2;
2647}
2648
2649void test_cmple (void)
2650{
2651// CHECK-LABEL: test_cmple
2652
2653// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2654// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2655// CHECK: [[CMP:%[^ ]+]] = icmp sle <16 x i8> [[VAL1]], [[VAL2]]
2656// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2657 bc = sc <= sc2;
2658// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2659// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2660// CHECK: [[CMP:%[^ ]+]] = icmp ule <16 x i8> [[VAL1]], [[VAL2]]
2661// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2662 bc = uc <= uc2;
2663// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2664// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2665// CHECK: [[CMP:%[^ ]+]] = icmp ule <16 x i8> [[VAL1]], [[VAL2]]
2666// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2667 bc = bc <= bc2;
2668
2669// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2670// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2671// CHECK: [[CMP:%[^ ]+]] = icmp sle <8 x i16> [[VAL1]], [[VAL2]]
2672// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2673 bs = ss <= ss2;
2674// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2675// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2676// CHECK: [[CMP:%[^ ]+]] = icmp ule <8 x i16> [[VAL1]], [[VAL2]]
2677// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2678 bs = us <= us2;
2679// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2680// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2681// CHECK: [[CMP:%[^ ]+]] = icmp ule <8 x i16> [[VAL1]], [[VAL2]]
2682// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2683 bs = bs <= bs2;
2684
2685// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2686// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2687// CHECK: [[CMP:%[^ ]+]] = icmp sle <4 x i32> [[VAL1]], [[VAL2]]
2688// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2689 bi = si <= si2;
2690// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2691// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2692// CHECK: [[CMP:%[^ ]+]] = icmp ule <4 x i32> [[VAL1]], [[VAL2]]
2693// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2694 bi = ui <= ui2;
2695// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2696// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2697// CHECK: [[CMP:%[^ ]+]] = icmp ule <4 x i32> [[VAL1]], [[VAL2]]
2698// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2699 bi = bi <= bi2;
2700
2701// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2702// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2703// CHECK: [[CMP:%[^ ]+]] = icmp sle <2 x i64> [[VAL1]], [[VAL2]]
2704// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2705 bl = sl <= sl2;
2706// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2707// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2708// CHECK: [[CMP:%[^ ]+]] = icmp ule <2 x i64> [[VAL1]], [[VAL2]]
2709// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2710 bl = ul <= ul2;
2711// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2712// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2713// CHECK: [[CMP:%[^ ]+]] = icmp ule <2 x i64> [[VAL1]], [[VAL2]]
2714// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2715 bl = bl <= bl2;
2716
2717// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
2718// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
2719// CHECK: [[CMP:%[^ ]+]] = fcmp ole <2 x double> [[VAL1]], [[VAL2]]
2720// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2721 bl = fd <= fd2;
2722}
2723
2724void test_cmplt (void)
2725{
2726// CHECK-LABEL: test_cmplt
2727
2728// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc
2729// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @sc2
2730// CHECK: [[CMP:%[^ ]+]] = icmp slt <16 x i8> [[VAL1]], [[VAL2]]
2731// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2732 bc = sc < sc2;
2733// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc
2734// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @uc2
2735// CHECK: [[CMP:%[^ ]+]] = icmp ult <16 x i8> [[VAL1]], [[VAL2]]
2736// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2737 bc = uc < uc2;
2738// CHECK: [[VAL1:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc
2739// CHECK: [[VAL2:%[^ ]+]] = load volatile <16 x i8>, <16 x i8>* @bc2
2740// CHECK: [[CMP:%[^ ]+]] = icmp ult <16 x i8> [[VAL1]], [[VAL2]]
2741// CHECK: %{{.*}} = sext <16 x i1> [[CMP]] to <16 x i8>
2742 bc = bc < bc2;
2743
2744// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss
2745// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @ss2
2746// CHECK: [[CMP:%[^ ]+]] = icmp slt <8 x i16> [[VAL1]], [[VAL2]]
2747// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2748 bs = ss < ss2;
2749// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us
2750// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @us2
2751// CHECK: [[CMP:%[^ ]+]] = icmp ult <8 x i16> [[VAL1]], [[VAL2]]
2752// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2753 bs = us < us2;
2754// CHECK: [[VAL1:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs
2755// CHECK: [[VAL2:%[^ ]+]] = load volatile <8 x i16>, <8 x i16>* @bs2
2756// CHECK: [[CMP:%[^ ]+]] = icmp ult <8 x i16> [[VAL1]], [[VAL2]]
2757// CHECK: %{{.*}} = sext <8 x i1> [[CMP]] to <8 x i16>
2758 bs = bs < bs2;
2759
2760// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si
2761// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @si2
2762// CHECK: [[CMP:%[^ ]+]] = icmp slt <4 x i32> [[VAL1]], [[VAL2]]
2763// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2764 bi = si < si2;
2765// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui
2766// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @ui2
2767// CHECK: [[CMP:%[^ ]+]] = icmp ult <4 x i32> [[VAL1]], [[VAL2]]
2768// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2769 bi = ui < ui2;
2770// CHECK: [[VAL1:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi
2771// CHECK: [[VAL2:%[^ ]+]] = load volatile <4 x i32>, <4 x i32>* @bi2
2772// CHECK: [[CMP:%[^ ]+]] = icmp ult <4 x i32> [[VAL1]], [[VAL2]]
2773// CHECK: %{{.*}} = sext <4 x i1> [[CMP]] to <4 x i32>
2774 bi = bi < bi2;
2775
2776// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl
2777// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @sl2
2778// CHECK: [[CMP:%[^ ]+]] = icmp slt <2 x i64> [[VAL1]], [[VAL2]]
2779// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2780 bl = sl < sl2;
2781// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul
2782// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @ul2
2783// CHECK: [[CMP:%[^ ]+]] = icmp ult <2 x i64> [[VAL1]], [[VAL2]]
2784// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2785 bl = ul < ul2;
2786// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl
2787// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x i64>, <2 x i64>* @bl2
2788// CHECK: [[CMP:%[^ ]+]] = icmp ult <2 x i64> [[VAL1]], [[VAL2]]
2789// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2790 bl = bl < bl2;
2791
2792// CHECK: [[VAL1:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd
2793// CHECK: [[VAL2:%[^ ]+]] = load volatile <2 x double>, <2 x double>* @fd2
2794// CHECK: [[CMP:%[^ ]+]] = fcmp olt <2 x double> [[VAL1]], [[VAL2]]
2795// CHECK: %{{.*}} = sext <2 x i1> [[CMP]] to <2 x i64>
2796 bl = fd < fd2;
2797}
2798