blob: 002ac6504c69a19a7b39d368069cccc6dec41a77 [file] [log] [blame]
Matt Arsenaulte306a322014-10-21 16:25:08 +00001; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Matt Arsenault13ccc8f2014-06-09 16:20:25 +00002
3declare i32 @llvm.bswap.i32(i32) nounwind readnone
4declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>) nounwind readnone
5declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) nounwind readnone
Matt Arsenaulte306a322014-10-21 16:25:08 +00006declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>) nounwind readnone
Matt Arsenault13ccc8f2014-06-09 16:20:25 +00007declare i64 @llvm.bswap.i64(i64) nounwind readnone
8declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>) nounwind readnone
9declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>) nounwind readnone
10
Matt Arsenaulte306a322014-10-21 16:25:08 +000011; FUNC-LABEL: @test_bswap_i32
12; SI: BUFFER_LOAD_DWORD [[VAL:v[0-9]+]]
13; SI-DAG: V_ALIGNBIT_B32 [[TMP0:v[0-9]+]], [[VAL]], [[VAL]], 8
14; SI-DAG: V_ALIGNBIT_B32 [[TMP1:v[0-9]+]], [[VAL]], [[VAL]], 24
15; SI-DAG: S_MOV_B32 [[K:s[0-9]+]], 0xff00ff
16; SI: V_BFI_B32 [[RESULT:v[0-9]+]], [[K]], [[TMP1]], [[TMP0]]
17; SI: BUFFER_STORE_DWORD [[RESULT]]
18; SI: S_ENDPGM
Matt Arsenault13ccc8f2014-06-09 16:20:25 +000019define void @test_bswap_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
20 %val = load i32 addrspace(1)* %in, align 4
21 %bswap = call i32 @llvm.bswap.i32(i32 %val) nounwind readnone
22 store i32 %bswap, i32 addrspace(1)* %out, align 4
23 ret void
24}
25
Matt Arsenaulte306a322014-10-21 16:25:08 +000026; FUNC-LABEL: @test_bswap_v2i32
27; SI-DAG: V_ALIGNBIT_B32
28; SI-DAG: V_ALIGNBIT_B32
29; SI-DAG: V_BFI_B32
30; SI-DAG: V_ALIGNBIT_B32
31; SI-DAG: V_ALIGNBIT_B32
32; SI-DAG: V_BFI_B32
33; SI: S_ENDPGM
Matt Arsenault13ccc8f2014-06-09 16:20:25 +000034define void @test_bswap_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) nounwind {
35 %val = load <2 x i32> addrspace(1)* %in, align 8
36 %bswap = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %val) nounwind readnone
37 store <2 x i32> %bswap, <2 x i32> addrspace(1)* %out, align 8
38 ret void
39}
40
Matt Arsenaulte306a322014-10-21 16:25:08 +000041; FUNC-LABEL: @test_bswap_v4i32
42; SI-DAG: V_ALIGNBIT_B32
43; SI-DAG: V_ALIGNBIT_B32
44; SI-DAG: V_BFI_B32
45; SI-DAG: V_ALIGNBIT_B32
46; SI-DAG: V_ALIGNBIT_B32
47; SI-DAG: V_BFI_B32
48; SI-DAG: V_ALIGNBIT_B32
49; SI-DAG: V_ALIGNBIT_B32
50; SI-DAG: V_BFI_B32
51; SI-DAG: V_ALIGNBIT_B32
52; SI-DAG: V_ALIGNBIT_B32
53; SI-DAG: V_BFI_B32
54; SI: S_ENDPGM
Matt Arsenault13ccc8f2014-06-09 16:20:25 +000055define void @test_bswap_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) nounwind {
56 %val = load <4 x i32> addrspace(1)* %in, align 16
57 %bswap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val) nounwind readnone
58 store <4 x i32> %bswap, <4 x i32> addrspace(1)* %out, align 16
59 ret void
60}
61
Matt Arsenaulte306a322014-10-21 16:25:08 +000062; FUNC-LABEL: @test_bswap_v8i32
63; SI-DAG: V_ALIGNBIT_B32
64; SI-DAG: V_ALIGNBIT_B32
65; SI-DAG: V_BFI_B32
66; SI-DAG: V_ALIGNBIT_B32
67; SI-DAG: V_ALIGNBIT_B32
68; SI-DAG: V_BFI_B32
69; SI-DAG: V_ALIGNBIT_B32
70; SI-DAG: V_ALIGNBIT_B32
71; SI-DAG: V_BFI_B32
72; SI-DAG: V_ALIGNBIT_B32
73; SI-DAG: V_ALIGNBIT_B32
74; SI-DAG: V_BFI_B32
75; SI-DAG: V_ALIGNBIT_B32
76; SI-DAG: V_ALIGNBIT_B32
77; SI-DAG: V_BFI_B32
78; SI-DAG: V_ALIGNBIT_B32
79; SI-DAG: V_ALIGNBIT_B32
80; SI-DAG: V_BFI_B32
81; SI-DAG: V_ALIGNBIT_B32
82; SI-DAG: V_ALIGNBIT_B32
83; SI-DAG: V_BFI_B32
84; SI-DAG: V_ALIGNBIT_B32
85; SI-DAG: V_ALIGNBIT_B32
86; SI-DAG: V_BFI_B32
87; SI: S_ENDPGM
88define void @test_bswap_v8i32(<8 x i32> addrspace(1)* %out, <8 x i32> addrspace(1)* %in) nounwind {
89 %val = load <8 x i32> addrspace(1)* %in, align 32
90 %bswap = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %val) nounwind readnone
91 store <8 x i32> %bswap, <8 x i32> addrspace(1)* %out, align 32
92 ret void
93}
94
Matt Arsenault13ccc8f2014-06-09 16:20:25 +000095define void @test_bswap_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) nounwind {
96 %val = load i64 addrspace(1)* %in, align 8
97 %bswap = call i64 @llvm.bswap.i64(i64 %val) nounwind readnone
98 store i64 %bswap, i64 addrspace(1)* %out, align 8
99 ret void
100}
101
102define void @test_bswap_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) nounwind {
103 %val = load <2 x i64> addrspace(1)* %in, align 16
104 %bswap = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %val) nounwind readnone
105 store <2 x i64> %bswap, <2 x i64> addrspace(1)* %out, align 16
106 ret void
107}
108
109define void @test_bswap_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) nounwind {
110 %val = load <4 x i64> addrspace(1)* %in, align 32
111 %bswap = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %val) nounwind readnone
112 store <4 x i64> %bswap, <4 x i64> addrspace(1)* %out, align 32
113 ret void
114}