Nemanja Ivanovic | e597bd8 | 2017-05-31 05:40:25 +0000 | [diff] [blame^] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ |
| 3 | ; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ |
| 4 | ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl |
| 5 | ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ |
| 6 | ; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ |
| 7 | ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl |
| 8 | |
| 9 | ; Function Attrs: nounwind |
| 10 | define signext i32 @test(i32 signext %a, i32 signext %b, i32 signext %c) { |
| 11 | ; CHECK-LABEL: test: |
| 12 | ; CHECK: xor r7, r3, r4 |
| 13 | ; CHECK-NEXT: li r6, 55 |
| 14 | ; CHECK-NEXT: xor r5, r5, r6 |
| 15 | ; CHECK-NEXT: or r7, r7, r4 |
| 16 | ; CHECK-NEXT: cntlzw r5, r5 |
| 17 | ; CHECK-NEXT: cntlzw r6, r7 |
| 18 | ; CHECK-NEXT: srwi r6, r6, 5 |
| 19 | ; CHECK-NEXT: srwi r5, r5, 5 |
| 20 | ; CHECK-NEXT: or. r5, r6, r5 |
| 21 | ; CHECK-NEXT: bc 4, 1 |
| 22 | entry: |
| 23 | %tobool = icmp eq i32 %a, %b |
| 24 | %tobool1 = icmp eq i32 %b, 0 |
| 25 | %or.cond = and i1 %tobool, %tobool1 |
| 26 | %tobool3 = icmp eq i32 %c, 55 |
| 27 | %or.cond5 = or i1 %or.cond, %tobool3 |
| 28 | br i1 %or.cond5, label %if.end, label %if.then |
| 29 | |
| 30 | if.then: ; preds = %entry |
| 31 | %call = tail call signext i32 @foo(i32 signext %a) #2 |
| 32 | br label %return |
| 33 | |
| 34 | if.end: ; preds = %entry |
| 35 | %call4 = tail call signext i32 @bar(i32 signext %b) #2 |
| 36 | br label %return |
| 37 | |
| 38 | return: ; preds = %if.end, %if.then |
| 39 | %retval.0 = phi i32 [ %call4, %if.end ], [ %call, %if.then ] |
| 40 | ret i32 %retval.0 |
| 41 | } |
| 42 | |
| 43 | define void @neg_truncate_i32(i32 *%ptr) { |
| 44 | ; CHECK-LABEL: neg_truncate_i32: |
| 45 | ; CHECK: # BB#0: # %entry |
| 46 | ; CHECK-NEXT: lwz r3, 0(r3) |
| 47 | ; CHECK-NEXT: rldicl. r3, r3, 0, 63 |
| 48 | ; CHECK-NEXT: bclr 12, 2, 0 |
| 49 | ; CHECK-NEXT: # BB#1: # %if.end29.thread136 |
| 50 | ; CHECK-NEXT: .LBB1_2: # %if.end29 |
| 51 | entry: |
| 52 | %0 = load i32, i32* %ptr, align 4 |
| 53 | %rem17127 = and i32 %0, 1 |
| 54 | %cmp18 = icmp eq i32 %rem17127, 0 |
| 55 | br label %if.else |
| 56 | |
| 57 | if.else: ; preds = %entry |
| 58 | br i1 %cmp18, label %if.end29, label %if.end29.thread136 |
| 59 | |
| 60 | if.end29.thread136: ; preds = %if.else |
| 61 | unreachable |
| 62 | |
| 63 | if.end29: ; preds = %if.else |
| 64 | ret void |
| 65 | |
| 66 | } |
| 67 | |
| 68 | declare signext i32 @foo(i32 signext) |
| 69 | declare signext i32 @bar(i32 signext) |