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gerrit-public.fairphone.software / toolchain / llvm-project / e60814dac0839430764acca2b6739e8fe2ee173f / . / llvm / test / CodeGen / ARM / 2009-11-07-SubRegAsmPrinting.ll
blob: a8afc20bc13074e72b88f8bd30a52aec8b710806 [file] [log] [blame]
Lang Hamesc35ee8b2012-03-15 18:49:02 +0000[diff] [blame]1; RUN: llc -mcpu=cortex-a8 -mattr=-neonfp < %s | FileCheck %s
Evan Cheng6ad7da92009-11-14 02:55:43 +0000[diff] [blame]2; PR5423
3
Anton Korobeynikov9df3acf2009-11-06 23:45:15 +0000[diff] [blame]4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
5target triple = "armv7-eabi"
6
7define arm_aapcs_vfpcc void @foo() {
8entry:
9 %0 = load float* null, align 4 ; <float> [#uses=2]
10 %1 = fmul float %0, undef ; <float> [#uses=2]
11 %2 = fmul float 0.000000e+00, %1 ; <float> [#uses=2]
12 %3 = fmul float %0, %1 ; <float> [#uses=1]
13 %4 = fadd float 0.000000e+00, %3 ; <float> [#uses=1]
14 %5 = fsub float 1.000000e+00, %4 ; <float> [#uses=1]
15; CHECK: foo:
Jim Grosbachdbb41402009-11-23 21:08:25 +0000[diff] [blame]16; CHECK: vmov.f32 s{{[0-9]+}}, #1.000000e+00
Anton Korobeynikov9df3acf2009-11-06 23:45:15 +0000[diff] [blame]17 %6 = fsub float 1.000000e+00, undef ; <float> [#uses=2]
18 %7 = fsub float %2, undef ; <float> [#uses=1]
19 %8 = fsub float 0.000000e+00, undef ; <float> [#uses=3]
20 %9 = fadd float %2, undef ; <float> [#uses=3]
21 %10 = load float* undef, align 8 ; <float> [#uses=3]
22 %11 = fmul float %8, %10 ; <float> [#uses=1]
23 %12 = fadd float undef, %11 ; <float> [#uses=2]
24 %13 = fmul float undef, undef ; <float> [#uses=1]
25 %14 = fmul float %6, 0.000000e+00 ; <float> [#uses=1]
26 %15 = fadd float %13, %14 ; <float> [#uses=1]
27 %16 = fmul float %9, %10 ; <float> [#uses=1]
28 %17 = fadd float %15, %16 ; <float> [#uses=2]
29 %18 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
30 %19 = fadd float %18, 0.000000e+00 ; <float> [#uses=1]
31 %20 = fmul float undef, %10 ; <float> [#uses=1]
32 %21 = fadd float %19, %20 ; <float> [#uses=1]
33 %22 = load float* undef, align 8 ; <float> [#uses=1]
34 %23 = fmul float %5, %22 ; <float> [#uses=1]
35 %24 = fadd float %23, undef ; <float> [#uses=1]
36 %25 = load float* undef, align 8 ; <float> [#uses=2]
37 %26 = fmul float %8, %25 ; <float> [#uses=1]
38 %27 = fadd float %24, %26 ; <float> [#uses=1]
39 %28 = fmul float %9, %25 ; <float> [#uses=1]
40 %29 = fadd float undef, %28 ; <float> [#uses=1]
41 %30 = fmul float %8, undef ; <float> [#uses=1]
42 %31 = fadd float undef, %30 ; <float> [#uses=1]
43 %32 = fmul float %6, undef ; <float> [#uses=1]
44 %33 = fadd float undef, %32 ; <float> [#uses=1]
45 %34 = fmul float %9, undef ; <float> [#uses=1]
46 %35 = fadd float %33, %34 ; <float> [#uses=1]
47 %36 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
48 %37 = fmul float %7, undef ; <float> [#uses=1]
49 %38 = fadd float %36, %37 ; <float> [#uses=1]
50 %39 = fmul float undef, undef ; <float> [#uses=1]
51 %40 = fadd float %38, %39 ; <float> [#uses=1]
52 store float %12, float* undef, align 8
53 store float %17, float* undef, align 4
54 store float %21, float* undef, align 8
55 store float %27, float* undef, align 8
56 store float %29, float* undef, align 4
57 store float %31, float* undef, align 8
58 store float %40, float* undef, align 8
59 store float %12, float* null, align 8
60 %41 = fmul float %17, undef ; <float> [#uses=1]
61 %42 = fadd float %41, undef ; <float> [#uses=1]
62 %43 = fmul float %35, undef ; <float> [#uses=1]
63 %44 = fadd float %42, %43 ; <float> [#uses=1]
64 store float %44, float* null, align 4
65 unreachable
66}