| Evan Cheng | 62c7b5b | 2010-12-05 22:04:16 +0000 | [diff] [blame] | 1 | //===-- ARMHazardRecognizer.h - ARM Hazard Recognizers ----------*- C++ -*-===// | 
|  | 2 | // | 
|  | 3 | //                     The LLVM Compiler Infrastructure | 
|  | 4 | // | 
|  | 5 | // This file is distributed under the University of Illinois Open Source | 
|  | 6 | // License. See LICENSE.TXT for details. | 
|  | 7 | // | 
|  | 8 | //===----------------------------------------------------------------------===// | 
|  | 9 | // | 
|  | 10 | // This file defines hazard recognizers for scheduling ARM functions. | 
|  | 11 | // | 
|  | 12 | //===----------------------------------------------------------------------===// | 
|  | 13 |  | 
|  | 14 | #ifndef ARMHAZARDRECOGNIZER_H | 
|  | 15 | #define ARMHAZARDRECOGNIZER_H | 
|  | 16 |  | 
| Andrew Trick | 00067fb | 2010-12-08 20:04:29 +0000 | [diff] [blame] | 17 | #include "llvm/CodeGen/ScoreboardHazardRecognizer.h" | 
| Evan Cheng | 62c7b5b | 2010-12-05 22:04:16 +0000 | [diff] [blame] | 18 |  | 
|  | 19 | namespace llvm { | 
|  | 20 |  | 
|  | 21 | class ARMBaseInstrInfo; | 
|  | 22 | class ARMBaseRegisterInfo; | 
|  | 23 | class ARMSubtarget; | 
|  | 24 | class MachineInstr; | 
|  | 25 |  | 
| Andrew Trick | 00067fb | 2010-12-08 20:04:29 +0000 | [diff] [blame] | 26 | class ARMHazardRecognizer : public ScoreboardHazardRecognizer { | 
| Evan Cheng | 62c7b5b | 2010-12-05 22:04:16 +0000 | [diff] [blame] | 27 | const ARMBaseInstrInfo &TII; | 
|  | 28 | const ARMBaseRegisterInfo &TRI; | 
|  | 29 | const ARMSubtarget &STI; | 
|  | 30 |  | 
|  | 31 | MachineInstr *LastMI; | 
| Andrew Trick | 10ffc2b | 2010-12-24 05:03:26 +0000 | [diff] [blame] | 32 | unsigned FpMLxStalls; | 
| Evan Cheng | 62c7b5b | 2010-12-05 22:04:16 +0000 | [diff] [blame] | 33 | unsigned ITBlockSize;  // No. of MIs in current IT block yet to be scheduled. | 
|  | 34 | MachineInstr *ITBlockMIs[4]; | 
|  | 35 |  | 
|  | 36 | public: | 
|  | 37 | ARMHazardRecognizer(const InstrItineraryData *ItinData, | 
|  | 38 | const ARMBaseInstrInfo &tii, | 
|  | 39 | const ARMBaseRegisterInfo &tri, | 
| Andrew Trick | 10ffc2b | 2010-12-24 05:03:26 +0000 | [diff] [blame] | 40 | const ARMSubtarget &sti, | 
|  | 41 | const ScheduleDAG *DAG) : | 
|  | 42 | ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), TII(tii), | 
|  | 43 | TRI(tri), STI(sti), LastMI(0), ITBlockSize(0) {} | 
| Evan Cheng | 62c7b5b | 2010-12-05 22:04:16 +0000 | [diff] [blame] | 44 |  | 
| Andrew Trick | 10ffc2b | 2010-12-24 05:03:26 +0000 | [diff] [blame] | 45 | virtual HazardType getHazardType(SUnit *SU, int Stalls); | 
| Evan Cheng | 62c7b5b | 2010-12-05 22:04:16 +0000 | [diff] [blame] | 46 | virtual void Reset(); | 
|  | 47 | virtual void EmitInstruction(SUnit *SU); | 
|  | 48 | virtual void AdvanceCycle(); | 
| Andrew Trick | 00067fb | 2010-12-08 20:04:29 +0000 | [diff] [blame] | 49 | virtual void RecedeCycle(); | 
| Evan Cheng | 62c7b5b | 2010-12-05 22:04:16 +0000 | [diff] [blame] | 50 | }; | 
|  | 51 |  | 
| Evan Cheng | 62c7b5b | 2010-12-05 22:04:16 +0000 | [diff] [blame] | 52 | } // end namespace llvm | 
|  | 53 |  | 
|  | 54 | #endif // ARMHAZARDRECOGNIZER_H |