Erich Keane | ebba592 | 2017-07-21 22:37:03 +0000 | [diff] [blame] | 1 | //===--- Nios2.h - Declare Nios2 target feature support ---------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file declares Nios2 TargetInfo objects. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_NIOS2_H |
| 15 | #define LLVM_CLANG_LIB_BASIC_TARGETS_NIOS2_H |
| 16 | |
| 17 | #include "clang/Basic/TargetInfo.h" |
| 18 | #include "clang/Basic/TargetOptions.h" |
| 19 | #include "llvm/ADT/Triple.h" |
| 20 | #include "llvm/Support/Compiler.h" |
| 21 | |
| 22 | namespace clang { |
| 23 | namespace targets { |
| 24 | |
| 25 | class LLVM_LIBRARY_VISIBILITY Nios2TargetInfo : public TargetInfo { |
| 26 | void setDataLayout() { |
| 27 | if (BigEndian) |
| 28 | resetDataLayout("E-p:32:32:32-i8:8:32-i16:16:32-n32"); |
| 29 | else |
| 30 | resetDataLayout("e-p:32:32:32-i8:8:32-i16:16:32-n32"); |
| 31 | } |
| 32 | |
| 33 | static const Builtin::Info BuiltinInfo[]; |
| 34 | std::string CPU; |
| 35 | std::string ABI; |
| 36 | |
| 37 | public: |
| 38 | Nios2TargetInfo(const llvm::Triple &triple, const TargetOptions &opts) |
| 39 | : TargetInfo(triple), CPU(opts.CPU), ABI(opts.ABI) { |
| 40 | SizeType = UnsignedInt; |
| 41 | PtrDiffType = SignedInt; |
| 42 | MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32; |
| 43 | setDataLayout(); |
| 44 | } |
| 45 | |
| 46 | StringRef getABI() const override { return ABI; } |
| 47 | bool setABI(const std::string &Name) override { |
| 48 | if (Name == "o32" || Name == "eabi") { |
| 49 | ABI = Name; |
| 50 | return true; |
| 51 | } |
| 52 | return false; |
| 53 | } |
| 54 | |
| 55 | bool isValidCPUName(StringRef Name) const override { |
| 56 | return Name == "nios2r1" || Name == "nios2r2"; |
| 57 | } |
| 58 | |
| 59 | bool setCPU(const std::string &Name) override { |
| 60 | if (isValidCPUName(Name)) { |
| 61 | CPU = Name; |
| 62 | return true; |
| 63 | } |
| 64 | return false; |
| 65 | } |
| 66 | |
| 67 | void getTargetDefines(const LangOptions &Opts, |
| 68 | MacroBuilder &Builder) const override; |
| 69 | |
| 70 | ArrayRef<Builtin::Info> getTargetBuiltins() const override; |
| 71 | |
| 72 | bool isFeatureSupportedByCPU(StringRef Feature, StringRef CPU) const; |
| 73 | |
| 74 | bool |
| 75 | initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, |
| 76 | StringRef CPU, |
| 77 | const std::vector<std::string> &FeatureVec) const override { |
| 78 | static const char *allFeatures[] = {"nios2r2mandatory", "nios2r2bmx", |
| 79 | "nios2r2mpx", "nios2r2cdx" |
| 80 | }; |
| 81 | for (const char *feature : allFeatures) { |
| 82 | Features[feature] = isFeatureSupportedByCPU(feature, CPU); |
| 83 | } |
| 84 | return true; |
| 85 | } |
| 86 | |
| 87 | bool hasFeature(StringRef Feature) const override { |
| 88 | return isFeatureSupportedByCPU(Feature, CPU); |
| 89 | } |
| 90 | |
| 91 | BuiltinVaListKind getBuiltinVaListKind() const override { |
| 92 | return TargetInfo::VoidPtrBuiltinVaList; |
| 93 | } |
| 94 | |
| 95 | ArrayRef<const char *> getGCCRegNames() const override { |
| 96 | static const char *const GCCRegNames[] = { |
| 97 | // CPU register names |
| 98 | // Must match second column of GCCRegAliases |
| 99 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", |
| 100 | "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", |
| 101 | "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", |
| 102 | "r31", |
| 103 | // Floating point register names |
| 104 | "ctl0", "ctl1", "ctl2", "ctl3", "ctl4", "ctl5", "ctl6", "ctl7", "ctl8", |
| 105 | "ctl9", "ctl10", "ctl11", "ctl12", "ctl13", "ctl14", "ctl15" |
| 106 | }; |
| 107 | return llvm::makeArrayRef(GCCRegNames); |
| 108 | } |
| 109 | |
| 110 | bool validateAsmConstraint(const char *&Name, |
| 111 | TargetInfo::ConstraintInfo &Info) const override { |
| 112 | switch (*Name) { |
| 113 | default: |
| 114 | return false; |
| 115 | |
| 116 | case 'r': // CPU registers. |
| 117 | case 'd': // Equivalent to "r" unless generating MIPS16 code. |
| 118 | case 'y': // Equivalent to "r", backwards compatibility only. |
| 119 | case 'f': // floating-point registers. |
| 120 | case 'c': // $25 for indirect jumps |
| 121 | case 'l': // lo register |
| 122 | case 'x': // hilo register pair |
| 123 | Info.setAllowsRegister(); |
| 124 | return true; |
| 125 | } |
| 126 | } |
| 127 | |
| 128 | const char *getClobbers() const override { return ""; } |
| 129 | |
| 130 | ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override { |
| 131 | static const TargetInfo::GCCRegAlias aliases[] = { |
| 132 | {{"zero"}, "r0"}, {{"at"}, "r1"}, {{"et"}, "r24"}, |
| 133 | {{"bt"}, "r25"}, {{"gp"}, "r26"}, {{"sp"}, "r27"}, |
| 134 | {{"fp"}, "r28"}, {{"ea"}, "r29"}, {{"ba"}, "r30"}, |
| 135 | {{"ra"}, "r31"}, {{"status"}, "ctl0"}, {{"estatus"}, "ctl1"}, |
| 136 | {{"bstatus"}, "ctl2"}, {{"ienable"}, "ctl3"}, {{"ipending"}, "ctl4"}, |
| 137 | {{"cpuid"}, "ctl5"}, {{"exception"}, "ctl7"}, {{"pteaddr"}, "ctl8"}, |
| 138 | {{"tlbacc"}, "ctl9"}, {{"tlbmisc"}, "ctl10"}, {{"badaddr"}, "ctl12"}, |
| 139 | {{"config"}, "ctl13"}, {{"mpubase"}, "ctl14"}, {{"mpuacc"}, "ctl15"}, |
| 140 | }; |
| 141 | return llvm::makeArrayRef(aliases); |
| 142 | } |
| 143 | }; |
| 144 | |
| 145 | } // namespace targets |
| 146 | } // namespace clang |
| 147 | #endif // LLVM_CLANG_LIB_BASIC_TARGETS_NIOS2_H |