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Tom Stellardca166212017-01-30 21:56:46 +00001//===- AMDGPUInstructionSelector --------------------------------*- C++ -*-==//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file declares the targeting of the InstructionSelector class for
11/// AMDGPU.
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRUCTIONSELECTOR_H
15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRUCTIONSELECTOR_H
16
Yaxun Liu1a14bfa2017-03-27 14:04:01 +000017#include "AMDGPU.h"
Tom Stellardca166212017-01-30 21:56:46 +000018#include "llvm/ADT/ArrayRef.h"
19#include "llvm/ADT/SmallVector.h"
Chandler Carruth6bda14b2017-06-06 11:49:48 +000020#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
Tom Stellardca166212017-01-30 21:56:46 +000021
22namespace llvm {
23
24class AMDGPUInstrInfo;
25class AMDGPURegisterBankInfo;
26class MachineInstr;
27class MachineOperand;
28class MachineRegisterInfo;
29class SIInstrInfo;
30class SIRegisterInfo;
31class SISubtarget;
32
33class AMDGPUInstructionSelector : public InstructionSelector {
34public:
35 AMDGPUInstructionSelector(const SISubtarget &STI,
36 const AMDGPURegisterBankInfo &RBI);
37
Daniel Sandersf76f3152017-11-16 00:46:35 +000038 bool select(MachineInstr &I, CodeGenCoverage &CoverageInfo) const override;
39
Tom Stellardca166212017-01-30 21:56:46 +000040private:
41 struct GEPInfo {
42 const MachineInstr &GEP;
43 SmallVector<unsigned, 2> SgprParts;
44 SmallVector<unsigned, 2> VgprParts;
45 int64_t Imm;
46 GEPInfo(const MachineInstr &GEP) : GEP(GEP), Imm(0) { }
47 };
48
49 MachineOperand getSubOperand64(MachineOperand &MO, unsigned SubIdx) const;
50 bool selectG_CONSTANT(MachineInstr &I) const;
51 bool selectG_ADD(MachineInstr &I) const;
52 bool selectG_GEP(MachineInstr &I) const;
53 bool hasVgprParts(ArrayRef<GEPInfo> AddrInfo) const;
54 void getAddrModeInfo(const MachineInstr &Load, const MachineRegisterInfo &MRI,
55 SmallVectorImpl<GEPInfo> &AddrInfo) const;
56 bool selectSMRD(MachineInstr &I, ArrayRef<GEPInfo> AddrInfo) const;
57 bool selectG_LOAD(MachineInstr &I) const;
58 bool selectG_STORE(MachineInstr &I) const;
59
60 const SIInstrInfo &TII;
61 const SIRegisterInfo &TRI;
62 const AMDGPURegisterBankInfo &RBI;
Yaxun Liu1a14bfa2017-03-27 14:04:01 +000063protected:
64 AMDGPUAS AMDGPUASI;
Tom Stellardca166212017-01-30 21:56:46 +000065};
66
67} // End llvm namespace.
68#endif