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gerrit-public.fairphone.software / toolchain / llvm-project / e93c63d468d36e67cb15d183ecc6b8216c87c138 / . / llvm / test / Analysis / MemorySSA / cyclicphi.ll
blob: 6e91db959e4cea42953975f733a596c860e7fcf6 [file] [log] [blame]
Chad Rosier232e29e2016-07-06 21:20:47 +0000[diff] [blame]1; RUN: opt -basicaa -print-memoryssa -verify-memoryssa -analyze < %s 2>&1 | FileCheck %s
Geoff Berryb96d3b22016-06-01 21:30:40 +0000[diff] [blame]2; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -disable-output < %s 2>&1 | FileCheck %s
George Burgess IVe1100f52016-02-02 22:46:49 +0000[diff] [blame]3
4%struct.hoge = type { i32, %struct.widget }
5%struct.widget = type { i64 }
6
7define hidden void @quux(%struct.hoge *%f) align 2 {
8 %tmp = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1, i32 0
9 %tmp24 = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1
10 %tmp25 = bitcast %struct.widget* %tmp24 to i64**
11 br label %bb26
12
13bb26: ; preds = %bb77, %0
Mandeep Singh Grang73f00952016-11-21 19:33:02 +0000[diff] [blame]14; CHECK: 2 = MemoryPhi({%0,liveOnEntry},{bb77,3})
George Burgess IVe1100f52016-02-02 22:46:49 +0000[diff] [blame]15; CHECK-NEXT: br i1 undef, label %bb68, label %bb77
16 br i1 undef, label %bb68, label %bb77
17
18bb68: ; preds = %bb26
19; CHECK: MemoryUse(liveOnEntry)
20; CHECK-NEXT: %tmp69 = load i64, i64* null, align 8
21 %tmp69 = load i64, i64* null, align 8
Mandeep Singh Grang73f00952016-11-21 19:33:02 +0000[diff] [blame]22; CHECK: 1 = MemoryDef(2)
George Burgess IVe1100f52016-02-02 22:46:49 +0000[diff] [blame]23; CHECK-NEXT: store i64 %tmp69, i64* %tmp, align 8
24 store i64 %tmp69, i64* %tmp, align 8
25 br label %bb77
26
27bb77: ; preds = %bb68, %bb26
Mandeep Singh Grang73f00952016-11-21 19:33:02 +0000[diff] [blame]28; CHECK: 3 = MemoryPhi({bb26,2},{bb68,1})
29; CHECK: MemoryUse(3)
George Burgess IVe1100f52016-02-02 22:46:49 +0000[diff] [blame]30; CHECK-NEXT: %tmp78 = load i64*, i64** %tmp25, align 8
31 %tmp78 = load i64*, i64** %tmp25, align 8
32 %tmp79 = getelementptr inbounds i64, i64* %tmp78, i64 undef
33 br label %bb26
34}
George Burgess IV0e489862016-03-23 18:31:55 +0000[diff] [blame]35
36; CHECK-LABEL: define void @quux_skip
37define void @quux_skip(%struct.hoge* noalias %f, i64* noalias %g) align 2 {
38 %tmp = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1, i32 0
39 %tmp24 = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1
40 %tmp25 = bitcast %struct.widget* %tmp24 to i64**
41 br label %bb26
42
43bb26: ; preds = %bb77, %0
Mandeep Singh Grang73f00952016-11-21 19:33:02 +0000[diff] [blame]44; CHECK: 2 = MemoryPhi({%0,liveOnEntry},{bb77,3})
George Burgess IV0e489862016-03-23 18:31:55 +0000[diff] [blame]45; CHECK-NEXT: br i1 undef, label %bb68, label %bb77
46 br i1 undef, label %bb68, label %bb77
47
48bb68: ; preds = %bb26
Mandeep Singh Grang73f00952016-11-21 19:33:02 +0000[diff] [blame]49; CHECK: MemoryUse(2)
George Burgess IV0e489862016-03-23 18:31:55 +0000[diff] [blame]50; CHECK-NEXT: %tmp69 = load i64, i64* %g, align 8
51 %tmp69 = load i64, i64* %g, align 8
Mandeep Singh Grang73f00952016-11-21 19:33:02 +0000[diff] [blame]52; CHECK: 1 = MemoryDef(2)
George Burgess IV0e489862016-03-23 18:31:55 +0000[diff] [blame]53; CHECK-NEXT: store i64 %tmp69, i64* %g, align 8
54 store i64 %tmp69, i64* %g, align 8
55 br label %bb77
56
57bb77: ; preds = %bb68, %bb26
Mandeep Singh Grang73f00952016-11-21 19:33:02 +0000[diff] [blame]58; CHECK: 3 = MemoryPhi({bb26,2},{bb68,1})
George Burgess IV5f308972016-07-19 01:29:15 +0000[diff] [blame]59; CHECK: MemoryUse(liveOnEntry)
George Burgess IV0e489862016-03-23 18:31:55 +0000[diff] [blame]60; CHECK-NEXT: %tmp78 = load i64*, i64** %tmp25, align 8
61 %tmp78 = load i64*, i64** %tmp25, align 8
62 br label %bb26
63}
64
65; CHECK-LABEL: define void @quux_dominated
66define void @quux_dominated(%struct.hoge* noalias %f, i64* noalias %g) align 2 {
67 %tmp = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1, i32 0
68 %tmp24 = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1
69 %tmp25 = bitcast %struct.widget* %tmp24 to i64**
70 br label %bb26
71
72bb26: ; preds = %bb77, %0
George Burgess IV0e489862016-03-23 18:31:55 +0000[diff] [blame]73; CHECK: 3 = MemoryPhi({%0,liveOnEntry},{bb77,2})
Mandeep Singh Grang73f00952016-11-21 19:33:02 +0000[diff] [blame]74; CHECK: MemoryUse(3)
George Burgess IV0e489862016-03-23 18:31:55 +0000[diff] [blame]75; CHECK-NEXT: load i64*, i64** %tmp25, align 8
76 load i64*, i64** %tmp25, align 8
77 br i1 undef, label %bb68, label %bb77
78
79bb68: ; preds = %bb26
80; CHECK: MemoryUse(3)
81; CHECK-NEXT: %tmp69 = load i64, i64* %g, align 8
82 %tmp69 = load i64, i64* %g, align 8
83; CHECK: 1 = MemoryDef(3)
84; CHECK-NEXT: store i64 %tmp69, i64* %g, align 8
85 store i64 %tmp69, i64* %g, align 8
86 br label %bb77
87
88bb77: ; preds = %bb68, %bb26
Mandeep Singh Grang73f00952016-11-21 19:33:02 +0000[diff] [blame]89; CHECK: 4 = MemoryPhi({bb26,3},{bb68,1})
90; CHECK: 2 = MemoryDef(4)
91; CHECK-NEXT: store i64* null, i64** %tmp25, align 8
92 store i64* null, i64** %tmp25, align 8
93 br label %bb26
94}
95
96; CHECK-LABEL: define void @quux_nodominate
97define void @quux_nodominate(%struct.hoge* noalias %f, i64* noalias %g) align 2 {
98 %tmp = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1, i32 0
99 %tmp24 = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1
100 %tmp25 = bitcast %struct.widget* %tmp24 to i64**
101 br label %bb26
102
103bb26: ; preds = %bb77, %0
104; CHECK: 2 = MemoryPhi({%0,liveOnEntry},{bb77,3})
105; CHECK: MemoryUse(liveOnEntry)
106; CHECK-NEXT: load i64*, i64** %tmp25, align 8
107 load i64*, i64** %tmp25, align 8
108 br i1 undef, label %bb68, label %bb77
109
110bb68: ; preds = %bb26
111; CHECK: MemoryUse(2)
112; CHECK-NEXT: %tmp69 = load i64, i64* %g, align 8
113 %tmp69 = load i64, i64* %g, align 8
114; CHECK: 1 = MemoryDef(2)
115; CHECK-NEXT: store i64 %tmp69, i64* %g, align 8
116 store i64 %tmp69, i64* %g, align 8
117 br label %bb77
118
119bb77: ; preds = %bb68, %bb26
120; CHECK: 3 = MemoryPhi({bb26,2},{bb68,1})
George Burgess IV0e489862016-03-23 18:31:55 +0000[diff] [blame]121; CHECK-NEXT: br label %bb26
122 br label %bb26
123}