Matt Arsenault | 9e91014 | 2016-12-20 19:06:12 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s |
| 2 | ; RUN: not llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=SICI %s |
| 3 | ; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=SICI %s |
| 4 | |
| 5 | ; GCN-LABEL: {{^}}s_input_output_i16: |
| 6 | ; SICI: error: couldn't allocate output register for constraint 's' |
| 7 | ; SICI: error: couldn't allocate input reg for constraint 's' |
Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 8 | define amdgpu_kernel void @s_input_output_i16() #0 { |
Matt Arsenault | 9e91014 | 2016-12-20 19:06:12 +0000 | [diff] [blame] | 9 | %v = tail call i16 asm sideeffect "s_mov_b32 $0, -1", "=s"() |
| 10 | tail call void asm sideeffect "; use $0", "s"(i16 %v) #0 |
| 11 | ret void |
| 12 | } |
| 13 | |
| 14 | ; GCN-LABEL: {{^}}v_input_output_i16: |
| 15 | ; SICI: error: couldn't allocate output register for constraint 'v' |
| 16 | ; SICI: error: couldn't allocate input reg for constraint 'v' |
Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 17 | define amdgpu_kernel void @v_input_output_i16() #0 { |
Matt Arsenault | 9e91014 | 2016-12-20 19:06:12 +0000 | [diff] [blame] | 18 | %v = tail call i16 asm sideeffect "v_mov_b32 $0, -1", "=v"() #0 |
| 19 | tail call void asm sideeffect "; use $0", "v"(i16 %v) |
| 20 | ret void |
| 21 | } |
| 22 | |
| 23 | ; GCN-LABEL: {{^}}s_input_output_f16: |
| 24 | ; SICI: error: couldn't allocate output register for constraint 's' |
| 25 | ; SICI: error: couldn't allocate input reg for constraint 's' |
Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 26 | define amdgpu_kernel void @s_input_output_f16() #0 { |
Matt Arsenault | 9e91014 | 2016-12-20 19:06:12 +0000 | [diff] [blame] | 27 | %v = tail call half asm sideeffect "s_mov_b32 $0, -1", "=s"() #0 |
| 28 | tail call void asm sideeffect "; use $0", "s"(half %v) |
| 29 | ret void |
| 30 | } |
| 31 | |
| 32 | ; GCN-LABEL: {{^}}v_input_output_f16: |
| 33 | ; SICI: error: couldn't allocate output register for constraint 'v' |
| 34 | ; SICI: error: couldn't allocate input reg for constraint 'v' |
Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 35 | define amdgpu_kernel void @v_input_output_f16() #0 { |
Matt Arsenault | 9e91014 | 2016-12-20 19:06:12 +0000 | [diff] [blame] | 36 | %v = tail call half asm sideeffect "v_mov_b32 $0, -1", "=v"() #0 |
| 37 | tail call void asm sideeffect "; use $0", "v"(half %v) |
| 38 | ret void |
| 39 | } |
| 40 | |
| 41 | attributes #0 = { nounwind } |