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gerrit-public.fairphone.software / toolchain / llvm-project / e93c63d468d36e67cb15d183ecc6b8216c87c138 / . / llvm / test / CodeGen / ARM / atomic-load-store.ll
blob: 5db81781a7f71a84de2b057c15e6985b903749d6 [file] [log] [blame]
Eli Friedmane978d2f2011-09-07 02:23:42 +0000[diff] [blame]1; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=ARM
Eli Friedmanf3dd6da2011-09-02 22:33:24 +0000[diff] [blame]2; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=ARM
Joey Goulye1de9e92013-08-22 12:19:24 +0000[diff] [blame]3; RUN: llc < %s -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=THUMBTWO
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]4; RUN: llc < %s -mtriple=thumbv6-apple-ios | FileCheck %s -check-prefix=THUMBONE
Benjamin Kramerc10563d2014-01-11 21:06:00 +0000[diff] [blame]5; RUN: llc < %s -mtriple=armv4-apple-ios | FileCheck %s -check-prefix=ARMV4
Robin Morisset5349e8e2014-09-18 18:56:04 +0000[diff] [blame]6; RUN: llc < %s -mtriple=armv6-apple-ios | FileCheck %s -check-prefix=ARMV6
7; RUN: llc < %s -mtriple=thumbv7m-apple-ios | FileCheck %s -check-prefix=THUMBM
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]8
9define void @test1(i32* %ptr, i32 %val1) {
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]10; ARM-LABEL: test1
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]11; ARM: dmb {{ish$}}
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]12; ARM-NEXT: str
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]13; ARM-NEXT: dmb {{ish$}}
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]14; THUMBONE-LABEL: test1
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]15; THUMBONE: __sync_lock_test_and_set_4
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]16; THUMBTWO-LABEL: test1
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]17; THUMBTWO: dmb {{ish$}}
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]18; THUMBTWO-NEXT: str
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]19; THUMBTWO-NEXT: dmb {{ish$}}
Robin Morisset5349e8e2014-09-18 18:56:04 +0000[diff] [blame]20; ARMV6-LABEL: test1
21; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
22; ARMV6: str
23; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
24; THUMBM-LABEL: test1
25; THUMBM: dmb sy
26; THUMBM: str
27; THUMBM: dmb sy
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]28 store atomic i32 %val1, i32* %ptr seq_cst, align 4
29 ret void
30}
31
32define i32 @test2(i32* %ptr) {
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]33; ARM-LABEL: test2
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]34; ARM: ldr
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]35; ARM-NEXT: dmb {{ish$}}
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]36; THUMBONE-LABEL: test2
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]37; THUMBONE: __sync_val_compare_and_swap_4
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]38; THUMBTWO-LABEL: test2
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]39; THUMBTWO: ldr
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]40; THUMBTWO-NEXT: dmb {{ish$}}
Robin Morisset5349e8e2014-09-18 18:56:04 +0000[diff] [blame]41; ARMV6-LABEL: test2
42; ARMV6: ldr
43; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
44; THUMBM-LABEL: test2
45; THUMBM: ldr
46; THUMBM: dmb sy
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]47 %val = load atomic i32, i32* %ptr seq_cst, align 4
Eli Friedman452aae62011-08-26 02:59:24 +0000[diff] [blame]48 ret i32 %val
49}
Eli Friedmanee8f14a72011-09-15 21:20:49 +0000[diff] [blame]50
51define void @test3(i8* %ptr1, i8* %ptr2) {
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]52; ARM-LABEL: test3
53; ARM-NOT: dmb
Eli Friedmanee8f14a72011-09-15 21:20:49 +0000[diff] [blame]54; ARM: ldrb
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]55; ARM-NOT: dmb
Eli Friedmanee8f14a72011-09-15 21:20:49 +0000[diff] [blame]56; ARM: strb
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]57; ARM-NOT: dmb
58; ARM: bx lr
59
60; THUMBTWO-LABEL: test3
61; THUMBTWO-NOT: dmb
Eli Friedmaneb1bd242011-09-19 22:02:33 +0000[diff] [blame]62; THUMBTWO: ldrb
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]63; THUMBTWO-NOT: dmb
Eli Friedmaneb1bd242011-09-19 22:02:33 +0000[diff] [blame]64; THUMBTWO: strb
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]65; THUMBTWO-NOT: dmb
66; THUMBTWO: bx lr
67
68; THUMBONE-LABEL: test3
69; THUMBONE-NOT: dmb
Eli Friedmaneb1bd242011-09-19 22:02:33 +0000[diff] [blame]70; THUMBONE: ldrb
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]71; THUMBONE-NOT: dmb
Eli Friedmaneb1bd242011-09-19 22:02:33 +0000[diff] [blame]72; THUMBONE: strb
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]73; THUMBONE-NOT: dmb
Robin Morisset5349e8e2014-09-18 18:56:04 +0000[diff] [blame]74
75; ARMV6-LABEL: test3
76; ARMV6-NOT: mcr
77; THUMBM-LABEL: test3
78; THUMBM-NOT: dmb sy
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]79 %val = load atomic i8, i8* %ptr1 unordered, align 1
Eli Friedmanee8f14a72011-09-15 21:20:49 +0000[diff] [blame]80 store atomic i8 %val, i8* %ptr2 unordered, align 1
81 ret void
82}
Eli Friedmaneb1bd242011-09-19 22:02:33 +0000[diff] [blame]83
84define void @test4(i8* %ptr1, i8* %ptr2) {
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]85; THUMBONE-LABEL: test4
Eli Friedmaneb1bd242011-09-19 22:02:33 +0000[diff] [blame]86; THUMBONE: ___sync_val_compare_and_swap_1
87; THUMBONE: ___sync_lock_test_and_set_1
Robin Morisset5349e8e2014-09-18 18:56:04 +0000[diff] [blame]88; ARMV6-LABEL: test4
89; THUMBM-LABEL: test4
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]90 %val = load atomic i8, i8* %ptr1 seq_cst, align 1
Eli Friedmaneb1bd242011-09-19 22:02:33 +0000[diff] [blame]91 store atomic i8 %val, i8* %ptr2 seq_cst, align 1
92 ret void
93}
Lang Hamesc22e39d2013-06-28 18:36:42 +0000[diff] [blame]94
95define i64 @test_old_load_64bit(i64* %p) {
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]96; ARMV4-LABEL: test_old_load_64bit
Lang Hamesc22e39d2013-06-28 18:36:42 +0000[diff] [blame]97; ARMV4: ___sync_val_compare_and_swap_8
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]98 %1 = load atomic i64, i64* %p seq_cst, align 8
Lang Hamesc22e39d2013-06-28 18:36:42 +0000[diff] [blame]99 ret i64 %1
100}
101
102define void @test_old_store_64bit(i64* %p, i64 %v) {
Tim Northoverd622e122014-05-30 14:41:51 +0000[diff] [blame]103; ARMV4-LABEL: test_old_store_64bit
Lang Hamesc22e39d2013-06-28 18:36:42 +0000[diff] [blame]104; ARMV4: ___sync_lock_test_and_set_8
105 store atomic i64 %v, i64* %p seq_cst, align 8
106 ret void
107}