| Simon Dardis | fd8c65e | 2017-12-18 15:56:40 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -verify-machineinstrs -march=mipsel -mcpu=mips32 \ |
| 2 | ; RUN: | FileCheck %s -check-prefix=32 |
| 3 | ; RUN: llc < %s -verify-machineinstrs -march=mipsel -mcpu=mips32r2 \ |
| 4 | ; RUN: | FileCheck %s -check-prefix=32R2 |
| 5 | ; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips4 -target-abi=n64 \ |
| 6 | ; RUN: | FileCheck %s -check-prefix=64 |
| 7 | ; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips64 -target-abi=n64 \ |
| 8 | ; RUN: | FileCheck %s -check-prefix=64 |
| 9 | ; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips64r2 -target-abi=n64 \ |
| 10 | ; RUN: | FileCheck %s -check-prefix=64R2 |
| Akira Hatanaka | 44eba3a | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 11 | |
| 12 | define double @func0(double %d0, double %d1) nounwind readnone { |
| 13 | entry: |
| Akira Hatanaka | 44eba3a | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 14 | ; |
| Akira Hatanaka | 4f5c842 | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 15 | ; 32: lui $[[MSK1:[0-9]+]], 32768 |
| 16 | ; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]] |
| 17 | ; 32: lui $[[T0:[0-9]+]], 32767 |
| 18 | ; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 |
| 19 | ; 32: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] |
| 20 | ; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] |
| 21 | ; 32: mtc1 $[[OR]], $f1 |
| Akira Hatanaka | c5b5a8d | 2011-12-07 21:48:50 +0000 | [diff] [blame] | 22 | |
| Akira Hatanaka | 4f5c842 | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 23 | ; 32R2: ext $[[EXT:[0-9]+]], ${{[0-9]+}}, 31, 1 |
| 24 | ; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1 |
| Daniel Sanders | 1f6f0f4 | 2014-06-12 11:55:58 +0000 | [diff] [blame] | 25 | ; 32R2: mthc1 $[[INS]], $f0 |
| Akira Hatanaka | 4f5c842 | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 26 | |
| 27 | ; 64: daddiu $[[T0:[0-9]+]], $zero, 1 |
| 28 | ; 64: dsll $[[MSK1:[0-9]+]], $[[T0]], 63 |
| 29 | ; 64: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]] |
| 30 | ; 64: daddiu $[[MSK0:[0-9]+]], $[[MSK1]], -1 |
| 31 | ; 64: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] |
| 32 | ; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] |
| 33 | ; 64: dmtc1 $[[OR]], $f0 |
| 34 | |
| Daniel Sanders | 611eb82 | 2016-02-29 15:26:54 +0000 | [diff] [blame] | 35 | ; 64R2: dextu $[[EXT:[0-9]+]], ${{[0-9]+}}, 63, 1 |
| Simon Dardis | 28365b3 | 2017-09-14 10:58:00 +0000 | [diff] [blame] | 36 | ; 64R2: dinsu $[[INS:[0-9]+]], $[[EXT]], 63, 1 |
| 37 | ; 64R2: dmtc1 $[[INS]], $f0 |
| Akira Hatanaka | 4f5c842 | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 38 | |
| Akira Hatanaka | 44eba3a | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 39 | %call = tail call double @copysign(double %d0, double %d1) nounwind readnone |
| 40 | ret double %call |
| 41 | } |
| 42 | |
| 43 | declare double @copysign(double, double) nounwind readnone |
| 44 | |
| 45 | define float @func1(float %f0, float %f1) nounwind readnone { |
| 46 | entry: |
| Akira Hatanaka | 4f5c842 | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 47 | |
| 48 | ; 32: lui $[[MSK1:[0-9]+]], 32768 |
| 49 | ; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]] |
| 50 | ; 32: lui $[[T0:[0-9]+]], 32767 |
| 51 | ; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 |
| 52 | ; 32: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] |
| 53 | ; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] |
| 54 | ; 32: mtc1 $[[OR]], $f0 |
| 55 | |
| 56 | ; 32R2: ext $[[EXT:[0-9]+]], ${{[0-9]+}}, 31, 1 |
| 57 | ; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1 |
| 58 | ; 32R2: mtc1 $[[INS]], $f0 |
| 59 | |
| Akira Hatanaka | 44eba3a | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 60 | %call = tail call float @copysignf(float %f0, float %f1) nounwind readnone |
| 61 | ret float %call |
| 62 | } |
| 63 | |
| 64 | declare float @copysignf(float, float) nounwind readnone |
| Akira Hatanaka | 4f5c842 | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 65 | |