blob: d7c66c27b6e22f174cedcb205bed890c57325c4f [file] [log] [blame]
Jozef Kolek2f27d572014-12-18 16:39:29 +00001; RUN: llc -march=mipsel -filetype=obj --disable-machine-licm -mattr=micromips < %s -o - \
Daniel Sanders1d148642016-06-16 09:17:03 +00002; RUN: | llvm-objdump -no-show-raw-insn -d - | FileCheck %s -check-prefix=MICROMIPS
Jozef Kolek2f27d572014-12-18 16:39:29 +00003
4; Use llvm-objdump to check wheter the encodings of microMIPS atomic instructions are correct.
5; While emitting assembly files directly when in microMIPS mode, it is possible to emit a mips32r2
6; instruction instead of microMIPS instruction, and since many mips32r2 and microMIPS
7; instructions have identical assembly formats, invalid instruction cannot be detected.
8
9@y = common global i8 0, align 1
10
11define signext i8 @AtomicLoadAdd8(i8 signext %incr) nounwind {
12entry:
13 %0 = atomicrmw add i8* @y, i8 %incr monotonic
14 ret i8 %0
15
16; MICROMIPS: ll ${{[0-9]+}}, 0(${{[0-9]+}})
17; MICROMIPS: sc ${{[0-9]+}}, 0(${{[0-9]+}})
18}
19
20define signext i8 @AtomicCmpSwap8(i8 signext %oldval, i8 signext %newval) nounwind {
21entry:
22 %pair0 = cmpxchg i8* @y, i8 %oldval, i8 %newval monotonic monotonic
23 %0 = extractvalue { i8, i1 } %pair0, 0
24 ret i8 %0
25
26; MICROMIPS: ll ${{[0-9]+}}, 0(${{[0-9]+}})
27; MICROMIPS: sc ${{[0-9]+}}, 0(${{[0-9]+}})
28}