blob: fc676cc0885f0cde30923eead20c42f27bf98ee5 [file] [log] [blame]
Nemanja Ivanovicd2c3c512016-09-23 13:25:31 +00001; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s \
3; RUN: --check-prefix=CHECK-BE
4
5@Globi = external global i32, align 4
6@Globf = external global float, align 4
7
8define <2 x i64> @test1(i64 %a, i64 %b) {
9entry:
Nemanja Ivanovic11049f82016-10-04 06:59:23 +000010; The FIXME below is due to the lowering for BUILD_VECTOR needing a re-vamp
11; which will happen in a subsequent patch.
Nemanja Ivanovicd2c3c512016-09-23 13:25:31 +000012; CHECK-LABEL: test1
Nemanja Ivanovicdf1cb522016-11-29 16:11:34 +000013; CHECK: mtvsrdd 34, 4, 3
Nemanja Ivanovicd2c3c512016-09-23 13:25:31 +000014; CHECK-BE-LABEL: test1
Nemanja Ivanovicdf1cb522016-11-29 16:11:34 +000015; CHECK-BE: mtvsrdd 34, 3, 4
Nemanja Ivanovicd2c3c512016-09-23 13:25:31 +000016 %vecins = insertelement <2 x i64> undef, i64 %a, i32 0
17 %vecins1 = insertelement <2 x i64> %vecins, i64 %b, i32 1
18 ret <2 x i64> %vecins1
19}
20
21define i64 @test2(<2 x i64> %a) {
22entry:
23; CHECK-LABEL: test2
24; CHECK: mfvsrld 3, 34
25 %0 = extractelement <2 x i64> %a, i32 0
26 ret i64 %0
27}
28
29define i64 @test3(<2 x i64> %a) {
30entry:
31; CHECK-BE-LABEL: test3
32; CHECK-BE: mfvsrld 3, 34
33 %0 = extractelement <2 x i64> %a, i32 1
34 ret i64 %0
35}
36
37define <4 x i32> @test4(i32* nocapture readonly %in) {
38entry:
39; CHECK-LABEL: test4
40; CHECK: lxvwsx 34, 0, 3
41; CHECK-NOT: xxspltw
42; CHECK-BE-LABEL: test4
43; CHECK-BE: lxvwsx 34, 0, 3
44; CHECK-BE-NOT: xxspltw
45 %0 = load i32, i32* %in, align 4
46 %splat.splatinsert = insertelement <4 x i32> undef, i32 %0, i32 0
47 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
48 ret <4 x i32> %splat.splat
49}
50
51define <4 x float> @test5(float* nocapture readonly %in) {
52entry:
53; CHECK-LABEL: test5
54; CHECK: lxvwsx 34, 0, 3
55; CHECK-NOT: xxspltw
56; CHECK-BE-LABEL: test5
57; CHECK-BE: lxvwsx 34, 0, 3
58; CHECK-BE-NOT: xxspltw
59 %0 = load float, float* %in, align 4
60 %splat.splatinsert = insertelement <4 x float> undef, float %0, i32 0
61 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer
62 ret <4 x float> %splat.splat
63}
64
65define <4 x i32> @test6() {
66entry:
67; CHECK-LABEL: test6
68; CHECK: addis
69; CHECK: ld [[TOC:[0-9]+]], .LC0
70; CHECK: lxvwsx 34, 0, 3
71; CHECK-NOT: xxspltw
72; CHECK-BE-LABEL: test6
73; CHECK-BE: addis
74; CHECK-BE: ld [[TOC:[0-9]+]], .LC0
75; CHECK-BE: lxvwsx 34, 0, 3
76; CHECK-BE-NOT: xxspltw
77 %0 = load i32, i32* @Globi, align 4
78 %splat.splatinsert = insertelement <4 x i32> undef, i32 %0, i32 0
79 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
80 ret <4 x i32> %splat.splat
81}
82
83define <4 x float> @test7() {
84entry:
85; CHECK-LABEL: test7
86; CHECK: addis
87; CHECK: ld [[TOC:[0-9]+]], .LC1
88; CHECK: lxvwsx 34, 0, 3
89; CHECK-NOT: xxspltw
90; CHECK-BE-LABEL: test7
91; CHECK-BE: addis
92; CHECK-BE: ld [[TOC:[0-9]+]], .LC1
93; CHECK-BE: lxvwsx 34, 0, 3
94; CHECK-BE-NOT: xxspltw
95 %0 = load float, float* @Globf, align 4
96 %splat.splatinsert = insertelement <4 x float> undef, float %0, i32 0
97 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer
98 ret <4 x float> %splat.splat
99}
100
101define <16 x i8> @test8() {
102entry:
103; CHECK-LABEL: test8
104; CHECK: xxlxor 34, 34, 34
105; CHECK-BE-LABEL: test8
106; CHECK-BE: xxlxor 34, 34, 34
107 ret <16 x i8> zeroinitializer
108}
109
110define <16 x i8> @test9() {
111entry:
112; CHECK-LABEL: test9
113; CHECK: xxspltib 34, 1
114; CHECK-BE-LABEL: test9
115; CHECK-BE: xxspltib 34, 1
116 ret <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
117}
118
119define <16 x i8> @test10() {
120entry:
121; CHECK-LABEL: test10
122; CHECK: xxspltib 34, 127
123; CHECK-BE-LABEL: test10
124; CHECK-BE: xxspltib 34, 127
125 ret <16 x i8> <i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127, i8 127>
126}
127
128define <16 x i8> @test11() {
129entry:
130; CHECK-LABEL: test11
131; CHECK: xxspltib 34, 128
132; CHECK-BE-LABEL: test11
133; CHECK-BE: xxspltib 34, 128
134 ret <16 x i8> <i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>
135}
136
137define <16 x i8> @test12() {
138entry:
139; CHECK-LABEL: test12
140; CHECK: xxspltib 34, 255
141; CHECK-BE-LABEL: test12
142; CHECK-BE: xxspltib 34, 255
143 ret <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
144}
145
146define <16 x i8> @test13() {
147entry:
148; CHECK-LABEL: test13
149; CHECK: xxspltib 34, 129
150; CHECK-BE-LABEL: test13
151; CHECK-BE: xxspltib 34, 129
152 ret <16 x i8> <i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127, i8 -127>
153}
154
Nemanja Ivanovic552c8e92016-12-15 11:16:20 +0000155define <16 x i8> @test13E127() {
156entry:
157; CHECK-LABEL: test13E127
158; CHECK: xxspltib 34, 200
159; CHECK-BE-LABEL: test13E127
160; CHECK-BE: xxspltib 34, 200
161 ret <16 x i8> <i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200, i8 200>
162}
163
Nemanja Ivanovicd2c3c512016-09-23 13:25:31 +0000164define <4 x i32> @test14(<4 x i32> %a, i32* nocapture readonly %b) {
165entry:
166; CHECK-LABEL: test14
167; CHECK: lwz [[LD:[0-9]+]],
Nemanja Ivanovic15748f42016-12-06 11:47:14 +0000168; CHECK: mtvsrws 34, [[LD]]
Nemanja Ivanovicd2c3c512016-09-23 13:25:31 +0000169; CHECK-BE-LABEL: test14
170; CHECK-BE: lwz [[LD:[0-9]+]],
Nemanja Ivanovic15748f42016-12-06 11:47:14 +0000171; CHECK-BE: mtvsrws 34, [[LD]]
Nemanja Ivanovicd2c3c512016-09-23 13:25:31 +0000172 %0 = load i32, i32* %b, align 4
173 %splat.splatinsert = insertelement <4 x i32> undef, i32 %0, i32 0
174 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
175 %1 = add i32 %0, 5
176 store i32 %1, i32* %b, align 4
177 ret <4 x i32> %splat.splat
178}