Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 1 | ; Test that we take advantage of signext and zeroext annotations. |
| 2 | ; |
| 3 | ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s |
| 4 | |
| 5 | ; Zero extension of something that is already zero-extended. |
| 6 | define void @f1(i32 zeroext %r2, i64 *%r3) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 7 | ; CHECK-LABEL: f1: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 8 | ; CHECK-NOT: %r2 |
| 9 | ; CHECK: stg %r2, 0(%r3) |
| 10 | ; CHECK: br %r14 |
| 11 | %conv = zext i32 %r2 to i64 |
| 12 | store i64 %conv, i64* %r3 |
| 13 | ret void |
| 14 | } |
| 15 | |
| 16 | ; Sign extension of something that is already sign-extended. |
| 17 | define void @f2(i32 signext %r2, i64 *%r3) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 18 | ; CHECK-LABEL: f2: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 19 | ; CHECK-NOT: %r2 |
| 20 | ; CHECK: stg %r2, 0(%r3) |
| 21 | ; CHECK: br %r14 |
| 22 | %conv = sext i32 %r2 to i64 |
| 23 | store i64 %conv, i64* %r3 |
| 24 | ret void |
| 25 | } |
| 26 | |
| 27 | ; Sign extension of something that is already zero-extended. |
| 28 | define void @f3(i32 zeroext %r2, i64 *%r3) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 29 | ; CHECK-LABEL: f3: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 30 | ; CHECK: lgfr [[REGISTER:%r[0-5]+]], %r2 |
| 31 | ; CHECK: stg [[REGISTER]], 0(%r3) |
| 32 | ; CHECK: br %r14 |
| 33 | %conv = sext i32 %r2 to i64 |
| 34 | store i64 %conv, i64* %r3 |
| 35 | ret void |
| 36 | } |
| 37 | |
| 38 | ; Zero extension of something that is already sign-extended. |
| 39 | define void @f4(i32 signext %r2, i64 *%r3) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 40 | ; CHECK-LABEL: f4: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 41 | ; CHECK: llgfr [[REGISTER:%r[0-5]+]], %r2 |
| 42 | ; CHECK: stg [[REGISTER]], 0(%r3) |
| 43 | ; CHECK: br %r14 |
| 44 | %conv = zext i32 %r2 to i64 |
| 45 | store i64 %conv, i64* %r3 |
| 46 | ret void |
| 47 | } |