Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 1 | ; Test loading of 64-bit constants. |
| 2 | ; |
| 3 | ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s |
| 4 | |
Richard Sandiford | a57e13b | 2013-06-27 09:38:48 +0000 | [diff] [blame] | 5 | declare void @foo(i64, i64, i64, i64) |
| 6 | |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 7 | ; Check 0. |
| 8 | define i64 @f1() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 9 | ; CHECK-LABEL: f1: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 10 | ; CHECK: lghi %r2, 0 |
| 11 | ; CHECK-NEXT: br %r14 |
| 12 | ret i64 0 |
| 13 | } |
| 14 | |
| 15 | ; Check the high end of the LGHI range. |
| 16 | define i64 @f2() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 17 | ; CHECK-LABEL: f2: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 18 | ; CHECK: lghi %r2, 32767 |
| 19 | ; CHECK-NEXT: br %r14 |
| 20 | ret i64 32767 |
| 21 | } |
| 22 | |
| 23 | ; Check the next value up, which must use LLILL instead. |
| 24 | define i64 @f3() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 25 | ; CHECK-LABEL: f3: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 26 | ; CHECK: llill %r2, 32768 |
| 27 | ; CHECK-NEXT: br %r14 |
| 28 | ret i64 32768 |
| 29 | } |
| 30 | |
| 31 | ; Check the high end of the LLILL range. |
| 32 | define i64 @f4() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 33 | ; CHECK-LABEL: f4: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 34 | ; CHECK: llill %r2, 65535 |
| 35 | ; CHECK-NEXT: br %r14 |
| 36 | ret i64 65535 |
| 37 | } |
| 38 | |
| 39 | ; Check the first useful LLILH value, which is the next one up. |
| 40 | define i64 @f5() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 41 | ; CHECK-LABEL: f5: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 42 | ; CHECK: llilh %r2, 1 |
| 43 | ; CHECK-NEXT: br %r14 |
| 44 | ret i64 65536 |
| 45 | } |
| 46 | |
| 47 | ; Check the first useful LGFI value, which is the next one up again. |
| 48 | define i64 @f6() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 49 | ; CHECK-LABEL: f6: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 50 | ; CHECK: lgfi %r2, 65537 |
| 51 | ; CHECK-NEXT: br %r14 |
| 52 | ret i64 65537 |
| 53 | } |
| 54 | |
| 55 | ; Check the high end of the LGFI range. |
| 56 | define i64 @f7() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 57 | ; CHECK-LABEL: f7: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 58 | ; CHECK: lgfi %r2, 2147483647 |
| 59 | ; CHECK-NEXT: br %r14 |
| 60 | ret i64 2147483647 |
| 61 | } |
| 62 | |
| 63 | ; Check the next value up, which should use LLILH instead. |
| 64 | define i64 @f8() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 65 | ; CHECK-LABEL: f8: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 66 | ; CHECK: llilh %r2, 32768 |
| 67 | ; CHECK-NEXT: br %r14 |
| 68 | ret i64 2147483648 |
| 69 | } |
| 70 | |
| 71 | ; Check the next value up again, which should use LLILF. |
| 72 | define i64 @f9() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 73 | ; CHECK-LABEL: f9: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 74 | ; CHECK: llilf %r2, 2147483649 |
| 75 | ; CHECK-NEXT: br %r14 |
| 76 | ret i64 2147483649 |
| 77 | } |
| 78 | |
| 79 | ; Check the high end of the LLILH range. |
| 80 | define i64 @f10() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 81 | ; CHECK-LABEL: f10: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 82 | ; CHECK: llilh %r2, 65535 |
| 83 | ; CHECK-NEXT: br %r14 |
| 84 | ret i64 4294901760 |
| 85 | } |
| 86 | |
| 87 | ; Check the next value up, which must use LLILF. |
| 88 | define i64 @f11() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 89 | ; CHECK-LABEL: f11: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 90 | ; CHECK: llilf %r2, 4294901761 |
| 91 | ; CHECK-NEXT: br %r14 |
| 92 | ret i64 4294901761 |
| 93 | } |
| 94 | |
| 95 | ; Check the high end of the LLILF range. |
| 96 | define i64 @f12() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 97 | ; CHECK-LABEL: f12: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 98 | ; CHECK: llilf %r2, 4294967295 |
| 99 | ; CHECK-NEXT: br %r14 |
| 100 | ret i64 4294967295 |
| 101 | } |
| 102 | |
| 103 | ; Check the lowest useful LLIHL value, which is the next one up. |
| 104 | define i64 @f13() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 105 | ; CHECK-LABEL: f13: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 106 | ; CHECK: llihl %r2, 1 |
| 107 | ; CHECK-NEXT: br %r14 |
| 108 | ret i64 4294967296 |
| 109 | } |
| 110 | |
| 111 | ; Check the next value up, which must use a combination of two instructions. |
| 112 | define i64 @f14() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 113 | ; CHECK-LABEL: f14: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 114 | ; CHECK: llihl %r2, 1 |
| 115 | ; CHECK-NEXT: oill %r2, 1 |
| 116 | ; CHECK-NEXT: br %r14 |
| 117 | ret i64 4294967297 |
| 118 | } |
| 119 | |
| 120 | ; Check the high end of the OILL range. |
| 121 | define i64 @f15() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 122 | ; CHECK-LABEL: f15: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 123 | ; CHECK: llihl %r2, 1 |
| 124 | ; CHECK-NEXT: oill %r2, 65535 |
| 125 | ; CHECK-NEXT: br %r14 |
| 126 | ret i64 4295032831 |
| 127 | } |
| 128 | |
| 129 | ; Check the next value up, which should use OILH instead. |
| 130 | define i64 @f16() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 131 | ; CHECK-LABEL: f16: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 132 | ; CHECK: llihl %r2, 1 |
| 133 | ; CHECK-NEXT: oilh %r2, 1 |
| 134 | ; CHECK-NEXT: br %r14 |
| 135 | ret i64 4295032832 |
| 136 | } |
| 137 | |
| 138 | ; Check the next value up again, which should use OILF. |
| 139 | define i64 @f17() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 140 | ; CHECK-LABEL: f17: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 141 | ; CHECK: llihl %r2, 1 |
| 142 | ; CHECK-NEXT: oilf %r2, 65537 |
| 143 | ; CHECK-NEXT: br %r14 |
| 144 | ret i64 4295032833 |
| 145 | } |
| 146 | |
| 147 | ; Check the high end of the OILH range. |
| 148 | define i64 @f18() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 149 | ; CHECK-LABEL: f18: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 150 | ; CHECK: llihl %r2, 1 |
| 151 | ; CHECK-NEXT: oilh %r2, 65535 |
| 152 | ; CHECK-NEXT: br %r14 |
| 153 | ret i64 8589869056 |
| 154 | } |
| 155 | |
| 156 | ; Check the high end of the OILF range. |
| 157 | define i64 @f19() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 158 | ; CHECK-LABEL: f19: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 159 | ; CHECK: llihl %r2, 1 |
| 160 | ; CHECK-NEXT: oilf %r2, 4294967295 |
| 161 | ; CHECK-NEXT: br %r14 |
| 162 | ret i64 8589934591 |
| 163 | } |
| 164 | |
| 165 | ; Check the high end of the LLIHL range. |
| 166 | define i64 @f20() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 167 | ; CHECK-LABEL: f20: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 168 | ; CHECK: llihl %r2, 65535 |
| 169 | ; CHECK-NEXT: br %r14 |
| 170 | ret i64 281470681743360 |
| 171 | } |
| 172 | |
| 173 | ; Check the lowest useful LLIHH value, which is 1<<32 greater than the above. |
| 174 | define i64 @f21() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 175 | ; CHECK-LABEL: f21: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 176 | ; CHECK: llihh %r2, 1 |
| 177 | ; CHECK-NEXT: br %r14 |
| 178 | ret i64 281474976710656 |
| 179 | } |
| 180 | |
| 181 | ; Check the lowest useful LLIHF value, which is 1<<32 greater again. |
| 182 | define i64 @f22() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 183 | ; CHECK-LABEL: f22: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 184 | ; CHECK: llihf %r2, 65537 |
| 185 | ; CHECK-NEXT: br %r14 |
| 186 | ret i64 281479271677952 |
| 187 | } |
| 188 | |
| 189 | ; Check the highest end of the LLIHH range. |
| 190 | define i64 @f23() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 191 | ; CHECK-LABEL: f23: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 192 | ; CHECK: llihh %r2, 65535 |
| 193 | ; CHECK-NEXT: br %r14 |
| 194 | ret i64 -281474976710656 |
| 195 | } |
| 196 | |
| 197 | ; Check the next value up, which must use OILL too. |
| 198 | define i64 @f24() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 199 | ; CHECK-LABEL: f24: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 200 | ; CHECK: llihh %r2, 65535 |
| 201 | ; CHECK-NEXT: oill %r2, 1 |
| 202 | ; CHECK-NEXT: br %r14 |
| 203 | ret i64 -281474976710655 |
| 204 | } |
| 205 | |
| 206 | ; Check the high end of the LLIHF range. |
| 207 | define i64 @f25() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 208 | ; CHECK-LABEL: f25: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 209 | ; CHECK: llihf %r2, 4294967295 |
| 210 | ; CHECK-NEXT: br %r14 |
| 211 | ret i64 -4294967296 |
| 212 | } |
| 213 | |
| 214 | ; Check -1. |
| 215 | define i64 @f26() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 216 | ; CHECK-LABEL: f26: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 217 | ; CHECK: lghi %r2, -1 |
| 218 | ; CHECK-NEXT: br %r14 |
| 219 | ret i64 -1 |
| 220 | } |
| 221 | |
| 222 | ; Check the low end of the LGHI range. |
| 223 | define i64 @f27() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 224 | ; CHECK-LABEL: f27: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 225 | ; CHECK: lghi %r2, -32768 |
| 226 | ; CHECK-NEXT: br %r14 |
| 227 | ret i64 -32768 |
| 228 | } |
| 229 | |
| 230 | ; Check the next value down, which must use LGFI instead. |
| 231 | define i64 @f28() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 232 | ; CHECK-LABEL: f28: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 233 | ; CHECK: lgfi %r2, -32769 |
| 234 | ; CHECK-NEXT: br %r14 |
| 235 | ret i64 -32769 |
| 236 | } |
| 237 | |
| 238 | ; Check the low end of the LGFI range. |
| 239 | define i64 @f29() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 240 | ; CHECK-LABEL: f29: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 241 | ; CHECK: lgfi %r2, -2147483648 |
| 242 | ; CHECK-NEXT: br %r14 |
| 243 | ret i64 -2147483648 |
| 244 | } |
| 245 | |
| 246 | ; Check the next value down, which needs a two-instruction sequence. |
| 247 | define i64 @f30() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 248 | ; CHECK-LABEL: f30: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 249 | ; CHECK: llihf %r2, 4294967295 |
| 250 | ; CHECK-NEXT: oilf %r2, 2147483647 |
| 251 | ; CHECK-NEXT: br %r14 |
| 252 | ret i64 -2147483649 |
| 253 | } |
Richard Sandiford | a57e13b | 2013-06-27 09:38:48 +0000 | [diff] [blame] | 254 | |
| 255 | ; Check that constant loads are rematerialized. |
| 256 | define i64 @f31() { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 257 | ; CHECK-LABEL: f31: |
Richard Sandiford | a57e13b | 2013-06-27 09:38:48 +0000 | [diff] [blame] | 258 | ; CHECK-DAG: lghi %r2, 42 |
| 259 | ; CHECK-DAG: lgfi %r3, 65537 |
| 260 | ; CHECK-DAG: llilf %r4, 2147483649 |
| 261 | ; CHECK-DAG: llihf %r5, 65537 |
| 262 | ; CHECK: brasl %r14, foo@PLT |
| 263 | ; CHECK-DAG: llill %r2, 32768 |
| 264 | ; CHECK-DAG: llilh %r3, 1 |
| 265 | ; CHECK-DAG: llihl %r4, 1 |
| 266 | ; CHECK-DAG: llihh %r5, 1 |
| 267 | ; CHECK: brasl %r14, foo@PLT |
| 268 | ; CHECK-DAG: lghi %r2, 42 |
| 269 | ; CHECK-DAG: lgfi %r3, 65537 |
| 270 | ; CHECK-DAG: llilf %r4, 2147483649 |
| 271 | ; CHECK-DAG: llihf %r5, 65537 |
| 272 | ; CHECK: brasl %r14, foo@PLT |
| 273 | ; CHECK-DAG: llill %r2, 32768 |
| 274 | ; CHECK-DAG: llilh %r3, 1 |
| 275 | ; CHECK-DAG: llihl %r4, 1 |
| 276 | ; CHECK-DAG: llihh %r5, 1 |
| 277 | ; CHECK: brasl %r14, foo@PLT |
| 278 | ; CHECK: lghi %r2, 42 |
| 279 | ; CHECK: br %r14 |
| 280 | call void @foo(i64 42, i64 65537, i64 2147483649, i64 281479271677952) |
| 281 | call void @foo(i64 32768, i64 65536, i64 4294967296, i64 281474976710656) |
| 282 | call void @foo(i64 42, i64 65537, i64 2147483649, i64 281479271677952) |
| 283 | call void @foo(i64 32768, i64 65536, i64 4294967296, i64 281474976710656) |
| 284 | ret i64 42 |
| 285 | } |
Ulrich Weigand | 5f4373a | 2017-11-14 20:00:34 +0000 | [diff] [blame] | 286 | |
| 287 | ; Verify that we do not crash on OR with two constant inputs |
| 288 | ; (this was PR34859). |
| 289 | define i64 @f32(i64 *%ptr) { |
| 290 | ; CHECK-LABEL: f32: |
| 291 | ; CHECK: llihf %r1, 918324340 |
| 292 | ; CHECK: oilf %r1, 1806197964 |
| 293 | ; CHECK: la %r0, 1(%r1) |
| 294 | store i64 -1, i64* %ptr, align 8 |
| 295 | %1 = load i64, i64* %ptr, align 8 |
| 296 | %2 = icmp ne i64 %1, 0 |
| 297 | %3 = zext i1 %2 to i64 |
| 298 | %4 = or i64 %3, 3944173009226982604 |
| 299 | store i64 %4, i64* %ptr, align 8 |
| 300 | ret i64 3944173009226982604 |
| 301 | } |
| 302 | |