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Ahmed Bougacha9677cc62017-02-03 19:11:19 +00001; Test memchr using SRST, with the correct prototype.
Richard Sandiford6f6d5512013-08-20 09:38:48 +00002;
Ahmed Bougacha9677cc62017-02-03 19:11:19 +00003; RUN: llc < %s -mtriple=s390x-linux-gnu -no-integrated-as | FileCheck %s
Richard Sandiford6f6d5512013-08-20 09:38:48 +00004
Ahmed Bougacha9677cc62017-02-03 19:11:19 +00005declare i8 *@memchr(i8 *%src, i32 %char, i64 %len)
Richard Sandiford6f6d5512013-08-20 09:38:48 +00006
7; Test a simple forwarded call.
Ahmed Bougacha9677cc62017-02-03 19:11:19 +00008define i8 *@f1(i64 %len, i8 *%src, i32 %char) {
Richard Sandiford6f6d5512013-08-20 09:38:48 +00009; CHECK-LABEL: f1:
Ahmed Bougacha9677cc62017-02-03 19:11:19 +000010; CHECK-DAG: agr %r2, %r3
11; CHECK-DAG: llcr %r0, %r4
Richard Sandiford6f6d5512013-08-20 09:38:48 +000012; CHECK: [[LABEL:\.[^:]*]]:
Ahmed Bougacha9677cc62017-02-03 19:11:19 +000013; CHECK: srst %r2, %r3
Richard Sandiford6f6d5512013-08-20 09:38:48 +000014; CHECK-NEXT: jo [[LABEL]]
Ulrich Weigand2eb027d2016-04-07 16:11:44 +000015; CHECK: blr %r14
Richard Sandiford6f6d5512013-08-20 09:38:48 +000016; CHECK: lghi %r2, 0
17; CHECK: br %r14
Ahmed Bougacha9677cc62017-02-03 19:11:19 +000018 %res = call i8 *@memchr(i8 *%src, i32 %char, i64 %len)
Richard Sandiford6f6d5512013-08-20 09:38:48 +000019 ret i8 *%res
20}
Ahmed Bougacha9677cc62017-02-03 19:11:19 +000021
22; Test a doubled call with no use of %r0 in between. There should be a
23; single load of %r0.
24define i8 *@f2(i8 *%src, i8 *%charptr, i64 %len) {
25; CHECK-LABEL: f2:
26; CHECK: llc %r0, 0(%r3)
27; CHECK-NOT: %r0
28; CHECK: srst [[RES1:%r[1-5]]], %r2
29; CHECK-NOT: %r0
30; CHECK: srst %r2, [[RES1]]
31; CHECK: br %r14
32 %char = load volatile i8 , i8 *%charptr
33 %charext = zext i8 %char to i32
34 %res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len)
35 %res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len)
36 ret i8 *%res2
37}
38
39; Test a doubled call with a use of %r0 in between. %r0 must be loaded
40; for each loop.
41define i8 *@f3(i8 *%src, i8 *%charptr, i64 %len) {
42; CHECK-LABEL: f3:
43; CHECK: llc [[CHAR:%r[1-5]]], 0(%r3)
44; CHECK: lr %r0, [[CHAR]]
45; CHECK: srst [[RES1:%r[1-5]]], %r2
46; CHECK: lhi %r0, 0
47; CHECK: blah %r0
48; CHECK: lr %r0, [[CHAR]]
49; CHECK: srst %r2, [[RES1]]
50; CHECK: br %r14
51 %char = load volatile i8 , i8 *%charptr
52 %charext = zext i8 %char to i32
53 %res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len)
54 call void asm sideeffect "blah $0", "{r0}" (i32 0)
55 %res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len)
56 ret i8 *%res2
57}