| Simon Pilgrim | 03ccf91 | 2017-05-03 16:46:30 +0000 | [diff] [blame] | 1 | ; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+lwp < %s | FileCheck %s |
| 2 | |
| 3 | target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" |
| 4 | target triple = "x86_64-unknown-unknown" |
| 5 | |
| 6 | ; Stack reload folding tests. |
| 7 | ; |
| 8 | ; By including a nop call with sideeffects we can force a partial register spill of the |
| 9 | ; relevant registers and check that the reload is correctly folded into the instruction. |
| 10 | |
| 11 | define i8 @stack_fold_lwpins_u32(i32 %a0, i32 %a1) { |
| 12 | ; CHECK-LABEL: stack_fold_lwpins_u32 |
| Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 13 | ; CHECK: # %bb.0: |
| Simon Pilgrim | 03ccf91 | 2017-05-03 16:46:30 +0000 | [diff] [blame] | 14 | ; CHECK: lwpins $2814, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload |
| 15 | %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() |
| 16 | %2 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %a1, i32 2814) |
| 17 | ret i8 %2 |
| 18 | } |
| 19 | declare i8 @llvm.x86.lwpins32(i32, i32, i32) |
| 20 | |
| 21 | define i8 @stack_fold_lwpins_u64(i64 %a0, i32 %a1) { |
| 22 | ; CHECK-LABEL: stack_fold_lwpins_u64 |
| Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 23 | ; CHECK: # %bb.0: |
| Simon Pilgrim | 03ccf91 | 2017-05-03 16:46:30 +0000 | [diff] [blame] | 24 | ; CHECK: lwpins $2814, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 4-byte Folded Reload |
| 25 | %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() |
| 26 | %2 = tail call i8 @llvm.x86.lwpins64(i64 %a0, i32 %a1, i32 2814) |
| 27 | ret i8 %2 |
| 28 | } |
| 29 | declare i8 @llvm.x86.lwpins64(i64, i32, i32) |
| 30 | |
| 31 | define void @stack_fold_lwpval_u32(i32 %a0, i32 %a1) { |
| 32 | ; CHECK-LABEL: stack_fold_lwpval_u32 |
| Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 33 | ; CHECK: # %bb.0: |
| Simon Pilgrim | 03ccf91 | 2017-05-03 16:46:30 +0000 | [diff] [blame] | 34 | ; CHECK: lwpval $2814, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload |
| 35 | %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() |
| 36 | tail call void @llvm.x86.lwpval32(i32 %a0, i32 %a1, i32 2814) |
| 37 | ret void |
| 38 | } |
| 39 | declare void @llvm.x86.lwpval32(i32, i32, i32) |
| 40 | |
| 41 | define void @stack_fold_lwpval_u64(i64 %a0, i32 %a1) { |
| 42 | ; CHECK-LABEL: stack_fold_lwpval_u64 |
| Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 43 | ; CHECK: # %bb.0: |
| Simon Pilgrim | 03ccf91 | 2017-05-03 16:46:30 +0000 | [diff] [blame] | 44 | ; CHECK: lwpval $2814, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 4-byte Folded Reload |
| 45 | %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() |
| 46 | tail call void @llvm.x86.lwpval64(i64 %a0, i32 %a1, i32 2814) |
| 47 | ret void |
| 48 | } |
| 49 | declare void @llvm.x86.lwpval64(i64, i32, i32) |